Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r135-smll-167819414700553.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DoubleLock-PT-p3s2, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r135-smll-167819414700553
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 748K
-rw-r--r-- 1 mcc users 6.0K Feb 25 14:23 CTLCardinality.txt
-rw-r--r-- 1 mcc users 61K Feb 25 14:23 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 25 14:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K Feb 25 14:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:01 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:01 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:01 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.6K Feb 25 14:24 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 105K Feb 25 14:24 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.5K Feb 25 14:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Feb 25 14:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:01 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:01 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 330K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DoubleLock-PT-p3s2-CTLCardinality-00
FORMULA_NAME DoubleLock-PT-p3s2-CTLCardinality-01
FORMULA_NAME DoubleLock-PT-p3s2-CTLCardinality-02
FORMULA_NAME DoubleLock-PT-p3s2-CTLCardinality-03
FORMULA_NAME DoubleLock-PT-p3s2-CTLCardinality-04
FORMULA_NAME DoubleLock-PT-p3s2-CTLCardinality-05
FORMULA_NAME DoubleLock-PT-p3s2-CTLCardinality-06
FORMULA_NAME DoubleLock-PT-p3s2-CTLCardinality-07
FORMULA_NAME DoubleLock-PT-p3s2-CTLCardinality-08
FORMULA_NAME DoubleLock-PT-p3s2-CTLCardinality-09
FORMULA_NAME DoubleLock-PT-p3s2-CTLCardinality-10
FORMULA_NAME DoubleLock-PT-p3s2-CTLCardinality-11
FORMULA_NAME DoubleLock-PT-p3s2-CTLCardinality-12
FORMULA_NAME DoubleLock-PT-p3s2-CTLCardinality-13
FORMULA_NAME DoubleLock-PT-p3s2-CTLCardinality-14
FORMULA_NAME DoubleLock-PT-p3s2-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678406070419

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DoubleLock-PT-p3s2
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 23:54:33] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-09 23:54:34] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 23:54:34] [INFO ] Load time of PNML (sax parser for PT used): 230 ms
[2023-03-09 23:54:34] [INFO ] Transformed 112 places.
[2023-03-09 23:54:34] [INFO ] Transformed 744 transitions.
[2023-03-09 23:54:34] [INFO ] Parsed PT model containing 112 places and 744 transitions and 3008 arcs in 399 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 27 ms.
Deduced a syphon composed of 20 places in 6 ms
Reduce places removed 20 places and 32 transitions.
FORMULA DoubleLock-PT-p3s2-CTLCardinality-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 57 out of 92 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 92/92 places, 712/712 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 90 transition count 712
Applied a total of 2 rules in 48 ms. Remains 90 /92 variables (removed 2) and now considering 712/712 (removed 0) transitions.
[2023-03-09 23:54:34] [INFO ] Flow matrix only has 515 transitions (discarded 197 similar events)
// Phase 1: matrix 515 rows 90 cols
[2023-03-09 23:54:34] [INFO ] Computed 3 place invariants in 37 ms
[2023-03-09 23:54:35] [INFO ] Implicit Places using invariants in 442 ms returned []
[2023-03-09 23:54:35] [INFO ] Flow matrix only has 515 transitions (discarded 197 similar events)
[2023-03-09 23:54:35] [INFO ] Invariant cache hit.
[2023-03-09 23:54:35] [INFO ] State equation strengthened by 47 read => feed constraints.
[2023-03-09 23:54:35] [INFO ] Implicit Places using invariants and state equation in 547 ms returned []
Implicit Place search using SMT with State Equation took 1045 ms to find 0 implicit places.
[2023-03-09 23:54:35] [INFO ] Flow matrix only has 515 transitions (discarded 197 similar events)
[2023-03-09 23:54:35] [INFO ] Invariant cache hit.
[2023-03-09 23:54:36] [INFO ] Dead Transitions using invariants and state equation in 686 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 90/92 places, 712/712 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1787 ms. Remains : 90/92 places, 712/712 transitions.
Support contains 57 out of 90 places after structural reductions.
[2023-03-09 23:54:36] [INFO ] Flatten gal took : 177 ms
[2023-03-09 23:54:37] [INFO ] Flatten gal took : 93 ms
[2023-03-09 23:54:37] [INFO ] Input system was already deterministic with 712 transitions.
Support contains 56 out of 90 places (down from 57) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 111 resets, run finished after 603 ms. (steps per millisecond=16 ) properties (out of 55) seen :24
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 31) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 30) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=142 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 29) seen :0
Running SMT prover for 29 properties.
[2023-03-09 23:54:38] [INFO ] Flow matrix only has 515 transitions (discarded 197 similar events)
[2023-03-09 23:54:38] [INFO ] Invariant cache hit.
[2023-03-09 23:54:38] [INFO ] [Real]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-09 23:54:38] [INFO ] After 393ms SMT Verify possible using all constraints in real domain returned unsat :5 sat :0 real:24
[2023-03-09 23:54:38] [INFO ] [Nat]Absence check using 3 positive place invariants in 4 ms returned sat
[2023-03-09 23:54:39] [INFO ] After 255ms SMT Verify possible using state equation in natural domain returned unsat :25 sat :4
[2023-03-09 23:54:39] [INFO ] State equation strengthened by 47 read => feed constraints.
[2023-03-09 23:54:39] [INFO ] After 162ms SMT Verify possible using 47 Read/Feed constraints in natural domain returned unsat :25 sat :4
[2023-03-09 23:54:39] [INFO ] After 398ms SMT Verify possible using trap constraints in natural domain returned unsat :25 sat :4
Attempting to minimize the solution found.
Minimization took 336 ms.
[2023-03-09 23:54:39] [INFO ] After 1206ms SMT Verify possible using all constraints in natural domain returned unsat :25 sat :4
Fused 29 Parikh solutions to 4 different solutions.
Parikh walk visited 0 properties in 46 ms.
Support contains 4 out of 90 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 90/90 places, 712/712 transitions.
Graph (complete) has 1203 edges and 90 vertex of which 89 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.5 ms
Discarding 1 places :
Also discarding 0 output transitions
Drop transitions removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 0 with 8 rules applied. Total rules applied 9 place count 89 transition count 704
Applied a total of 9 rules in 52 ms. Remains 89 /90 variables (removed 1) and now considering 704/712 (removed 8) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 52 ms. Remains : 89/90 places, 704/712 transitions.
Incomplete random walk after 10003 steps, including 118 resets, run finished after 258 ms. (steps per millisecond=38 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 24 resets, run finished after 72 ms. (steps per millisecond=138 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 23 resets, run finished after 64 ms. (steps per millisecond=156 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 22 resets, run finished after 56 ms. (steps per millisecond=178 ) properties (out of 4) seen :1
Running SMT prover for 3 properties.
[2023-03-09 23:54:40] [INFO ] Flow matrix only has 507 transitions (discarded 197 similar events)
// Phase 1: matrix 507 rows 89 cols
[2023-03-09 23:54:40] [INFO ] Computed 3 place invariants in 9 ms
[2023-03-09 23:54:40] [INFO ] [Real]Absence check using 3 positive place invariants in 4 ms returned sat
[2023-03-09 23:54:40] [INFO ] After 398ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-09 23:54:40] [INFO ] [Nat]Absence check using 3 positive place invariants in 3 ms returned sat
[2023-03-09 23:54:41] [INFO ] After 283ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2023-03-09 23:54:41] [INFO ] State equation strengthened by 47 read => feed constraints.
[2023-03-09 23:54:41] [INFO ] After 180ms SMT Verify possible using 47 Read/Feed constraints in natural domain returned unsat :0 sat :3
[2023-03-09 23:54:41] [INFO ] After 329ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 82 ms.
[2023-03-09 23:54:41] [INFO ] After 776ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Parikh walk visited 0 properties in 35 ms.
Support contains 2 out of 89 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 89/89 places, 704/704 transitions.
Applied a total of 0 rules in 37 ms. Remains 89 /89 variables (removed 0) and now considering 704/704 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 39 ms. Remains : 89/89 places, 704/704 transitions.
Incomplete random walk after 10001 steps, including 114 resets, run finished after 204 ms. (steps per millisecond=49 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 22 resets, run finished after 60 ms. (steps per millisecond=166 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 25 resets, run finished after 63 ms. (steps per millisecond=158 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 23 resets, run finished after 64 ms. (steps per millisecond=156 ) properties (out of 3) seen :0
Interrupted probabilistic random walk after 250285 steps, run timeout after 3001 ms. (steps per millisecond=83 ) properties seen :{}
Probabilistic random walk after 250285 steps, saw 176315 distinct states, run finished after 3002 ms. (steps per millisecond=83 ) properties seen :0
Running SMT prover for 3 properties.
[2023-03-09 23:54:44] [INFO ] Flow matrix only has 507 transitions (discarded 197 similar events)
[2023-03-09 23:54:44] [INFO ] Invariant cache hit.
[2023-03-09 23:54:45] [INFO ] [Real]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-09 23:54:45] [INFO ] After 227ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-09 23:54:45] [INFO ] [Nat]Absence check using 3 positive place invariants in 3 ms returned sat
[2023-03-09 23:54:45] [INFO ] After 176ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2023-03-09 23:54:45] [INFO ] State equation strengthened by 47 read => feed constraints.
[2023-03-09 23:54:45] [INFO ] After 121ms SMT Verify possible using 47 Read/Feed constraints in natural domain returned unsat :0 sat :3
[2023-03-09 23:54:45] [INFO ] Deduced a trap composed of 32 places in 163 ms of which 2 ms to minimize.
[2023-03-09 23:54:46] [INFO ] Deduced a trap composed of 31 places in 155 ms of which 2 ms to minimize.
[2023-03-09 23:54:46] [INFO ] Trap strengthening (SAT) tested/added 3/2 trap constraints in 409 ms
[2023-03-09 23:54:46] [INFO ] After 668ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 95 ms.
[2023-03-09 23:54:46] [INFO ] After 997ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Parikh walk visited 0 properties in 44 ms.
Support contains 2 out of 89 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 89/89 places, 704/704 transitions.
Applied a total of 0 rules in 34 ms. Remains 89 /89 variables (removed 0) and now considering 704/704 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 34 ms. Remains : 89/89 places, 704/704 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 89/89 places, 704/704 transitions.
Applied a total of 0 rules in 33 ms. Remains 89 /89 variables (removed 0) and now considering 704/704 (removed 0) transitions.
[2023-03-09 23:54:46] [INFO ] Flow matrix only has 507 transitions (discarded 197 similar events)
[2023-03-09 23:54:46] [INFO ] Invariant cache hit.
[2023-03-09 23:54:46] [INFO ] Implicit Places using invariants in 255 ms returned []
[2023-03-09 23:54:46] [INFO ] Flow matrix only has 507 transitions (discarded 197 similar events)
[2023-03-09 23:54:46] [INFO ] Invariant cache hit.
[2023-03-09 23:54:46] [INFO ] State equation strengthened by 47 read => feed constraints.
[2023-03-09 23:54:47] [INFO ] Implicit Places using invariants and state equation in 588 ms returned []
Implicit Place search using SMT with State Equation took 848 ms to find 0 implicit places.
[2023-03-09 23:54:47] [INFO ] Redundant transitions in 77 ms returned []
[2023-03-09 23:54:47] [INFO ] Flow matrix only has 507 transitions (discarded 197 similar events)
[2023-03-09 23:54:47] [INFO ] Invariant cache hit.
[2023-03-09 23:54:47] [INFO ] Dead Transitions using invariants and state equation in 730 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1699 ms. Remains : 89/89 places, 704/704 transitions.
Ensure Unique test removed 197 transitions
Reduce isomorphic transitions removed 197 transitions.
Iterating post reduction 0 with 197 rules applied. Total rules applied 197 place count 89 transition count 507
Performed 9 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 1 with 9 Pre rules applied. Total rules applied 197 place count 89 transition count 498
Deduced a syphon composed of 9 places in 0 ms
Reduce places removed 9 places and 0 transitions.
Iterating global reduction 1 with 18 rules applied. Total rules applied 215 place count 80 transition count 498
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 1 with 2 rules applied. Total rules applied 217 place count 79 transition count 497
Applied a total of 217 rules in 30 ms. Remains 79 /89 variables (removed 10) and now considering 497/704 (removed 207) transitions.
Running SMT prover for 3 properties.
// Phase 1: matrix 497 rows 79 cols
[2023-03-09 23:54:48] [INFO ] Computed 3 place invariants in 6 ms
[2023-03-09 23:54:48] [INFO ] [Real]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-09 23:54:48] [INFO ] After 255ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-09 23:54:48] [INFO ] [Nat]Absence check using 3 positive place invariants in 3 ms returned sat
[2023-03-09 23:54:48] [INFO ] After 186ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2023-03-09 23:54:48] [INFO ] State equation strengthened by 16 read => feed constraints.
[2023-03-09 23:54:48] [INFO ] After 76ms SMT Verify possible using 16 Read/Feed constraints in natural domain returned unsat :0 sat :3
[2023-03-09 23:54:48] [INFO ] After 180ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 63 ms.
[2023-03-09 23:54:48] [INFO ] After 486ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Successfully simplified 25 atomic propositions for a total of 15 simplifications.
FORMULA DoubleLock-PT-p3s2-CTLCardinality-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DoubleLock-PT-p3s2-CTLCardinality-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DoubleLock-PT-p3s2-CTLCardinality-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-09 23:54:48] [INFO ] Flatten gal took : 79 ms
[2023-03-09 23:54:48] [INFO ] Flatten gal took : 74 ms
[2023-03-09 23:54:49] [INFO ] Input system was already deterministic with 712 transitions.
Support contains 34 out of 90 places (down from 38) after GAL structural reductions.
Computed a total of 7 stabilizing places and 176 stable transitions
Graph (complete) has 1325 edges and 90 vertex of which 89 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.12 ms
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 712/712 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 89 transition count 712
Applied a total of 1 rules in 11 ms. Remains 89 /90 variables (removed 1) and now considering 712/712 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 89/90 places, 712/712 transitions.
[2023-03-09 23:54:49] [INFO ] Flatten gal took : 50 ms
[2023-03-09 23:54:49] [INFO ] Flatten gal took : 53 ms
[2023-03-09 23:54:49] [INFO ] Input system was already deterministic with 712 transitions.
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 712/712 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 89 transition count 712
Applied a total of 1 rules in 11 ms. Remains 89 /90 variables (removed 1) and now considering 712/712 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 89/90 places, 712/712 transitions.
[2023-03-09 23:54:49] [INFO ] Flatten gal took : 43 ms
[2023-03-09 23:54:49] [INFO ] Flatten gal took : 43 ms
[2023-03-09 23:54:49] [INFO ] Input system was already deterministic with 712 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 90/90 places, 712/712 transitions.
Graph (complete) has 1325 edges and 90 vertex of which 89 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.2 ms
Discarding 1 places :
Also discarding 0 output transitions
Applied a total of 1 rules in 22 ms. Remains 89 /90 variables (removed 1) and now considering 712/712 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 23 ms. Remains : 89/90 places, 712/712 transitions.
[2023-03-09 23:54:49] [INFO ] Flatten gal took : 25 ms
[2023-03-09 23:54:49] [INFO ] Flatten gal took : 25 ms
[2023-03-09 23:54:49] [INFO ] Input system was already deterministic with 712 transitions.
Finished random walk after 1474 steps, including 17 resets, run visited all 1 properties in 3 ms. (steps per millisecond=491 )
FORMULA DoubleLock-PT-p3s2-CTLCardinality-03 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 712/712 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 89 transition count 712
Applied a total of 1 rules in 5 ms. Remains 89 /90 variables (removed 1) and now considering 712/712 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 89/90 places, 712/712 transitions.
[2023-03-09 23:54:49] [INFO ] Flatten gal took : 23 ms
[2023-03-09 23:54:49] [INFO ] Flatten gal took : 25 ms
[2023-03-09 23:54:49] [INFO ] Input system was already deterministic with 712 transitions.
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 712/712 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 89 transition count 712
Applied a total of 1 rules in 6 ms. Remains 89 /90 variables (removed 1) and now considering 712/712 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 89/90 places, 712/712 transitions.
[2023-03-09 23:54:49] [INFO ] Flatten gal took : 25 ms
[2023-03-09 23:54:49] [INFO ] Flatten gal took : 27 ms
[2023-03-09 23:54:49] [INFO ] Input system was already deterministic with 712 transitions.
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 712/712 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 89 transition count 712
Applied a total of 1 rules in 4 ms. Remains 89 /90 variables (removed 1) and now considering 712/712 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 89/90 places, 712/712 transitions.
[2023-03-09 23:54:50] [INFO ] Flatten gal took : 21 ms
[2023-03-09 23:54:50] [INFO ] Flatten gal took : 22 ms
[2023-03-09 23:54:50] [INFO ] Input system was already deterministic with 712 transitions.
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 712/712 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 89 transition count 712
Applied a total of 1 rules in 4 ms. Remains 89 /90 variables (removed 1) and now considering 712/712 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 89/90 places, 712/712 transitions.
[2023-03-09 23:54:50] [INFO ] Flatten gal took : 19 ms
[2023-03-09 23:54:50] [INFO ] Flatten gal took : 23 ms
[2023-03-09 23:54:50] [INFO ] Input system was already deterministic with 712 transitions.
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 712/712 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 89 transition count 712
Applied a total of 1 rules in 5 ms. Remains 89 /90 variables (removed 1) and now considering 712/712 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 89/90 places, 712/712 transitions.
[2023-03-09 23:54:50] [INFO ] Flatten gal took : 20 ms
[2023-03-09 23:54:50] [INFO ] Flatten gal took : 22 ms
[2023-03-09 23:54:50] [INFO ] Input system was already deterministic with 712 transitions.
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 712/712 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 89 transition count 712
Applied a total of 1 rules in 5 ms. Remains 89 /90 variables (removed 1) and now considering 712/712 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 89/90 places, 712/712 transitions.
[2023-03-09 23:54:50] [INFO ] Flatten gal took : 20 ms
[2023-03-09 23:54:50] [INFO ] Flatten gal took : 23 ms
[2023-03-09 23:54:50] [INFO ] Input system was already deterministic with 712 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 90/90 places, 712/712 transitions.
Graph (complete) has 1325 edges and 90 vertex of which 89 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.3 ms
Discarding 1 places :
Also discarding 0 output transitions
Applied a total of 1 rules in 19 ms. Remains 89 /90 variables (removed 1) and now considering 712/712 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 19 ms. Remains : 89/90 places, 712/712 transitions.
[2023-03-09 23:54:50] [INFO ] Flatten gal took : 21 ms
[2023-03-09 23:54:50] [INFO ] Flatten gal took : 23 ms
[2023-03-09 23:54:50] [INFO ] Input system was already deterministic with 712 transitions.
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 712/712 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 89 transition count 712
Applied a total of 1 rules in 4 ms. Remains 89 /90 variables (removed 1) and now considering 712/712 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 89/90 places, 712/712 transitions.
[2023-03-09 23:54:50] [INFO ] Flatten gal took : 22 ms
[2023-03-09 23:54:50] [INFO ] Flatten gal took : 25 ms
[2023-03-09 23:54:50] [INFO ] Input system was already deterministic with 712 transitions.
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 712/712 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 89 transition count 712
Applied a total of 1 rules in 4 ms. Remains 89 /90 variables (removed 1) and now considering 712/712 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 89/90 places, 712/712 transitions.
[2023-03-09 23:54:50] [INFO ] Flatten gal took : 20 ms
[2023-03-09 23:54:50] [INFO ] Flatten gal took : 21 ms
[2023-03-09 23:54:50] [INFO ] Input system was already deterministic with 712 transitions.
[2023-03-09 23:54:50] [INFO ] Flatten gal took : 20 ms
[2023-03-09 23:54:50] [INFO ] Flatten gal took : 20 ms
[2023-03-09 23:54:50] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 2 ms.
[2023-03-09 23:54:50] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 90 places, 712 transitions and 2856 arcs took 6 ms.
Total runtime 16888 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DoubleLock-PT-p3s2
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/368

FORMULA DoubleLock-PT-p3s2-CTLCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p3s2-CTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p3s2-CTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p3s2-CTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p3s2-CTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p3s2-CTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p3s2-CTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p3s2-CTLCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 14124328 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16103700 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/368/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/368/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/368/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 17 (type CNST) for 16 DoubleLock-PT-p3s2-CTLCardinality-08
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 26 (type CNST) for 25 DoubleLock-PT-p3s2-CTLCardinality-12
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 17 (type CNST) for DoubleLock-PT-p3s2-CTLCardinality-08
lola: result : true
lola: FINISHED task # 26 (type CNST) for DoubleLock-PT-p3s2-CTLCardinality-12
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 11 (type EXCL) for 10 DoubleLock-PT-p3s2-CTLCardinality-05
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 38 (type FNDP) for 3 DoubleLock-PT-p3s2-CTLCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 11 (type EXCL) for DoubleLock-PT-p3s2-CTLCardinality-05
lola: result : false
lola: markings : 40
lola: fired transitions : 41
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 DoubleLock-PT-p3s2-CTLCardinality-00
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type FNDP) for DoubleLock-PT-p3s2-CTLCardinality-02
lola: result : true
lola: fired transitions : 62
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p3s2-CTLCardinality-05: CTL false CTL model checker
DoubleLock-PT-p3s2-CTLCardinality-08: INITIAL true preprocessing
DoubleLock-PT-p3s2-CTLCardinality-12: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p3s2-CTLCardinality-00: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-02: CONJ 0 1 0 0 3 0 0 1
DoubleLock-PT-p3s2-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/450 7/32 DoubleLock-PT-p3s2-CTLCardinality-00 1403048 m, 280609 m/sec, 1515866 t fired, .

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DoubleLock-PT-p3s2-CTLCardinality-12: INITIAL false preprocessing

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DoubleLock-PT-p3s2-CTLCardinality-00: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-02: CONJ 0 1 0 0 3 0 0 1
DoubleLock-PT-p3s2-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/450 14/32 DoubleLock-PT-p3s2-CTLCardinality-00 3006369 m, 320664 m/sec, 3248117 t fired, .

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DoubleLock-PT-p3s2-CTLCardinality-00: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-02: CONJ 0 1 0 0 3 0 0 1
DoubleLock-PT-p3s2-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 15/450 21/32 DoubleLock-PT-p3s2-CTLCardinality-00 4590773 m, 316880 m/sec, 4959924 t fired, .

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DoubleLock-PT-p3s2-CTLCardinality-12: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p3s2-CTLCardinality-00: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-02: CONJ 0 1 0 0 3 0 0 1
DoubleLock-PT-p3s2-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 20/450 27/32 DoubleLock-PT-p3s2-CTLCardinality-00 6168037 m, 315452 m/sec, 6664021 t fired, .

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lola: CANCELED task # 1 (type EXCL) for DoubleLock-PT-p3s2-CTLCardinality-00 (memory limit exceeded)
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DoubleLock-PT-p3s2-CTLCardinality-05: CTL false CTL model checker
DoubleLock-PT-p3s2-CTLCardinality-08: INITIAL true preprocessing
DoubleLock-PT-p3s2-CTLCardinality-12: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p3s2-CTLCardinality-00: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s2-CTLCardinality-02: CONJ 0 1 0 0 3 0 0 1
DoubleLock-PT-p3s2-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: LAUNCH task # 35 (type EXCL) for 34 DoubleLock-PT-p3s2-CTLCardinality-15
lola: time limit : 510 sec
lola: memory limit: 32 pages
lola: FINISHED task # 35 (type EXCL) for DoubleLock-PT-p3s2-CTLCardinality-15
lola: result : true
lola: markings : 33
lola: fired transitions : 34
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 32 (type EXCL) for 31 DoubleLock-PT-p3s2-CTLCardinality-14
lola: time limit : 595 sec
lola: memory limit: 32 pages
lola: FINISHED task # 32 (type EXCL) for DoubleLock-PT-p3s2-CTLCardinality-14
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 DoubleLock-PT-p3s2-CTLCardinality-11
lola: time limit : 715 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p3s2-CTLCardinality-05: CTL false CTL model checker
DoubleLock-PT-p3s2-CTLCardinality-08: INITIAL true preprocessing
DoubleLock-PT-p3s2-CTLCardinality-12: INITIAL false preprocessing
DoubleLock-PT-p3s2-CTLCardinality-14: CTL true CTL model checker
DoubleLock-PT-p3s2-CTLCardinality-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p3s2-CTLCardinality-00: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s2-CTLCardinality-02: CONJ 0 1 0 0 3 0 0 1
DoubleLock-PT-p3s2-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 5/715 3/32 DoubleLock-PT-p3s2-CTLCardinality-11 518947 m, 103789 m/sec, 1482698 t fired, .

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DoubleLock-PT-p3s2-CTLCardinality-08: INITIAL true preprocessing
DoubleLock-PT-p3s2-CTLCardinality-12: INITIAL false preprocessing
DoubleLock-PT-p3s2-CTLCardinality-14: CTL true CTL model checker
DoubleLock-PT-p3s2-CTLCardinality-15: CTL true CTL model checker

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DoubleLock-PT-p3s2-CTLCardinality-00: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p3s2-CTLCardinality-02: CONJ 0 1 0 0 3 0 0 1
DoubleLock-PT-p3s2-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p3s2-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 10/715 5/32 DoubleLock-PT-p3s2-CTLCardinality-11 1068498 m, 109910 m/sec, 3052851 t fired, .

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23 CTL EXCL 15/715 8/32 DoubleLock-PT-p3s2-CTLCardinality-11 1611269 m, 108554 m/sec, 4603622 t fired, .

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23 CTL EXCL 20/715 10/32 DoubleLock-PT-p3s2-CTLCardinality-11 2155079 m, 108762 m/sec, 6157370 t fired, .

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23 CTL EXCL 25/715 13/32 DoubleLock-PT-p3s2-CTLCardinality-11 2692498 m, 107483 m/sec, 7692852 t fired, .

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23 CTL EXCL 30/715 15/32 DoubleLock-PT-p3s2-CTLCardinality-11 3227359 m, 106972 m/sec, 9221016 t fired, .

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23 CTL EXCL 35/715 18/32 DoubleLock-PT-p3s2-CTLCardinality-11 3764455 m, 107419 m/sec, 10755579 t fired, .

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23 CTL EXCL 40/715 20/32 DoubleLock-PT-p3s2-CTLCardinality-11 4262078 m, 99524 m/sec, 12177357 t fired, .

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23 CTL EXCL 45/715 22/32 DoubleLock-PT-p3s2-CTLCardinality-11 4799427 m, 107469 m/sec, 13712650 t fired, .

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23 CTL EXCL 50/715 25/32 DoubleLock-PT-p3s2-CTLCardinality-11 5295507 m, 99216 m/sec, 15130015 t fired, .

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23 CTL EXCL 55/715 27/32 DoubleLock-PT-p3s2-CTLCardinality-11 5819681 m, 104834 m/sec, 16627654 t fired, .

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23 CTL EXCL 60/715 30/32 DoubleLock-PT-p3s2-CTLCardinality-11 6340951 m, 104254 m/sec, 18116995 t fired, .

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23 CTL EXCL 65/715 32/32 DoubleLock-PT-p3s2-CTLCardinality-11 6869536 m, 105717 m/sec, 19627247 t fired, .

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DoubleLock-PT-p3s2-CTLCardinality-05: CTL false CTL model checker
DoubleLock-PT-p3s2-CTLCardinality-06: CTL true CTL model checker
DoubleLock-PT-p3s2-CTLCardinality-08: INITIAL true preprocessing
DoubleLock-PT-p3s2-CTLCardinality-09: CTL true CTL model checker
DoubleLock-PT-p3s2-CTLCardinality-11: CTL unknown AGGR
DoubleLock-PT-p3s2-CTLCardinality-12: INITIAL false preprocessing
DoubleLock-PT-p3s2-CTLCardinality-13: CTL true CTL model checker
DoubleLock-PT-p3s2-CTLCardinality-14: CTL true CTL model checker
DoubleLock-PT-p3s2-CTLCardinality-15: CTL true CTL model checker


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