Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r135-smll-167819414700537.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DoubleLock-PT-p2s2, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r135-smll-167819414700537
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.2M
-rw-r--r-- 1 mcc users 6.3K Feb 25 14:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 68K Feb 25 14:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.8K Feb 25 14:19 CTLFireability.txt
-rw-r--r-- 1 mcc users 41K Feb 25 14:19 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:01 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:01 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:01 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.0K Feb 25 14:21 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 67K Feb 25 14:21 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.2K Feb 25 14:20 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 58K Feb 25 14:20 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:01 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:01 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 813K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DoubleLock-PT-p2s2-CTLCardinality-00
FORMULA_NAME DoubleLock-PT-p2s2-CTLCardinality-01
FORMULA_NAME DoubleLock-PT-p2s2-CTLCardinality-02
FORMULA_NAME DoubleLock-PT-p2s2-CTLCardinality-03
FORMULA_NAME DoubleLock-PT-p2s2-CTLCardinality-04
FORMULA_NAME DoubleLock-PT-p2s2-CTLCardinality-05
FORMULA_NAME DoubleLock-PT-p2s2-CTLCardinality-06
FORMULA_NAME DoubleLock-PT-p2s2-CTLCardinality-07
FORMULA_NAME DoubleLock-PT-p2s2-CTLCardinality-08
FORMULA_NAME DoubleLock-PT-p2s2-CTLCardinality-09
FORMULA_NAME DoubleLock-PT-p2s2-CTLCardinality-10
FORMULA_NAME DoubleLock-PT-p2s2-CTLCardinality-11
FORMULA_NAME DoubleLock-PT-p2s2-CTLCardinality-12
FORMULA_NAME DoubleLock-PT-p2s2-CTLCardinality-13
FORMULA_NAME DoubleLock-PT-p2s2-CTLCardinality-14
FORMULA_NAME DoubleLock-PT-p2s2-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678399592648

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DoubleLock-PT-p2s2
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 22:06:35] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-09 22:06:35] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 22:06:35] [INFO ] Load time of PNML (sax parser for PT used): 308 ms
[2023-03-09 22:06:35] [INFO ] Transformed 184 places.
[2023-03-09 22:06:35] [INFO ] Transformed 1832 transitions.
[2023-03-09 22:06:35] [INFO ] Parsed PT model containing 184 places and 1832 transitions and 7424 arcs in 440 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 16 ms.
Deduced a syphon composed of 36 places in 9 ms
Reduce places removed 36 places and 64 transitions.
FORMULA DoubleLock-PT-p2s2-CTLCardinality-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 68 out of 148 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 148/148 places, 1768/1768 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 146 transition count 1768
Applied a total of 2 rules in 48 ms. Remains 146 /148 variables (removed 2) and now considering 1768/1768 (removed 0) transitions.
[2023-03-09 22:06:35] [INFO ] Flow matrix only has 1225 transitions (discarded 543 similar events)
// Phase 1: matrix 1225 rows 146 cols
[2023-03-09 22:06:35] [INFO ] Computed 3 place invariants in 41 ms
[2023-03-09 22:06:36] [INFO ] Implicit Places using invariants in 466 ms returned []
[2023-03-09 22:06:36] [INFO ] Flow matrix only has 1225 transitions (discarded 543 similar events)
[2023-03-09 22:06:36] [INFO ] Invariant cache hit.
[2023-03-09 22:06:36] [INFO ] State equation strengthened by 116 read => feed constraints.
[2023-03-09 22:06:37] [INFO ] Implicit Places using invariants and state equation in 953 ms returned []
Implicit Place search using SMT with State Equation took 1472 ms to find 0 implicit places.
[2023-03-09 22:06:37] [INFO ] Flow matrix only has 1225 transitions (discarded 543 similar events)
[2023-03-09 22:06:37] [INFO ] Invariant cache hit.
[2023-03-09 22:06:38] [INFO ] Dead Transitions using invariants and state equation in 979 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 146/148 places, 1768/1768 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2522 ms. Remains : 146/148 places, 1768/1768 transitions.
Support contains 68 out of 146 places after structural reductions.
[2023-03-09 22:06:38] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-09 22:06:38] [INFO ] Flatten gal took : 230 ms
FORMULA DoubleLock-PT-p2s2-CTLCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-09 22:06:38] [INFO ] Flatten gal took : 140 ms
[2023-03-09 22:06:39] [INFO ] Input system was already deterministic with 1768 transitions.
Support contains 63 out of 146 places (down from 68) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 98 resets, run finished after 614 ms. (steps per millisecond=16 ) properties (out of 45) seen :18
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 27) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 26) seen :0
Running SMT prover for 26 properties.
[2023-03-09 22:06:40] [INFO ] Flow matrix only has 1225 transitions (discarded 543 similar events)
[2023-03-09 22:06:40] [INFO ] Invariant cache hit.
[2023-03-09 22:06:40] [INFO ] [Real]Absence check using 3 positive place invariants in 4 ms returned sat
[2023-03-09 22:06:40] [INFO ] After 216ms SMT Verify possible using all constraints in real domain returned unsat :3 sat :0 real:23
[2023-03-09 22:06:40] [INFO ] [Nat]Absence check using 3 positive place invariants in 3 ms returned sat
[2023-03-09 22:06:41] [INFO ] After 762ms SMT Verify possible using state equation in natural domain returned unsat :19 sat :7
[2023-03-09 22:06:41] [INFO ] State equation strengthened by 116 read => feed constraints.
[2023-03-09 22:06:42] [INFO ] After 699ms SMT Verify possible using 116 Read/Feed constraints in natural domain returned unsat :19 sat :7
[2023-03-09 22:06:42] [INFO ] After 1273ms SMT Verify possible using trap constraints in natural domain returned unsat :19 sat :7
Attempting to minimize the solution found.
Minimization took 584 ms.
[2023-03-09 22:06:43] [INFO ] After 2860ms SMT Verify possible using all constraints in natural domain returned unsat :19 sat :7
Fused 26 Parikh solutions to 7 different solutions.
Parikh walk visited 0 properties in 65 ms.
Support contains 9 out of 146 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 146/146 places, 1768/1768 transitions.
Graph (complete) has 2896 edges and 146 vertex of which 144 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.7 ms
Discarding 2 places :
Also discarding 0 output transitions
Drop transitions removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 0 with 16 rules applied. Total rules applied 17 place count 144 transition count 1752
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 18 place count 143 transition count 1720
Iterating global reduction 1 with 1 rules applied. Total rules applied 19 place count 143 transition count 1720
Applied a total of 19 rules in 122 ms. Remains 143 /146 variables (removed 3) and now considering 1720/1768 (removed 48) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 124 ms. Remains : 143/146 places, 1720/1768 transitions.
Incomplete random walk after 10002 steps, including 104 resets, run finished after 217 ms. (steps per millisecond=46 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 18 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 7) seen :1
Incomplete Best-First random walk after 10001 steps, including 18 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 16 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 6) seen :1
Incomplete Best-First random walk after 10001 steps, including 18 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 5) seen :1
Incomplete Best-First random walk after 10001 steps, including 21 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
[2023-03-09 22:06:43] [INFO ] Flow matrix only has 1177 transitions (discarded 543 similar events)
// Phase 1: matrix 1177 rows 143 cols
[2023-03-09 22:06:43] [INFO ] Computed 2 place invariants in 11 ms
[2023-03-09 22:06:43] [INFO ] [Real]Absence check using 1 positive place invariants in 0 ms returned sat
[2023-03-09 22:06:43] [INFO ] [Real]Absence check using 1 positive and 1 generalized place invariants in 2 ms returned sat
[2023-03-09 22:06:43] [INFO ] After 106ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-09 22:06:43] [INFO ] [Nat]Absence check using 1 positive place invariants in 1 ms returned sat
[2023-03-09 22:06:43] [INFO ] [Nat]Absence check using 1 positive and 1 generalized place invariants in 2 ms returned sat
[2023-03-09 22:06:44] [INFO ] After 483ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-09 22:06:44] [INFO ] State equation strengthened by 116 read => feed constraints.
[2023-03-09 22:06:45] [INFO ] After 692ms SMT Verify possible using 116 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-03-09 22:06:45] [INFO ] After 1334ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 244 ms.
[2023-03-09 22:06:46] [INFO ] After 2146ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Parikh walk visited 0 properties in 25 ms.
Support contains 5 out of 143 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 143/143 places, 1720/1720 transitions.
Drop transitions removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 0 with 16 rules applied. Total rules applied 16 place count 143 transition count 1704
Applied a total of 16 rules in 51 ms. Remains 143 /143 variables (removed 0) and now considering 1704/1720 (removed 16) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 54 ms. Remains : 143/143 places, 1704/1720 transitions.
Incomplete random walk after 10008 steps, including 101 resets, run finished after 119 ms. (steps per millisecond=84 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 20 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 19 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 18 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 19 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 150390 steps, run timeout after 3001 ms. (steps per millisecond=50 ) properties seen :{}
Probabilistic random walk after 150390 steps, saw 105456 distinct states, run finished after 3003 ms. (steps per millisecond=50 ) properties seen :0
Running SMT prover for 4 properties.
[2023-03-09 22:06:49] [INFO ] Flow matrix only has 1161 transitions (discarded 543 similar events)
// Phase 1: matrix 1161 rows 143 cols
[2023-03-09 22:06:49] [INFO ] Computed 3 place invariants in 8 ms
[2023-03-09 22:06:49] [INFO ] [Real]Absence check using 3 positive place invariants in 3 ms returned sat
[2023-03-09 22:06:49] [INFO ] After 86ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-09 22:06:49] [INFO ] [Nat]Absence check using 3 positive place invariants in 3 ms returned sat
[2023-03-09 22:06:50] [INFO ] After 476ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-09 22:06:50] [INFO ] State equation strengthened by 116 read => feed constraints.
[2023-03-09 22:06:50] [INFO ] After 500ms SMT Verify possible using 116 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-03-09 22:06:50] [INFO ] Deduced a trap composed of 55 places in 169 ms of which 1 ms to minimize.
[2023-03-09 22:06:50] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 231 ms
[2023-03-09 22:06:51] [INFO ] Deduced a trap composed of 42 places in 183 ms of which 1 ms to minimize.
[2023-03-09 22:06:51] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 254 ms
[2023-03-09 22:06:51] [INFO ] After 1191ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 226 ms.
[2023-03-09 22:06:51] [INFO ] After 1989ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Parikh walk visited 0 properties in 34 ms.
Support contains 5 out of 143 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 143/143 places, 1704/1704 transitions.
Applied a total of 0 rules in 46 ms. Remains 143 /143 variables (removed 0) and now considering 1704/1704 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 49 ms. Remains : 143/143 places, 1704/1704 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 143/143 places, 1704/1704 transitions.
Applied a total of 0 rules in 47 ms. Remains 143 /143 variables (removed 0) and now considering 1704/1704 (removed 0) transitions.
[2023-03-09 22:06:51] [INFO ] Flow matrix only has 1161 transitions (discarded 543 similar events)
[2023-03-09 22:06:51] [INFO ] Invariant cache hit.
[2023-03-09 22:06:51] [INFO ] Implicit Places using invariants in 244 ms returned []
[2023-03-09 22:06:51] [INFO ] Flow matrix only has 1161 transitions (discarded 543 similar events)
[2023-03-09 22:06:51] [INFO ] Invariant cache hit.
[2023-03-09 22:06:52] [INFO ] State equation strengthened by 116 read => feed constraints.
[2023-03-09 22:06:53] [INFO ] Implicit Places using invariants and state equation in 1192 ms returned []
Implicit Place search using SMT with State Equation took 1448 ms to find 0 implicit places.
[2023-03-09 22:06:53] [INFO ] Redundant transitions in 131 ms returned []
[2023-03-09 22:06:53] [INFO ] Flow matrix only has 1161 transitions (discarded 543 similar events)
[2023-03-09 22:06:53] [INFO ] Invariant cache hit.
[2023-03-09 22:06:54] [INFO ] Dead Transitions using invariants and state equation in 1026 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 2664 ms. Remains : 143/143 places, 1704/1704 transitions.
Ensure Unique test removed 543 transitions
Reduce isomorphic transitions removed 543 transitions.
Iterating post reduction 0 with 543 rules applied. Total rules applied 543 place count 143 transition count 1161
Performed 10 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 1 with 10 Pre rules applied. Total rules applied 543 place count 143 transition count 1151
Deduced a syphon composed of 10 places in 1 ms
Reduce places removed 10 places and 0 transitions.
Iterating global reduction 1 with 20 rules applied. Total rules applied 563 place count 133 transition count 1151
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 1 with 4 rules applied. Total rules applied 567 place count 131 transition count 1149
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 568 place count 130 transition count 1117
Iterating global reduction 1 with 1 rules applied. Total rules applied 569 place count 130 transition count 1117
Applied a total of 569 rules in 58 ms. Remains 130 /143 variables (removed 13) and now considering 1117/1704 (removed 587) transitions.
Running SMT prover for 4 properties.
// Phase 1: matrix 1117 rows 130 cols
[2023-03-09 22:06:54] [INFO ] Computed 3 place invariants in 6 ms
[2023-03-09 22:06:54] [INFO ] [Real]Absence check using 3 positive place invariants in 3 ms returned sat
[2023-03-09 22:06:54] [INFO ] After 65ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-09 22:06:54] [INFO ] [Nat]Absence check using 3 positive place invariants in 3 ms returned sat
[2023-03-09 22:06:54] [INFO ] After 415ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-09 22:06:55] [INFO ] After 623ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 146 ms.
[2023-03-09 22:06:55] [INFO ] After 836ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Successfully simplified 19 atomic propositions for a total of 13 simplifications.
FORMULA DoubleLock-PT-p2s2-CTLCardinality-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DoubleLock-PT-p2s2-CTLCardinality-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-09 22:06:55] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-09 22:06:55] [INFO ] Flatten gal took : 88 ms
[2023-03-09 22:06:55] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA DoubleLock-PT-p2s2-CTLCardinality-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DoubleLock-PT-p2s2-CTLCardinality-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-09 22:06:55] [INFO ] Flatten gal took : 120 ms
[2023-03-09 22:06:55] [INFO ] Input system was already deterministic with 1768 transitions.
Support contains 32 out of 146 places (down from 42) after GAL structural reductions.
FORMULA DoubleLock-PT-p2s2-CTLCardinality-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 8 stabilizing places and 416 stable transitions
Graph (complete) has 3315 edges and 146 vertex of which 144 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.21 ms
Starting structural reductions in LTL mode, iteration 0 : 146/146 places, 1768/1768 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 144 transition count 1768
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 3 place count 143 transition count 1736
Iterating global reduction 1 with 1 rules applied. Total rules applied 4 place count 143 transition count 1736
Applied a total of 4 rules in 15 ms. Remains 143 /146 variables (removed 3) and now considering 1736/1768 (removed 32) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 143/146 places, 1736/1768 transitions.
[2023-03-09 22:06:55] [INFO ] Flatten gal took : 72 ms
[2023-03-09 22:06:55] [INFO ] Flatten gal took : 72 ms
[2023-03-09 22:06:56] [INFO ] Input system was already deterministic with 1736 transitions.
Starting structural reductions in LTL mode, iteration 0 : 146/146 places, 1768/1768 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 145 transition count 1768
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 144 transition count 1736
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 144 transition count 1736
Applied a total of 3 rules in 15 ms. Remains 144 /146 variables (removed 2) and now considering 1736/1768 (removed 32) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 144/146 places, 1736/1768 transitions.
[2023-03-09 22:06:56] [INFO ] Flatten gal took : 59 ms
[2023-03-09 22:06:56] [INFO ] Flatten gal took : 67 ms
[2023-03-09 22:06:56] [INFO ] Input system was already deterministic with 1736 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 146/146 places, 1768/1768 transitions.
Graph (complete) has 3315 edges and 146 vertex of which 144 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.4 ms
Discarding 2 places :
Also discarding 0 output transitions
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 2 place count 143 transition count 1736
Iterating global reduction 0 with 1 rules applied. Total rules applied 3 place count 143 transition count 1736
Applied a total of 3 rules in 69 ms. Remains 143 /146 variables (removed 3) and now considering 1736/1768 (removed 32) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 70 ms. Remains : 143/146 places, 1736/1768 transitions.
[2023-03-09 22:06:56] [INFO ] Flatten gal took : 66 ms
[2023-03-09 22:06:56] [INFO ] Flatten gal took : 64 ms
[2023-03-09 22:06:56] [INFO ] Input system was already deterministic with 1736 transitions.
Finished random walk after 78 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=78 )
FORMULA DoubleLock-PT-p2s2-CTLCardinality-04 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 146/146 places, 1768/1768 transitions.
Graph (complete) has 3315 edges and 146 vertex of which 144 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.4 ms
Discarding 2 places :
Also discarding 0 output transitions
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 2 place count 143 transition count 1736
Iterating global reduction 0 with 1 rules applied. Total rules applied 3 place count 143 transition count 1736
Applied a total of 3 rules in 62 ms. Remains 143 /146 variables (removed 3) and now considering 1736/1768 (removed 32) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 64 ms. Remains : 143/146 places, 1736/1768 transitions.
[2023-03-09 22:06:56] [INFO ] Flatten gal took : 57 ms
[2023-03-09 22:06:57] [INFO ] Flatten gal took : 62 ms
[2023-03-09 22:06:57] [INFO ] Input system was already deterministic with 1736 transitions.
Starting structural reductions in LTL mode, iteration 0 : 146/146 places, 1768/1768 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 144 transition count 1768
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 3 place count 143 transition count 1736
Iterating global reduction 1 with 1 rules applied. Total rules applied 4 place count 143 transition count 1736
Applied a total of 4 rules in 14 ms. Remains 143 /146 variables (removed 3) and now considering 1736/1768 (removed 32) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 143/146 places, 1736/1768 transitions.
[2023-03-09 22:06:57] [INFO ] Flatten gal took : 52 ms
[2023-03-09 22:06:57] [INFO ] Flatten gal took : 59 ms
[2023-03-09 22:06:57] [INFO ] Input system was already deterministic with 1736 transitions.
Starting structural reductions in LTL mode, iteration 0 : 146/146 places, 1768/1768 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 144 transition count 1768
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 3 place count 143 transition count 1736
Iterating global reduction 1 with 1 rules applied. Total rules applied 4 place count 143 transition count 1736
Applied a total of 4 rules in 13 ms. Remains 143 /146 variables (removed 3) and now considering 1736/1768 (removed 32) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 14 ms. Remains : 143/146 places, 1736/1768 transitions.
[2023-03-09 22:06:57] [INFO ] Flatten gal took : 51 ms
[2023-03-09 22:06:57] [INFO ] Flatten gal took : 59 ms
[2023-03-09 22:06:57] [INFO ] Input system was already deterministic with 1736 transitions.
Starting structural reductions in LTL mode, iteration 0 : 146/146 places, 1768/1768 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 144 transition count 1768
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 3 place count 143 transition count 1736
Iterating global reduction 1 with 1 rules applied. Total rules applied 4 place count 143 transition count 1736
Applied a total of 4 rules in 12 ms. Remains 143 /146 variables (removed 3) and now considering 1736/1768 (removed 32) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 143/146 places, 1736/1768 transitions.
[2023-03-09 22:06:57] [INFO ] Flatten gal took : 49 ms
[2023-03-09 22:06:57] [INFO ] Flatten gal took : 56 ms
[2023-03-09 22:06:58] [INFO ] Input system was already deterministic with 1736 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 146/146 places, 1768/1768 transitions.
Graph (complete) has 3315 edges and 146 vertex of which 144 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.5 ms
Discarding 2 places :
Also discarding 0 output transitions
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 2 place count 143 transition count 1736
Iterating global reduction 0 with 1 rules applied. Total rules applied 3 place count 143 transition count 1736
Applied a total of 3 rules in 53 ms. Remains 143 /146 variables (removed 3) and now considering 1736/1768 (removed 32) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 54 ms. Remains : 143/146 places, 1736/1768 transitions.
[2023-03-09 22:06:58] [INFO ] Flatten gal took : 53 ms
[2023-03-09 22:06:58] [INFO ] Flatten gal took : 63 ms
[2023-03-09 22:06:58] [INFO ] Input system was already deterministic with 1736 transitions.
Finished random walk after 138 steps, including 1 resets, run visited all 1 properties in 2 ms. (steps per millisecond=69 )
FORMULA DoubleLock-PT-p2s2-CTLCardinality-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 146/146 places, 1768/1768 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 144 transition count 1768
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 3 place count 143 transition count 1736
Iterating global reduction 1 with 1 rules applied. Total rules applied 4 place count 143 transition count 1736
Applied a total of 4 rules in 10 ms. Remains 143 /146 variables (removed 3) and now considering 1736/1768 (removed 32) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 143/146 places, 1736/1768 transitions.
[2023-03-09 22:06:58] [INFO ] Flatten gal took : 44 ms
[2023-03-09 22:06:58] [INFO ] Flatten gal took : 50 ms
[2023-03-09 22:06:58] [INFO ] Input system was already deterministic with 1736 transitions.
[2023-03-09 22:06:58] [INFO ] Flatten gal took : 51 ms
[2023-03-09 22:06:58] [INFO ] Flatten gal took : 64 ms
[2023-03-09 22:06:58] [INFO ] Export to MCC of 7 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 2 ms.
[2023-03-09 22:06:58] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 146 places, 1768 transitions and 7104 arcs took 25 ms.
Total runtime 23785 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DoubleLock-PT-p2s2
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373

FORMULA DoubleLock-PT-p2s2-CTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p2s2-CTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p2s2-CTLCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p2s2-CTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p2s2-CTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DoubleLock-PT-p2s2-CTLCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678399655163

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:207
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:284
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 13 (type EXCL) for 12 DoubleLock-PT-p2s2-CTLCardinality-10
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s2-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-09: AGAF 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-11: LTL/CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 5/514 5/32 DoubleLock-PT-p2s2-CTLCardinality-10 681626 m, 136325 m/sec, 828934 t fired, .

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DoubleLock-PT-p2s2-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-09: AGAF 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-11: LTL/CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 10/514 9/32 DoubleLock-PT-p2s2-CTLCardinality-10 1453208 m, 154316 m/sec, 1767345 t fired, .

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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s2-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-09: AGAF 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-11: LTL/CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 15/514 14/32 DoubleLock-PT-p2s2-CTLCardinality-10 2259322 m, 161222 m/sec, 2747754 t fired, .

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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s2-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-09: AGAF 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-11: LTL/CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 20/514 19/32 DoubleLock-PT-p2s2-CTLCardinality-10 3031942 m, 154524 m/sec, 3687426 t fired, .

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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s2-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-09: AGAF 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-11: LTL/CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 25/514 24/32 DoubleLock-PT-p2s2-CTLCardinality-10 3844267 m, 162465 m/sec, 4675390 t fired, .

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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s2-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-09: AGAF 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-11: LTL/CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 30/514 29/32 DoubleLock-PT-p2s2-CTLCardinality-10 4648137 m, 160774 m/sec, 5653069 t fired, .

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lola: CANCELED task # 13 (type EXCL) for DoubleLock-PT-p2s2-CTLCardinality-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s2-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-09: AGAF 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-10: CTL 0 0 0 0 1 0 1 0
DoubleLock-PT-p2s2-CTLCardinality-11: LTL/CTL 0 1 0 0 1 0 0 0
DoubleLock-PT-p2s2-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: LAUNCH task # 19 (type EXCL) for 18 DoubleLock-PT-p2s2-CTLCardinality-14
lola: time limit : 594 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for DoubleLock-PT-p2s2-CTLCardinality-14
lola: result : true
lola: markings : 52
lola: fired transitions : 52
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 DoubleLock-PT-p2s2-CTLCardinality-11
lola: time limit : 712 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for DoubleLock-PT-p2s2-CTLCardinality-11
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 DoubleLock-PT-p2s2-CTLCardinality-02
lola: time limit : 891 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for DoubleLock-PT-p2s2-CTLCardinality-02
lola: result : false
lola: markings : 33
lola: fired transitions : 264
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 DoubleLock-PT-p2s2-CTLCardinality-01
lola: time limit : 1188 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for DoubleLock-PT-p2s2-CTLCardinality-01
lola: result : false
lola: markings : 85
lola: fired transitions : 155
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 21 (type EXCL) for 9 DoubleLock-PT-p2s2-CTLCardinality-09
lola: time limit : 1782 sec
lola: memory limit: 32 pages
lola: FINISHED task # 21 (type EXCL) for DoubleLock-PT-p2s2-CTLCardinality-09
lola: result : true
lola: markings : 126
lola: fired transitions : 125
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 DoubleLock-PT-p2s2-CTLCardinality-08
lola: time limit : 3564 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for DoubleLock-PT-p2s2-CTLCardinality-08
lola: result : true
lola: markings : 33
lola: fired transitions : 66
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 7

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s2-CTLCardinality-01: CTL false CTL model checker
DoubleLock-PT-p2s2-CTLCardinality-02: CTL false CTL model checker
DoubleLock-PT-p2s2-CTLCardinality-08: CTL true CTL model checker
DoubleLock-PT-p2s2-CTLCardinality-09: AGAF false state space /EFEG
DoubleLock-PT-p2s2-CTLCardinality-10: CTL unknown AGGR
DoubleLock-PT-p2s2-CTLCardinality-11: LTL/CTL false CTL model checker
DoubleLock-PT-p2s2-CTLCardinality-14: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DoubleLock-PT-p2s2"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DoubleLock-PT-p2s2, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r135-smll-167819414700537"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DoubleLock-PT-p2s2.tgz
mv DoubleLock-PT-p2s2 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;