Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r135-smll-167819414200378.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DiscoveryGPU-PT-12a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r135-smll-167819414200378
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 428K
-rw-r--r-- 1 mcc users 7.7K Feb 25 13:34 CTLCardinality.txt
-rw-r--r-- 1 mcc users 88K Feb 25 13:34 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 25 13:29 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K Feb 25 13:29 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:00 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:00 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 6.3K Feb 25 13:35 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 60K Feb 25 13:35 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.0K Feb 25 13:35 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 25 13:35 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:00 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:00 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 43K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DiscoveryGPU-PT-12a-CTLFireability-00
FORMULA_NAME DiscoveryGPU-PT-12a-CTLFireability-01
FORMULA_NAME DiscoveryGPU-PT-12a-CTLFireability-02
FORMULA_NAME DiscoveryGPU-PT-12a-CTLFireability-03
FORMULA_NAME DiscoveryGPU-PT-12a-CTLFireability-04
FORMULA_NAME DiscoveryGPU-PT-12a-CTLFireability-05
FORMULA_NAME DiscoveryGPU-PT-12a-CTLFireability-06
FORMULA_NAME DiscoveryGPU-PT-12a-CTLFireability-07
FORMULA_NAME DiscoveryGPU-PT-12a-CTLFireability-08
FORMULA_NAME DiscoveryGPU-PT-12a-CTLFireability-09
FORMULA_NAME DiscoveryGPU-PT-12a-CTLFireability-10
FORMULA_NAME DiscoveryGPU-PT-12a-CTLFireability-11
FORMULA_NAME DiscoveryGPU-PT-12a-CTLFireability-12
FORMULA_NAME DiscoveryGPU-PT-12a-CTLFireability-13
FORMULA_NAME DiscoveryGPU-PT-12a-CTLFireability-14
FORMULA_NAME DiscoveryGPU-PT-12a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678324024526

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DiscoveryGPU-PT-12a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 01:07:07] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-09 01:07:07] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 01:07:07] [INFO ] Load time of PNML (sax parser for PT used): 198 ms
[2023-03-09 01:07:08] [INFO ] Transformed 123 places.
[2023-03-09 01:07:08] [INFO ] Transformed 169 transitions.
[2023-03-09 01:07:08] [INFO ] Found NUPN structural information;
[2023-03-09 01:07:08] [INFO ] Parsed PT model containing 123 places and 169 transitions and 543 arcs in 303 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 14 ms.
Support contains 78 out of 123 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 123/123 places, 169/169 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 119 transition count 165
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 119 transition count 165
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 11 place count 116 transition count 162
Iterating global reduction 0 with 3 rules applied. Total rules applied 14 place count 116 transition count 162
Drop transitions removed 12 transitions
Redundant transition composition rules discarded 12 transitions
Iterating global reduction 0 with 12 rules applied. Total rules applied 26 place count 116 transition count 150
Applied a total of 26 rules in 32 ms. Remains 116 /123 variables (removed 7) and now considering 150/169 (removed 19) transitions.
// Phase 1: matrix 150 rows 116 cols
[2023-03-09 01:07:08] [INFO ] Computed 2 place invariants in 13 ms
[2023-03-09 01:07:08] [INFO ] Implicit Places using invariants in 284 ms returned []
[2023-03-09 01:07:08] [INFO ] Invariant cache hit.
[2023-03-09 01:07:08] [INFO ] State equation strengthened by 93 read => feed constraints.
[2023-03-09 01:07:08] [INFO ] Implicit Places using invariants and state equation in 191 ms returned []
Implicit Place search using SMT with State Equation took 517 ms to find 0 implicit places.
[2023-03-09 01:07:08] [INFO ] Invariant cache hit.
[2023-03-09 01:07:08] [INFO ] Dead Transitions using invariants and state equation in 193 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 116/123 places, 150/169 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 744 ms. Remains : 116/123 places, 150/169 transitions.
Support contains 78 out of 116 places after structural reductions.
[2023-03-09 01:07:09] [INFO ] Flatten gal took : 50 ms
[2023-03-09 01:07:09] [INFO ] Flatten gal took : 21 ms
[2023-03-09 01:07:09] [INFO ] Input system was already deterministic with 150 transitions.
Support contains 77 out of 116 places (down from 78) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 77 resets, run finished after 669 ms. (steps per millisecond=14 ) properties (out of 77) seen :72
Incomplete Best-First random walk after 10001 steps, including 6 resets, run finished after 79 ms. (steps per millisecond=126 ) properties (out of 5) seen :1
Incomplete Best-First random walk after 10001 steps, including 6 resets, run finished after 62 ms. (steps per millisecond=161 ) properties (out of 4) seen :1
Incomplete Best-First random walk after 10001 steps, including 6 resets, run finished after 60 ms. (steps per millisecond=166 ) properties (out of 3) seen :1
Incomplete Best-First random walk after 10001 steps, including 6 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 2) seen :1
Incomplete Best-First random walk after 10001 steps, including 7 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-09 01:07:10] [INFO ] Invariant cache hit.
[2023-03-09 01:07:10] [INFO ] [Real]Absence check using 2 positive place invariants in 2 ms returned sat
[2023-03-09 01:07:10] [INFO ] After 198ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
[2023-03-09 01:07:10] [INFO ] Flatten gal took : 22 ms
[2023-03-09 01:07:10] [INFO ] Flatten gal took : 22 ms
[2023-03-09 01:07:10] [INFO ] Input system was already deterministic with 150 transitions.
Computed a total of 15 stabilizing places and 13 stable transitions
Graph (complete) has 330 edges and 116 vertex of which 108 are kept as prefixes of interest. Removing 8 places using SCC suffix rule.6 ms
Starting structural reductions in LTL mode, iteration 0 : 116/116 places, 150/150 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 107 transition count 141
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 107 transition count 141
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 25 place count 100 transition count 134
Iterating global reduction 0 with 7 rules applied. Total rules applied 32 place count 100 transition count 134
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 37 place count 95 transition count 129
Iterating global reduction 0 with 5 rules applied. Total rules applied 42 place count 95 transition count 129
Applied a total of 42 rules in 31 ms. Remains 95 /116 variables (removed 21) and now considering 129/150 (removed 21) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 32 ms. Remains : 95/116 places, 129/150 transitions.
[2023-03-09 01:07:10] [INFO ] Flatten gal took : 14 ms
[2023-03-09 01:07:10] [INFO ] Flatten gal took : 18 ms
[2023-03-09 01:07:10] [INFO ] Input system was already deterministic with 129 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 116/116 places, 150/150 transitions.
Graph (complete) has 330 edges and 116 vertex of which 108 are kept as prefixes of interest. Removing 8 places using SCC suffix rule.2 ms
Discarding 8 places :
Also discarding 8 output transitions
Drop transitions removed 8 transitions
Reduce places removed 1 places and 1 transitions.
Reduce places removed 2 places and 0 transitions.
Graph (complete) has 120 edges and 105 vertex of which 85 are kept as prefixes of interest. Removing 20 places using SCC suffix rule.2 ms
Discarding 20 places :
Also discarding 20 output transitions
Drop transitions removed 20 transitions
Graph (trivial) has 96 edges and 85 vertex of which 48 / 85 are part of one of the 24 SCC in 5 ms
Free SCC test removed 24 places
Drop transitions removed 12 transitions
Trivial Post-agglo rules discarded 12 transitions
Performed 12 trivial Post agglomeration. Transition count delta: 12
Iterating post reduction 0 with 16 rules applied. Total rules applied 17 place count 61 transition count 109
Reduce places removed 12 places and 0 transitions.
Ensure Unique test removed 24 transitions
Reduce isomorphic transitions removed 24 transitions.
Iterating post reduction 1 with 36 rules applied. Total rules applied 53 place count 49 transition count 85
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 63 place count 39 transition count 65
Iterating global reduction 2 with 10 rules applied. Total rules applied 73 place count 39 transition count 65
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 83 place count 29 transition count 45
Iterating global reduction 2 with 10 rules applied. Total rules applied 93 place count 29 transition count 45
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 103 place count 19 transition count 25
Iterating global reduction 2 with 10 rules applied. Total rules applied 113 place count 19 transition count 25
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 123 place count 9 transition count 15
Iterating global reduction 2 with 10 rules applied. Total rules applied 133 place count 9 transition count 15
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 134 place count 9 transition count 14
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 1 rules applied. Total rules applied 135 place count 9 transition count 13
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 136 place count 8 transition count 13
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 138 place count 6 transition count 11
Applied a total of 138 rules in 37 ms. Remains 6 /116 variables (removed 110) and now considering 11/150 (removed 139) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 37 ms. Remains : 6/116 places, 11/150 transitions.
[2023-03-09 01:07:10] [INFO ] Flatten gal took : 2 ms
[2023-03-09 01:07:10] [INFO ] Flatten gal took : 1 ms
[2023-03-09 01:07:10] [INFO ] Input system was already deterministic with 11 transitions.
Finished random walk after 27 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=27 )
FORMULA DiscoveryGPU-PT-12a-CTLFireability-01 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 116/116 places, 150/150 transitions.
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 10 place count 106 transition count 140
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 106 transition count 140
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 27 place count 99 transition count 133
Iterating global reduction 0 with 7 rules applied. Total rules applied 34 place count 99 transition count 133
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 39 place count 94 transition count 128
Iterating global reduction 0 with 5 rules applied. Total rules applied 44 place count 94 transition count 128
Applied a total of 44 rules in 25 ms. Remains 94 /116 variables (removed 22) and now considering 128/150 (removed 22) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 26 ms. Remains : 94/116 places, 128/150 transitions.
[2023-03-09 01:07:10] [INFO ] Flatten gal took : 12 ms
[2023-03-09 01:07:10] [INFO ] Flatten gal took : 13 ms
[2023-03-09 01:07:10] [INFO ] Input system was already deterministic with 128 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 116/116 places, 150/150 transitions.
Graph (complete) has 330 edges and 116 vertex of which 110 are kept as prefixes of interest. Removing 6 places using SCC suffix rule.1 ms
Discarding 6 places :
Also discarding 6 output transitions
Drop transitions removed 6 transitions
Performed 8 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 8 Pre rules applied. Total rules applied 1 place count 110 transition count 136
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 0 with 16 rules applied. Total rules applied 17 place count 102 transition count 136
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 26 place count 93 transition count 127
Iterating global reduction 0 with 9 rules applied. Total rules applied 35 place count 93 transition count 127
Applied a total of 35 rules in 34 ms. Remains 93 /116 variables (removed 23) and now considering 127/150 (removed 23) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 34 ms. Remains : 93/116 places, 127/150 transitions.
[2023-03-09 01:07:10] [INFO ] Flatten gal took : 13 ms
[2023-03-09 01:07:10] [INFO ] Flatten gal took : 13 ms
[2023-03-09 01:07:10] [INFO ] Input system was already deterministic with 127 transitions.
Starting structural reductions in LTL mode, iteration 0 : 116/116 places, 150/150 transitions.
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 10 place count 106 transition count 140
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 106 transition count 140
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 27 place count 99 transition count 133
Iterating global reduction 0 with 7 rules applied. Total rules applied 34 place count 99 transition count 133
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 39 place count 94 transition count 128
Iterating global reduction 0 with 5 rules applied. Total rules applied 44 place count 94 transition count 128
Applied a total of 44 rules in 15 ms. Remains 94 /116 variables (removed 22) and now considering 128/150 (removed 22) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 15 ms. Remains : 94/116 places, 128/150 transitions.
[2023-03-09 01:07:10] [INFO ] Flatten gal took : 11 ms
[2023-03-09 01:07:10] [INFO ] Flatten gal took : 12 ms
[2023-03-09 01:07:10] [INFO ] Input system was already deterministic with 128 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 116/116 places, 150/150 transitions.
Graph (complete) has 330 edges and 116 vertex of which 108 are kept as prefixes of interest. Removing 8 places using SCC suffix rule.2 ms
Discarding 8 places :
Also discarding 8 output transitions
Drop transitions removed 8 transitions
Reduce places removed 1 places and 1 transitions.
Reduce places removed 2 places and 0 transitions.
Graph (complete) has 120 edges and 105 vertex of which 84 are kept as prefixes of interest. Removing 21 places using SCC suffix rule.1 ms
Discarding 21 places :
Also discarding 21 output transitions
Drop transitions removed 21 transitions
Graph (trivial) has 94 edges and 84 vertex of which 48 / 84 are part of one of the 24 SCC in 0 ms
Free SCC test removed 24 places
Drop transitions removed 11 transitions
Trivial Post-agglo rules discarded 11 transitions
Performed 11 trivial Post agglomeration. Transition count delta: 11
Iterating post reduction 0 with 15 rules applied. Total rules applied 16 place count 60 transition count 109
Reduce places removed 11 places and 0 transitions.
Ensure Unique test removed 24 transitions
Reduce isomorphic transitions removed 24 transitions.
Iterating post reduction 1 with 35 rules applied. Total rules applied 51 place count 49 transition count 85
Discarding 11 places :
Symmetric choice reduction at 2 with 11 rule applications. Total rules 62 place count 38 transition count 63
Iterating global reduction 2 with 11 rules applied. Total rules applied 73 place count 38 transition count 63
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 83 place count 28 transition count 43
Iterating global reduction 2 with 10 rules applied. Total rules applied 93 place count 28 transition count 43
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 103 place count 18 transition count 23
Iterating global reduction 2 with 10 rules applied. Total rules applied 113 place count 18 transition count 23
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 123 place count 8 transition count 13
Iterating global reduction 2 with 10 rules applied. Total rules applied 133 place count 8 transition count 13
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 2 with 2 rules applied. Total rules applied 135 place count 8 transition count 11
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 1 rules applied. Total rules applied 136 place count 8 transition count 10
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 137 place count 7 transition count 10
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 139 place count 5 transition count 8
Applied a total of 139 rules in 17 ms. Remains 5 /116 variables (removed 111) and now considering 8/150 (removed 142) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 5/116 places, 8/150 transitions.
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 0 ms
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 1 ms
[2023-03-09 01:07:11] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 116/116 places, 150/150 transitions.
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 11 place count 105 transition count 139
Iterating global reduction 0 with 11 rules applied. Total rules applied 22 place count 105 transition count 139
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 29 place count 98 transition count 132
Iterating global reduction 0 with 7 rules applied. Total rules applied 36 place count 98 transition count 132
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 41 place count 93 transition count 127
Iterating global reduction 0 with 5 rules applied. Total rules applied 46 place count 93 transition count 127
Applied a total of 46 rules in 10 ms. Remains 93 /116 variables (removed 23) and now considering 127/150 (removed 23) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 93/116 places, 127/150 transitions.
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 10 ms
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 10 ms
[2023-03-09 01:07:11] [INFO ] Input system was already deterministic with 127 transitions.
Starting structural reductions in LTL mode, iteration 0 : 116/116 places, 150/150 transitions.
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 11 place count 105 transition count 139
Iterating global reduction 0 with 11 rules applied. Total rules applied 22 place count 105 transition count 139
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 30 place count 97 transition count 131
Iterating global reduction 0 with 8 rules applied. Total rules applied 38 place count 97 transition count 131
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 45 place count 90 transition count 124
Iterating global reduction 0 with 7 rules applied. Total rules applied 52 place count 90 transition count 124
Applied a total of 52 rules in 10 ms. Remains 90 /116 variables (removed 26) and now considering 124/150 (removed 26) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 90/116 places, 124/150 transitions.
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 9 ms
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 9 ms
[2023-03-09 01:07:11] [INFO ] Input system was already deterministic with 124 transitions.
Starting structural reductions in LTL mode, iteration 0 : 116/116 places, 150/150 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 107 transition count 141
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 107 transition count 141
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 26 place count 99 transition count 133
Iterating global reduction 0 with 8 rules applied. Total rules applied 34 place count 99 transition count 133
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 37 place count 96 transition count 130
Iterating global reduction 0 with 3 rules applied. Total rules applied 40 place count 96 transition count 130
Applied a total of 40 rules in 7 ms. Remains 96 /116 variables (removed 20) and now considering 130/150 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 96/116 places, 130/150 transitions.
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 9 ms
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 10 ms
[2023-03-09 01:07:11] [INFO ] Input system was already deterministic with 130 transitions.
Starting structural reductions in LTL mode, iteration 0 : 116/116 places, 150/150 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 107 transition count 141
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 107 transition count 141
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 24 place count 101 transition count 135
Iterating global reduction 0 with 6 rules applied. Total rules applied 30 place count 101 transition count 135
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 35 place count 96 transition count 130
Iterating global reduction 0 with 5 rules applied. Total rules applied 40 place count 96 transition count 130
Applied a total of 40 rules in 7 ms. Remains 96 /116 variables (removed 20) and now considering 130/150 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 96/116 places, 130/150 transitions.
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 10 ms
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 10 ms
[2023-03-09 01:07:11] [INFO ] Input system was already deterministic with 130 transitions.
Starting structural reductions in LTL mode, iteration 0 : 116/116 places, 150/150 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 108 transition count 142
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 108 transition count 142
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 22 place count 102 transition count 136
Iterating global reduction 0 with 6 rules applied. Total rules applied 28 place count 102 transition count 136
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 34 place count 96 transition count 130
Iterating global reduction 0 with 6 rules applied. Total rules applied 40 place count 96 transition count 130
Applied a total of 40 rules in 7 ms. Remains 96 /116 variables (removed 20) and now considering 130/150 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 96/116 places, 130/150 transitions.
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 9 ms
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 10 ms
[2023-03-09 01:07:11] [INFO ] Input system was already deterministic with 130 transitions.
Starting structural reductions in LTL mode, iteration 0 : 116/116 places, 150/150 transitions.
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 10 place count 106 transition count 140
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 106 transition count 140
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 27 place count 99 transition count 133
Iterating global reduction 0 with 7 rules applied. Total rules applied 34 place count 99 transition count 133
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 40 place count 93 transition count 127
Iterating global reduction 0 with 6 rules applied. Total rules applied 46 place count 93 transition count 127
Applied a total of 46 rules in 7 ms. Remains 93 /116 variables (removed 23) and now considering 127/150 (removed 23) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 93/116 places, 127/150 transitions.
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 9 ms
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 9 ms
[2023-03-09 01:07:11] [INFO ] Input system was already deterministic with 127 transitions.
Starting structural reductions in LTL mode, iteration 0 : 116/116 places, 150/150 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 107 transition count 141
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 107 transition count 141
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 24 place count 101 transition count 135
Iterating global reduction 0 with 6 rules applied. Total rules applied 30 place count 101 transition count 135
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 36 place count 95 transition count 129
Iterating global reduction 0 with 6 rules applied. Total rules applied 42 place count 95 transition count 129
Applied a total of 42 rules in 7 ms. Remains 95 /116 variables (removed 21) and now considering 129/150 (removed 21) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 95/116 places, 129/150 transitions.
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 9 ms
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 10 ms
[2023-03-09 01:07:11] [INFO ] Input system was already deterministic with 129 transitions.
Starting structural reductions in LTL mode, iteration 0 : 116/116 places, 150/150 transitions.
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 11 place count 105 transition count 139
Iterating global reduction 0 with 11 rules applied. Total rules applied 22 place count 105 transition count 139
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 30 place count 97 transition count 131
Iterating global reduction 0 with 8 rules applied. Total rules applied 38 place count 97 transition count 131
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 45 place count 90 transition count 124
Iterating global reduction 0 with 7 rules applied. Total rules applied 52 place count 90 transition count 124
Applied a total of 52 rules in 7 ms. Remains 90 /116 variables (removed 26) and now considering 124/150 (removed 26) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 90/116 places, 124/150 transitions.
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 9 ms
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 9 ms
[2023-03-09 01:07:11] [INFO ] Input system was already deterministic with 124 transitions.
Starting structural reductions in LTL mode, iteration 0 : 116/116 places, 150/150 transitions.
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 11 place count 105 transition count 139
Iterating global reduction 0 with 11 rules applied. Total rules applied 22 place count 105 transition count 139
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 30 place count 97 transition count 131
Iterating global reduction 0 with 8 rules applied. Total rules applied 38 place count 97 transition count 131
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 45 place count 90 transition count 124
Iterating global reduction 0 with 7 rules applied. Total rules applied 52 place count 90 transition count 124
Applied a total of 52 rules in 9 ms. Remains 90 /116 variables (removed 26) and now considering 124/150 (removed 26) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 90/116 places, 124/150 transitions.
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 7 ms
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 5 ms
[2023-03-09 01:07:11] [INFO ] Input system was already deterministic with 124 transitions.
Starting structural reductions in LTL mode, iteration 0 : 116/116 places, 150/150 transitions.
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 11 place count 105 transition count 139
Iterating global reduction 0 with 11 rules applied. Total rules applied 22 place count 105 transition count 139
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 30 place count 97 transition count 131
Iterating global reduction 0 with 8 rules applied. Total rules applied 38 place count 97 transition count 131
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 45 place count 90 transition count 124
Iterating global reduction 0 with 7 rules applied. Total rules applied 52 place count 90 transition count 124
Applied a total of 52 rules in 4 ms. Remains 90 /116 variables (removed 26) and now considering 124/150 (removed 26) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 90/116 places, 124/150 transitions.
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 7 ms
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 4 ms
[2023-03-09 01:07:11] [INFO ] Input system was already deterministic with 124 transitions.
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 6 ms
[2023-03-09 01:07:11] [INFO ] Flatten gal took : 6 ms
[2023-03-09 01:07:11] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-03-09 01:07:11] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 116 places, 150 transitions and 479 arcs took 1 ms.
Total runtime 3859 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DiscoveryGPU-PT-12a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372
CTLFireability

FORMULA DiscoveryGPU-PT-12a-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-12a-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-12a-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-12a-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-12a-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-12a-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-12a-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-12a-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-12a-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-12a-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-12a-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678324468260

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 61 (type SKEL/SRCH) for 51 DiscoveryGPU-PT-12a-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 61 (type SKEL/SRCH) for DiscoveryGPU-PT-12a-CTLFireability-14
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 10 (type EXCL) for 3 DiscoveryGPU-PT-12a-CTLFireability-02
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for DiscoveryGPU-PT-12a-CTLFireability-02
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 22 (type EXCL) for 21 DiscoveryGPU-PT-12a-CTLFireability-04
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: planning for (null) stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:746
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-12a-CTLFireability-14: CONJ false skeleton: CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-12a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLFireability-02: DISJ 0 3 0 0 5 0 0 0
DiscoveryGPU-PT-12a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLFireability-05: AGEFAG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 5/225 2/32 DiscoveryGPU-PT-12a-CTLFireability-04 310116 m, 62023 m/sec, 4166217 t fired, .

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DiscoveryGPU-PT-12a-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
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DiscoveryGPU-PT-12a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 10/225 3/32 DiscoveryGPU-PT-12a-CTLFireability-04 582214 m, 54419 m/sec, 8342275 t fired, .

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DiscoveryGPU-PT-12a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
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DiscoveryGPU-PT-12a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 15/225 4/32 DiscoveryGPU-PT-12a-CTLFireability-04 858178 m, 55192 m/sec, 12449739 t fired, .

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22 CTL EXCL 20/225 5/32 DiscoveryGPU-PT-12a-CTLFireability-04 1147908 m, 57946 m/sec, 16564361 t fired, .

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22 CTL EXCL 25/225 7/32 DiscoveryGPU-PT-12a-CTLFireability-04 1417903 m, 53999 m/sec, 20646571 t fired, .

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22 CTL EXCL 30/225 7/32 DiscoveryGPU-PT-12a-CTLFireability-04 1646959 m, 45811 m/sec, 24514786 t fired, .

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22 CTL EXCL 35/225 9/32 DiscoveryGPU-PT-12a-CTLFireability-04 1886020 m, 47812 m/sec, 28483542 t fired, .

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22 CTL EXCL 40/225 10/32 DiscoveryGPU-PT-12a-CTLFireability-04 2138140 m, 50424 m/sec, 32592605 t fired, .

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22 CTL EXCL 45/225 11/32 DiscoveryGPU-PT-12a-CTLFireability-04 2364462 m, 45264 m/sec, 36614444 t fired, .

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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DiscoveryGPU-PT-12a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DiscoveryGPU-PT-12a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r135-smll-167819414200378"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DiscoveryGPU-PT-12a.tgz
mv DiscoveryGPU-PT-12a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;