About the Execution of LoLa+red for DiscoveryGPU-PT-12a
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
2342.556 | 453484.00 | 450336.00 | 2027.30 | ?TT??FTTF??FFFTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r135-smll-167819414200377.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DiscoveryGPU-PT-12a, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r135-smll-167819414200377
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 428K
-rw-r--r-- 1 mcc users 7.7K Feb 25 13:34 CTLCardinality.txt
-rw-r--r-- 1 mcc users 88K Feb 25 13:34 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 25 13:29 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K Feb 25 13:29 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:00 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:00 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 6.3K Feb 25 13:35 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 60K Feb 25 13:35 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.0K Feb 25 13:35 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 25 13:35 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:00 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:00 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 43K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DiscoveryGPU-PT-12a-CTLCardinality-00
FORMULA_NAME DiscoveryGPU-PT-12a-CTLCardinality-01
FORMULA_NAME DiscoveryGPU-PT-12a-CTLCardinality-02
FORMULA_NAME DiscoveryGPU-PT-12a-CTLCardinality-03
FORMULA_NAME DiscoveryGPU-PT-12a-CTLCardinality-04
FORMULA_NAME DiscoveryGPU-PT-12a-CTLCardinality-05
FORMULA_NAME DiscoveryGPU-PT-12a-CTLCardinality-06
FORMULA_NAME DiscoveryGPU-PT-12a-CTLCardinality-07
FORMULA_NAME DiscoveryGPU-PT-12a-CTLCardinality-08
FORMULA_NAME DiscoveryGPU-PT-12a-CTLCardinality-09
FORMULA_NAME DiscoveryGPU-PT-12a-CTLCardinality-10
FORMULA_NAME DiscoveryGPU-PT-12a-CTLCardinality-11
FORMULA_NAME DiscoveryGPU-PT-12a-CTLCardinality-12
FORMULA_NAME DiscoveryGPU-PT-12a-CTLCardinality-13
FORMULA_NAME DiscoveryGPU-PT-12a-CTLCardinality-14
FORMULA_NAME DiscoveryGPU-PT-12a-CTLCardinality-15
=== Now, execution of the tool begins
BK_START 1678323926785
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DiscoveryGPU-PT-12a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 01:05:30] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-09 01:05:30] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 01:05:30] [INFO ] Load time of PNML (sax parser for PT used): 109 ms
[2023-03-09 01:05:30] [INFO ] Transformed 123 places.
[2023-03-09 01:05:30] [INFO ] Transformed 169 transitions.
[2023-03-09 01:05:30] [INFO ] Found NUPN structural information;
[2023-03-09 01:05:30] [INFO ] Parsed PT model containing 123 places and 169 transitions and 543 arcs in 259 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 28 ms.
FORMULA DiscoveryGPU-PT-12a-CTLCardinality-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 82 out of 123 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 123/123 places, 169/169 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 120 transition count 166
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 120 transition count 166
Drop transitions removed 12 transitions
Redundant transition composition rules discarded 12 transitions
Iterating global reduction 0 with 12 rules applied. Total rules applied 18 place count 120 transition count 154
Applied a total of 18 rules in 44 ms. Remains 120 /123 variables (removed 3) and now considering 154/169 (removed 15) transitions.
// Phase 1: matrix 154 rows 120 cols
[2023-03-09 01:05:31] [INFO ] Computed 2 place invariants in 8 ms
[2023-03-09 01:05:31] [INFO ] Implicit Places using invariants in 354 ms returned []
[2023-03-09 01:05:31] [INFO ] Invariant cache hit.
[2023-03-09 01:05:31] [INFO ] State equation strengthened by 96 read => feed constraints.
[2023-03-09 01:05:31] [INFO ] Implicit Places using invariants and state equation in 372 ms returned [118]
Discarding 1 places :
Implicit Place search using SMT with State Equation took 810 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 119/123 places, 154/169 transitions.
Applied a total of 0 rules in 4 ms. Remains 119 /119 variables (removed 0) and now considering 154/154 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 858 ms. Remains : 119/123 places, 154/169 transitions.
Support contains 82 out of 119 places after structural reductions.
[2023-03-09 01:05:32] [INFO ] Flatten gal took : 71 ms
[2023-03-09 01:05:32] [INFO ] Flatten gal took : 26 ms
[2023-03-09 01:05:32] [INFO ] Input system was already deterministic with 154 transitions.
Support contains 77 out of 119 places (down from 82) after GAL structural reductions.
Finished random walk after 5924 steps, including 46 resets, run visited all 68 properties in 316 ms. (steps per millisecond=18 )
[2023-03-09 01:05:32] [INFO ] Flatten gal took : 15 ms
[2023-03-09 01:05:32] [INFO ] Flatten gal took : 16 ms
[2023-03-09 01:05:32] [INFO ] Input system was already deterministic with 154 transitions.
Computed a total of 14 stabilizing places and 13 stable transitions
Graph (complete) has 194 edges and 119 vertex of which 86 are kept as prefixes of interest. Removing 33 places using SCC suffix rule.5 ms
Starting structural reductions in LTL mode, iteration 0 : 119/119 places, 154/154 transitions.
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 11 place count 108 transition count 143
Iterating global reduction 0 with 11 rules applied. Total rules applied 22 place count 108 transition count 143
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 32 place count 98 transition count 133
Iterating global reduction 0 with 10 rules applied. Total rules applied 42 place count 98 transition count 133
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 49 place count 91 transition count 126
Iterating global reduction 0 with 7 rules applied. Total rules applied 56 place count 91 transition count 126
Applied a total of 56 rules in 30 ms. Remains 91 /119 variables (removed 28) and now considering 126/154 (removed 28) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 30 ms. Remains : 91/119 places, 126/154 transitions.
[2023-03-09 01:05:32] [INFO ] Flatten gal took : 10 ms
[2023-03-09 01:05:32] [INFO ] Flatten gal took : 11 ms
[2023-03-09 01:05:32] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 119/119 places, 154/154 transitions.
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 10 place count 109 transition count 144
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 109 transition count 144
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 30 place count 99 transition count 134
Iterating global reduction 0 with 10 rules applied. Total rules applied 40 place count 99 transition count 134
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 45 place count 94 transition count 129
Iterating global reduction 0 with 5 rules applied. Total rules applied 50 place count 94 transition count 129
Applied a total of 50 rules in 21 ms. Remains 94 /119 variables (removed 25) and now considering 129/154 (removed 25) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 21 ms. Remains : 94/119 places, 129/154 transitions.
[2023-03-09 01:05:32] [INFO ] Flatten gal took : 10 ms
[2023-03-09 01:05:32] [INFO ] Flatten gal took : 11 ms
[2023-03-09 01:05:32] [INFO ] Input system was already deterministic with 129 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 119/119 places, 154/154 transitions.
Graph (trivial) has 102 edges and 119 vertex of which 44 / 119 are part of one of the 22 SCC in 5 ms
Free SCC test removed 22 places
Ensure Unique test removed 22 transitions
Reduce isomorphic transitions removed 22 transitions.
Graph (complete) has 172 edges and 97 vertex of which 65 are kept as prefixes of interest. Removing 32 places using SCC suffix rule.2 ms
Discarding 32 places :
Also discarding 32 output transitions
Drop transitions removed 32 transitions
Reduce places removed 1 places and 1 transitions.
Reduce places removed 1 places and 0 transitions.
Drop transitions removed 12 transitions
Trivial Post-agglo rules discarded 12 transitions
Performed 12 trivial Post agglomeration. Transition count delta: 12
Iterating post reduction 0 with 13 rules applied. Total rules applied 15 place count 63 transition count 87
Reduce places removed 12 places and 0 transitions.
Iterating post reduction 1 with 12 rules applied. Total rules applied 27 place count 51 transition count 87
Discarding 9 places :
Symmetric choice reduction at 2 with 9 rule applications. Total rules 36 place count 42 transition count 69
Iterating global reduction 2 with 9 rules applied. Total rules applied 45 place count 42 transition count 69
Discarding 9 places :
Symmetric choice reduction at 2 with 9 rule applications. Total rules 54 place count 33 transition count 51
Iterating global reduction 2 with 9 rules applied. Total rules applied 63 place count 33 transition count 51
Discarding 8 places :
Symmetric choice reduction at 2 with 8 rule applications. Total rules 71 place count 25 transition count 35
Iterating global reduction 2 with 8 rules applied. Total rules applied 79 place count 25 transition count 35
Discarding 8 places :
Symmetric choice reduction at 2 with 8 rule applications. Total rules 87 place count 17 transition count 27
Iterating global reduction 2 with 8 rules applied. Total rules applied 95 place count 17 transition count 27
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 96 place count 17 transition count 26
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 98 place count 16 transition count 25
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 99 place count 16 transition count 25
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 100 place count 15 transition count 24
Iterating global reduction 2 with 1 rules applied. Total rules applied 101 place count 15 transition count 24
Reduce places removed 3 places and 3 transitions.
Iterating global reduction 2 with 3 rules applied. Total rules applied 104 place count 12 transition count 21
Applied a total of 104 rules in 41 ms. Remains 12 /119 variables (removed 107) and now considering 21/154 (removed 133) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 41 ms. Remains : 12/119 places, 21/154 transitions.
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 1 ms
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 2 ms
[2023-03-09 01:05:33] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 119/119 places, 154/154 transitions.
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 10 place count 109 transition count 144
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 109 transition count 144
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 28 place count 101 transition count 136
Iterating global reduction 0 with 8 rules applied. Total rules applied 36 place count 101 transition count 136
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 41 place count 96 transition count 131
Iterating global reduction 0 with 5 rules applied. Total rules applied 46 place count 96 transition count 131
Applied a total of 46 rules in 10 ms. Remains 96 /119 variables (removed 23) and now considering 131/154 (removed 23) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 96/119 places, 131/154 transitions.
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 10 ms
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 9 ms
[2023-03-09 01:05:33] [INFO ] Input system was already deterministic with 131 transitions.
Starting structural reductions in LTL mode, iteration 0 : 119/119 places, 154/154 transitions.
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 11 place count 108 transition count 143
Iterating global reduction 0 with 11 rules applied. Total rules applied 22 place count 108 transition count 143
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 33 place count 97 transition count 132
Iterating global reduction 0 with 11 rules applied. Total rules applied 44 place count 97 transition count 132
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 52 place count 89 transition count 124
Iterating global reduction 0 with 8 rules applied. Total rules applied 60 place count 89 transition count 124
Applied a total of 60 rules in 10 ms. Remains 89 /119 variables (removed 30) and now considering 124/154 (removed 30) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 89/119 places, 124/154 transitions.
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 8 ms
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 9 ms
[2023-03-09 01:05:33] [INFO ] Input system was already deterministic with 124 transitions.
Starting structural reductions in LTL mode, iteration 0 : 119/119 places, 154/154 transitions.
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 10 place count 109 transition count 144
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 109 transition count 144
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 30 place count 99 transition count 134
Iterating global reduction 0 with 10 rules applied. Total rules applied 40 place count 99 transition count 134
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 46 place count 93 transition count 128
Iterating global reduction 0 with 6 rules applied. Total rules applied 52 place count 93 transition count 128
Applied a total of 52 rules in 9 ms. Remains 93 /119 variables (removed 26) and now considering 128/154 (removed 26) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 93/119 places, 128/154 transitions.
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 9 ms
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 10 ms
[2023-03-09 01:05:33] [INFO ] Input system was already deterministic with 128 transitions.
Starting structural reductions in LTL mode, iteration 0 : 119/119 places, 154/154 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 110 transition count 145
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 110 transition count 145
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 26 place count 102 transition count 137
Iterating global reduction 0 with 8 rules applied. Total rules applied 34 place count 102 transition count 137
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 39 place count 97 transition count 132
Iterating global reduction 0 with 5 rules applied. Total rules applied 44 place count 97 transition count 132
Applied a total of 44 rules in 9 ms. Remains 97 /119 variables (removed 22) and now considering 132/154 (removed 22) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 97/119 places, 132/154 transitions.
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 9 ms
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 9 ms
[2023-03-09 01:05:33] [INFO ] Input system was already deterministic with 132 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 119/119 places, 154/154 transitions.
Graph (trivial) has 107 edges and 119 vertex of which 48 / 119 are part of one of the 24 SCC in 0 ms
Free SCC test removed 24 places
Ensure Unique test removed 24 transitions
Reduce isomorphic transitions removed 24 transitions.
Graph (complete) has 170 edges and 95 vertex of which 65 are kept as prefixes of interest. Removing 30 places using SCC suffix rule.1 ms
Discarding 30 places :
Also discarding 30 output transitions
Drop transitions removed 30 transitions
Reduce places removed 1 places and 1 transitions.
Reduce places removed 1 places and 0 transitions.
Drop transitions removed 13 transitions
Trivial Post-agglo rules discarded 13 transitions
Performed 13 trivial Post agglomeration. Transition count delta: 13
Iterating post reduction 0 with 14 rules applied. Total rules applied 16 place count 63 transition count 86
Reduce places removed 13 places and 0 transitions.
Iterating post reduction 1 with 13 rules applied. Total rules applied 29 place count 50 transition count 86
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 39 place count 40 transition count 66
Iterating global reduction 2 with 10 rules applied. Total rules applied 49 place count 40 transition count 66
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 59 place count 30 transition count 46
Iterating global reduction 2 with 10 rules applied. Total rules applied 69 place count 30 transition count 46
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 79 place count 20 transition count 26
Iterating global reduction 2 with 10 rules applied. Total rules applied 89 place count 20 transition count 26
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 99 place count 10 transition count 16
Iterating global reduction 2 with 10 rules applied. Total rules applied 109 place count 10 transition count 16
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 110 place count 10 transition count 15
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 1 rules applied. Total rules applied 111 place count 10 transition count 14
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 112 place count 9 transition count 14
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 114 place count 7 transition count 12
Applied a total of 114 rules in 14 ms. Remains 7 /119 variables (removed 112) and now considering 12/154 (removed 142) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 7/119 places, 12/154 transitions.
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 1 ms
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 1 ms
[2023-03-09 01:05:33] [INFO ] Input system was already deterministic with 12 transitions.
Finished random walk after 109 steps, including 3 resets, run visited all 1 properties in 2 ms. (steps per millisecond=54 )
FORMULA DiscoveryGPU-PT-12a-CTLCardinality-07 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 119/119 places, 154/154 transitions.
Graph (trivial) has 99 edges and 119 vertex of which 42 / 119 are part of one of the 21 SCC in 1 ms
Free SCC test removed 21 places
Ensure Unique test removed 21 transitions
Reduce isomorphic transitions removed 21 transitions.
Graph (complete) has 173 edges and 98 vertex of which 67 are kept as prefixes of interest. Removing 31 places using SCC suffix rule.1 ms
Discarding 31 places :
Also discarding 31 output transitions
Drop transitions removed 31 transitions
Reduce places removed 1 places and 1 transitions.
Reduce places removed 1 places and 0 transitions.
Drop transitions removed 11 transitions
Trivial Post-agglo rules discarded 11 transitions
Performed 11 trivial Post agglomeration. Transition count delta: 11
Iterating post reduction 0 with 12 rules applied. Total rules applied 14 place count 65 transition count 90
Reduce places removed 11 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 12 rules applied. Total rules applied 26 place count 54 transition count 89
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 27 place count 53 transition count 89
Discarding 9 places :
Symmetric choice reduction at 3 with 9 rule applications. Total rules 36 place count 44 transition count 71
Iterating global reduction 3 with 9 rules applied. Total rules applied 45 place count 44 transition count 71
Discarding 8 places :
Symmetric choice reduction at 3 with 8 rule applications. Total rules 53 place count 36 transition count 55
Iterating global reduction 3 with 8 rules applied. Total rules applied 61 place count 36 transition count 55
Discarding 7 places :
Symmetric choice reduction at 3 with 7 rule applications. Total rules 68 place count 29 transition count 41
Iterating global reduction 3 with 7 rules applied. Total rules applied 75 place count 29 transition count 41
Discarding 7 places :
Symmetric choice reduction at 3 with 7 rule applications. Total rules 82 place count 22 transition count 34
Iterating global reduction 3 with 7 rules applied. Total rules applied 89 place count 22 transition count 34
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 90 place count 22 transition count 33
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 92 place count 21 transition count 32
Reduce places removed 5 places and 5 transitions.
Iterating global reduction 3 with 5 rules applied. Total rules applied 97 place count 16 transition count 27
Applied a total of 97 rules in 18 ms. Remains 16 /119 variables (removed 103) and now considering 27/154 (removed 127) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 16/119 places, 27/154 transitions.
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 1 ms
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 2 ms
[2023-03-09 01:05:33] [INFO ] Input system was already deterministic with 27 transitions.
Starting structural reductions in LTL mode, iteration 0 : 119/119 places, 154/154 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 111 transition count 146
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 111 transition count 146
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 22 place count 105 transition count 140
Iterating global reduction 0 with 6 rules applied. Total rules applied 28 place count 105 transition count 140
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 33 place count 100 transition count 135
Iterating global reduction 0 with 5 rules applied. Total rules applied 38 place count 100 transition count 135
Applied a total of 38 rules in 8 ms. Remains 100 /119 variables (removed 19) and now considering 135/154 (removed 19) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 100/119 places, 135/154 transitions.
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 9 ms
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 9 ms
[2023-03-09 01:05:33] [INFO ] Input system was already deterministic with 135 transitions.
Starting structural reductions in LTL mode, iteration 0 : 119/119 places, 154/154 transitions.
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 10 place count 109 transition count 144
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 109 transition count 144
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 29 place count 100 transition count 135
Iterating global reduction 0 with 9 rules applied. Total rules applied 38 place count 100 transition count 135
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 43 place count 95 transition count 130
Iterating global reduction 0 with 5 rules applied. Total rules applied 48 place count 95 transition count 130
Applied a total of 48 rules in 6 ms. Remains 95 /119 variables (removed 24) and now considering 130/154 (removed 24) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 95/119 places, 130/154 transitions.
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 6 ms
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 7 ms
[2023-03-09 01:05:33] [INFO ] Input system was already deterministic with 130 transitions.
Starting structural reductions in LTL mode, iteration 0 : 119/119 places, 154/154 transitions.
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 11 place count 108 transition count 143
Iterating global reduction 0 with 11 rules applied. Total rules applied 22 place count 108 transition count 143
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 33 place count 97 transition count 132
Iterating global reduction 0 with 11 rules applied. Total rules applied 44 place count 97 transition count 132
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 52 place count 89 transition count 124
Iterating global reduction 0 with 8 rules applied. Total rules applied 60 place count 89 transition count 124
Applied a total of 60 rules in 5 ms. Remains 89 /119 variables (removed 30) and now considering 124/154 (removed 30) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 89/119 places, 124/154 transitions.
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 6 ms
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 6 ms
[2023-03-09 01:05:33] [INFO ] Input system was already deterministic with 124 transitions.
Starting structural reductions in LTL mode, iteration 0 : 119/119 places, 154/154 transitions.
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 10 place count 109 transition count 144
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 109 transition count 144
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 29 place count 100 transition count 135
Iterating global reduction 0 with 9 rules applied. Total rules applied 38 place count 100 transition count 135
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 44 place count 94 transition count 129
Iterating global reduction 0 with 6 rules applied. Total rules applied 50 place count 94 transition count 129
Applied a total of 50 rules in 5 ms. Remains 94 /119 variables (removed 25) and now considering 129/154 (removed 25) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 94/119 places, 129/154 transitions.
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 6 ms
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 6 ms
[2023-03-09 01:05:33] [INFO ] Input system was already deterministic with 129 transitions.
Starting structural reductions in LTL mode, iteration 0 : 119/119 places, 154/154 transitions.
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 10 place count 109 transition count 144
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 109 transition count 144
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 30 place count 99 transition count 134
Iterating global reduction 0 with 10 rules applied. Total rules applied 40 place count 99 transition count 134
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 47 place count 92 transition count 127
Iterating global reduction 0 with 7 rules applied. Total rules applied 54 place count 92 transition count 127
Applied a total of 54 rules in 5 ms. Remains 92 /119 variables (removed 27) and now considering 127/154 (removed 27) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 92/119 places, 127/154 transitions.
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 6 ms
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 7 ms
[2023-03-09 01:05:33] [INFO ] Input system was already deterministic with 127 transitions.
Starting structural reductions in LTL mode, iteration 0 : 119/119 places, 154/154 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 111 transition count 146
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 111 transition count 146
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 23 place count 104 transition count 139
Iterating global reduction 0 with 7 rules applied. Total rules applied 30 place count 104 transition count 139
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 35 place count 99 transition count 134
Iterating global reduction 0 with 5 rules applied. Total rules applied 40 place count 99 transition count 134
Applied a total of 40 rules in 5 ms. Remains 99 /119 variables (removed 20) and now considering 134/154 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 99/119 places, 134/154 transitions.
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 6 ms
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 7 ms
[2023-03-09 01:05:33] [INFO ] Input system was already deterministic with 134 transitions.
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 9 ms
[2023-03-09 01:05:33] [INFO ] Flatten gal took : 7 ms
[2023-03-09 01:05:33] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 4 ms.
[2023-03-09 01:05:33] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 119 places, 154 transitions and 347 arcs took 2 ms.
Total runtime 3079 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DiscoveryGPU-PT-12a
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
FORMULA DiscoveryGPU-PT-12a-CTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DiscoveryGPU-PT-12a-CTLCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DiscoveryGPU-PT-12a-CTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DiscoveryGPU-PT-12a-CTLCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DiscoveryGPU-PT-12a-CTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DiscoveryGPU-PT-12a-CTLCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DiscoveryGPU-PT-12a-CTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DiscoveryGPU-PT-12a-CTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DiscoveryGPU-PT-12a-CTLCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678324380269
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:662
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 59 (type EXCL) for 26 DiscoveryGPU-PT-12a-CTLCardinality-06
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 60 (type FNDP) for 33 DiscoveryGPU-PT-12a-CTLCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type EQUN) for 33 DiscoveryGPU-PT-12a-CTLCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type SRCH) for 33 DiscoveryGPU-PT-12a-CTLCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 63 (type SRCH) for DiscoveryGPU-PT-12a-CTLCardinality-08
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 59 (type EXCL) for DiscoveryGPU-PT-12a-CTLCardinality-06
lola: result : false
lola: markings : 47
lola: fired transitions : 75
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 15 DiscoveryGPU-PT-12a-CTLCardinality-05
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: FINISHED task # 60 (type FNDP) for DiscoveryGPU-PT-12a-CTLCardinality-08
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 61 (type EQUN) for DiscoveryGPU-PT-12a-CTLCardinality-08 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: LAUNCH task # 64 (type FNDP) for 15 DiscoveryGPU-PT-12a-CTLCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type EQUN) for 15 DiscoveryGPU-PT-12a-CTLCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SRCH) for 15 DiscoveryGPU-PT-12a-CTLCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 64 (type FNDP) for DiscoveryGPU-PT-12a-CTLCardinality-05
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 65 (type EQUN) for DiscoveryGPU-PT-12a-CTLCardinality-05 (obsolete)
lola: CANCELED task # 67 (type SRCH) for DiscoveryGPU-PT-12a-CTLCardinality-05 (obsolete)
lola: FINISHED task # 65 (type EQUN) for DiscoveryGPU-PT-12a-CTLCardinality-05
lola: result : unknown
lola: FINISHED task # 67 (type SRCH) for DiscoveryGPU-PT-12a-CTLCardinality-05
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/374/CTLCardinality-61.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 61 (type EQUN) for DiscoveryGPU-PT-12a-CTLCardinality-08
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 24 (type EXCL) for DiscoveryGPU-PT-12a-CTLCardinality-05
lola: result : false
lola: markings : 100385
lola: fired transitions : 601002
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 56 (type EXCL) for 55 DiscoveryGPU-PT-12a-CTLCardinality-15
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 56 (type EXCL) for DiscoveryGPU-PT-12a-CTLCardinality-15
lola: result : false
lola: markings : 40
lola: fired transitions : 74
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 53 (type EXCL) for 52 DiscoveryGPU-PT-12a-CTLCardinality-14
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 53 (type EXCL) for DiscoveryGPU-PT-12a-CTLCardinality-14
lola: result : true
lola: markings : 4
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 50 (type EXCL) for 49 DiscoveryGPU-PT-12a-CTLCardinality-13
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for DiscoveryGPU-PT-12a-CTLCardinality-13
lola: result : false
lola: markings : 248
lola: fired transitions : 447
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 DiscoveryGPU-PT-12a-CTLCardinality-12
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for DiscoveryGPU-PT-12a-CTLCardinality-12
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 43 DiscoveryGPU-PT-12a-CTLCardinality-10
lola: time limit : 399 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-12a-CTLCardinality-06: DISJ true LTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-12: CTL false CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-13: CTL false CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-14: CTL true CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-12a-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLCardinality-02: EFEG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLCardinality-05: DISJ 0 1 0 0 7 0 0 1
DiscoveryGPU-PT-12a-CTLCardinality-08: CONJ 0 1 0 0 5 0 0 1
DiscoveryGPU-PT-12a-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 4/399 2/32 DiscoveryGPU-PT-12a-CTLCardinality-10 362263 m, 72452 m/sec, 2502134 t fired, .
Time elapsed: 6 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-12a-CTLCardinality-06: DISJ true LTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-12: CTL false CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-13: CTL false CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-14: CTL true CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-12a-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLCardinality-02: EFEG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLCardinality-05: DISJ 0 1 0 0 7 0 0 1
DiscoveryGPU-PT-12a-CTLCardinality-08: CONJ 0 1 0 0 5 0 0 1
DiscoveryGPU-PT-12a-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 9/399 4/32 DiscoveryGPU-PT-12a-CTLCardinality-10 855513 m, 98650 m/sec, 6297208 t fired, .
Time elapsed: 11 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-12a-CTLCardinality-06: DISJ true LTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-12: CTL false CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-13: CTL false CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-14: CTL true CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-12a-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLCardinality-02: EFEG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-12a-CTLCardinality-05: DISJ 0 1 0 0 7 0 0 1
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DiscoveryGPU-PT-12a-CTLCardinality-02: EFEG true state space /EFEG
DiscoveryGPU-PT-12a-CTLCardinality-05: DISJ false DISJ
DiscoveryGPU-PT-12a-CTLCardinality-06: DISJ true LTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-08: CONJ false tscc_search
DiscoveryGPU-PT-12a-CTLCardinality-12: CTL false CTL model checker
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DiscoveryGPU-PT-12a-CTLCardinality-08: CONJ false tscc_search
DiscoveryGPU-PT-12a-CTLCardinality-12: CTL false CTL model checker
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DiscoveryGPU-PT-12a-CTLCardinality-06: DISJ true LTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-08: CONJ false tscc_search
DiscoveryGPU-PT-12a-CTLCardinality-12: CTL false CTL model checker
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DiscoveryGPU-PT-12a-CTLCardinality-05: DISJ false DISJ
DiscoveryGPU-PT-12a-CTLCardinality-06: DISJ true LTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-08: CONJ false tscc_search
DiscoveryGPU-PT-12a-CTLCardinality-12: CTL false CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-13: CTL false CTL model checker
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DiscoveryGPU-PT-12a-CTLCardinality-01: CTL true CTL model checker
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DiscoveryGPU-PT-12a-CTLCardinality-05: DISJ false DISJ
DiscoveryGPU-PT-12a-CTLCardinality-06: DISJ true LTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-08: CONJ false tscc_search
DiscoveryGPU-PT-12a-CTLCardinality-12: CTL false CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-13: CTL false CTL model checker
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DiscoveryGPU-PT-12a-CTLCardinality-06: DISJ true LTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-08: CONJ false tscc_search
DiscoveryGPU-PT-12a-CTLCardinality-12: CTL false CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-13: CTL false CTL model checker
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DiscoveryGPU-PT-12a-CTLCardinality-01: CTL true CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-02: EFEG true state space /EFEG
DiscoveryGPU-PT-12a-CTLCardinality-05: DISJ false DISJ
DiscoveryGPU-PT-12a-CTLCardinality-06: DISJ true LTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-08: CONJ false tscc_search
DiscoveryGPU-PT-12a-CTLCardinality-12: CTL false CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-13: CTL false CTL model checker
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DiscoveryGPU-PT-12a-CTLCardinality-01: CTL true CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-02: EFEG true state space /EFEG
DiscoveryGPU-PT-12a-CTLCardinality-05: DISJ false DISJ
DiscoveryGPU-PT-12a-CTLCardinality-06: DISJ true LTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-08: CONJ false tscc_search
DiscoveryGPU-PT-12a-CTLCardinality-12: CTL false CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-13: CTL false CTL model checker
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DiscoveryGPU-PT-12a-CTLCardinality-01: CTL true CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-02: EFEG true state space /EFEG
DiscoveryGPU-PT-12a-CTLCardinality-05: DISJ false DISJ
DiscoveryGPU-PT-12a-CTLCardinality-06: DISJ true LTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-08: CONJ false tscc_search
DiscoveryGPU-PT-12a-CTLCardinality-12: CTL false CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-13: CTL false CTL model checker
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DiscoveryGPU-PT-12a-CTLCardinality-01: CTL true CTL model checker
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DiscoveryGPU-PT-12a-CTLCardinality-06: DISJ true LTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-08: CONJ false tscc_search
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DiscoveryGPU-PT-12a-CTLCardinality-01: CTL true CTL model checker
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DiscoveryGPU-PT-12a-CTLCardinality-05: DISJ false DISJ
DiscoveryGPU-PT-12a-CTLCardinality-06: DISJ true LTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-08: CONJ false tscc_search
DiscoveryGPU-PT-12a-CTLCardinality-12: CTL false CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-13: CTL false CTL model checker
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FINAL RESULTS
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DiscoveryGPU-PT-12a-CTLCardinality-00: CTL unknown AGGR
DiscoveryGPU-PT-12a-CTLCardinality-01: CTL true CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-02: EFEG true state space /EFEG
DiscoveryGPU-PT-12a-CTLCardinality-03: CTL unknown AGGR
DiscoveryGPU-PT-12a-CTLCardinality-04: CTL unknown AGGR
DiscoveryGPU-PT-12a-CTLCardinality-05: DISJ false DISJ
DiscoveryGPU-PT-12a-CTLCardinality-06: DISJ true LTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-08: CONJ false tscc_search
DiscoveryGPU-PT-12a-CTLCardinality-09: CTL unknown AGGR
DiscoveryGPU-PT-12a-CTLCardinality-10: CTL unknown AGGR
DiscoveryGPU-PT-12a-CTLCardinality-12: CTL false CTL model checker
DiscoveryGPU-PT-12a-CTLCardinality-13: CTL false CTL model checker
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DiscoveryGPU-PT-12a"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DiscoveryGPU-PT-12a, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r135-smll-167819414200377"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DiscoveryGPU-PT-12a.tgz
mv DiscoveryGPU-PT-12a execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;