fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r135-smll-167819414100345
Last Updated
May 14, 2023

About the Execution of LoLa+red for DiscoveryGPU-PT-10a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
2367.455 3600000.00 358635.00 12121.90 ?FFF?F?TTTTFTFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r135-smll-167819414100345.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DiscoveryGPU-PT-10a, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r135-smll-167819414100345
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 580K
-rw-r--r-- 1 mcc users 6.6K Feb 25 13:39 CTLCardinality.txt
-rw-r--r-- 1 mcc users 73K Feb 25 13:39 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.8K Feb 25 13:35 CTLFireability.txt
-rw-r--r-- 1 mcc users 81K Feb 25 13:35 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Feb 25 15:59 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 25 15:59 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 16:00 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 13:41 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 145K Feb 25 13:41 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 25 13:40 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 105K Feb 25 13:40 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:00 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:00 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 36K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DiscoveryGPU-PT-10a-CTLCardinality-00
FORMULA_NAME DiscoveryGPU-PT-10a-CTLCardinality-01
FORMULA_NAME DiscoveryGPU-PT-10a-CTLCardinality-02
FORMULA_NAME DiscoveryGPU-PT-10a-CTLCardinality-03
FORMULA_NAME DiscoveryGPU-PT-10a-CTLCardinality-04
FORMULA_NAME DiscoveryGPU-PT-10a-CTLCardinality-05
FORMULA_NAME DiscoveryGPU-PT-10a-CTLCardinality-06
FORMULA_NAME DiscoveryGPU-PT-10a-CTLCardinality-07
FORMULA_NAME DiscoveryGPU-PT-10a-CTLCardinality-08
FORMULA_NAME DiscoveryGPU-PT-10a-CTLCardinality-09
FORMULA_NAME DiscoveryGPU-PT-10a-CTLCardinality-10
FORMULA_NAME DiscoveryGPU-PT-10a-CTLCardinality-11
FORMULA_NAME DiscoveryGPU-PT-10a-CTLCardinality-12
FORMULA_NAME DiscoveryGPU-PT-10a-CTLCardinality-13
FORMULA_NAME DiscoveryGPU-PT-10a-CTLCardinality-14
FORMULA_NAME DiscoveryGPU-PT-10a-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678318820426

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DiscoveryGPU-PT-10a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 23:40:24] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-08 23:40:24] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 23:40:24] [INFO ] Load time of PNML (sax parser for PT used): 98 ms
[2023-03-08 23:40:24] [INFO ] Transformed 103 places.
[2023-03-08 23:40:24] [INFO ] Transformed 141 transitions.
[2023-03-08 23:40:24] [INFO ] Found NUPN structural information;
[2023-03-08 23:40:24] [INFO ] Parsed PT model containing 103 places and 141 transitions and 453 arcs in 241 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 26 ms.
Support contains 66 out of 103 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 103/103 places, 141/141 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 101 transition count 139
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 101 transition count 139
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 100 transition count 138
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 100 transition count 138
Drop transitions removed 10 transitions
Redundant transition composition rules discarded 10 transitions
Iterating global reduction 0 with 10 rules applied. Total rules applied 16 place count 100 transition count 128
Applied a total of 16 rules in 44 ms. Remains 100 /103 variables (removed 3) and now considering 128/141 (removed 13) transitions.
// Phase 1: matrix 128 rows 100 cols
[2023-03-08 23:40:24] [INFO ] Computed 2 place invariants in 12 ms
[2023-03-08 23:40:24] [INFO ] Implicit Places using invariants in 376 ms returned []
[2023-03-08 23:40:24] [INFO ] Invariant cache hit.
[2023-03-08 23:40:25] [INFO ] State equation strengthened by 79 read => feed constraints.
[2023-03-08 23:40:25] [INFO ] Implicit Places using invariants and state equation in 301 ms returned [99]
Discarding 1 places :
Implicit Place search using SMT with State Equation took 739 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 99/103 places, 128/141 transitions.
Applied a total of 0 rules in 4 ms. Remains 99 /99 variables (removed 0) and now considering 128/128 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 790 ms. Remains : 99/103 places, 128/141 transitions.
Support contains 66 out of 99 places after structural reductions.
[2023-03-08 23:40:25] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
[2023-03-08 23:40:25] [INFO ] Flatten gal took : 67 ms
FORMULA DiscoveryGPU-PT-10a-CTLCardinality-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DiscoveryGPU-PT-10a-CTLCardinality-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-08 23:40:25] [INFO ] Flatten gal took : 28 ms
[2023-03-08 23:40:25] [INFO ] Input system was already deterministic with 128 transitions.
Support contains 54 out of 99 places (down from 66) after GAL structural reductions.
Finished random walk after 6182 steps, including 58 resets, run visited all 44 properties in 256 ms. (steps per millisecond=24 )
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 23 ms
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 16 ms
[2023-03-08 23:40:26] [INFO ] Input system was already deterministic with 128 transitions.
Computed a total of 12 stabilizing places and 11 stable transitions
Graph (complete) has 238 edges and 99 vertex of which 91 are kept as prefixes of interest. Removing 8 places using SCC suffix rule.4 ms
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 128/128 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 91 transition count 120
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 91 transition count 120
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 23 place count 84 transition count 113
Iterating global reduction 0 with 7 rules applied. Total rules applied 30 place count 84 transition count 113
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 35 place count 79 transition count 108
Iterating global reduction 0 with 5 rules applied. Total rules applied 40 place count 79 transition count 108
Applied a total of 40 rules in 22 ms. Remains 79 /99 variables (removed 20) and now considering 108/128 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 22 ms. Remains : 79/99 places, 108/128 transitions.
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 11 ms
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 23 ms
[2023-03-08 23:40:26] [INFO ] Input system was already deterministic with 108 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 128/128 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 92 transition count 121
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 92 transition count 121
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 19 place count 87 transition count 116
Iterating global reduction 0 with 5 rules applied. Total rules applied 24 place count 87 transition count 116
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 28 place count 83 transition count 112
Iterating global reduction 0 with 4 rules applied. Total rules applied 32 place count 83 transition count 112
Applied a total of 32 rules in 22 ms. Remains 83 /99 variables (removed 16) and now considering 112/128 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 22 ms. Remains : 83/99 places, 112/128 transitions.
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 11 ms
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 12 ms
[2023-03-08 23:40:26] [INFO ] Input system was already deterministic with 112 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 99/99 places, 128/128 transitions.
Graph (complete) has 238 edges and 99 vertex of which 91 are kept as prefixes of interest. Removing 8 places using SCC suffix rule.1 ms
Discarding 8 places :
Also discarding 8 output transitions
Drop transitions removed 8 transitions
Reduce places removed 1 places and 1 transitions.
Reduce places removed 1 places and 0 transitions.
Graph (complete) has 100 edges and 89 vertex of which 70 are kept as prefixes of interest. Removing 19 places using SCC suffix rule.1 ms
Discarding 19 places :
Also discarding 19 output transitions
Drop transitions removed 19 transitions
Graph (trivial) has 76 edges and 70 vertex of which 40 / 70 are part of one of the 20 SCC in 4 ms
Free SCC test removed 20 places
Drop transitions removed 8 transitions
Trivial Post-agglo rules discarded 8 transitions
Performed 8 trivial Post agglomeration. Transition count delta: 8
Iterating post reduction 0 with 11 rules applied. Total rules applied 12 place count 50 transition count 92
Reduce places removed 8 places and 0 transitions.
Ensure Unique test removed 20 transitions
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 1 with 28 rules applied. Total rules applied 40 place count 42 transition count 72
Discarding 9 places :
Symmetric choice reduction at 2 with 9 rule applications. Total rules 49 place count 33 transition count 54
Iterating global reduction 2 with 9 rules applied. Total rules applied 58 place count 33 transition count 54
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 65 place count 26 transition count 40
Iterating global reduction 2 with 7 rules applied. Total rules applied 72 place count 26 transition count 40
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 79 place count 19 transition count 26
Iterating global reduction 2 with 7 rules applied. Total rules applied 86 place count 19 transition count 26
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 93 place count 12 transition count 19
Iterating global reduction 2 with 7 rules applied. Total rules applied 100 place count 12 transition count 19
Drop transitions removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 2 with 3 rules applied. Total rules applied 103 place count 12 transition count 16
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 1 rules applied. Total rules applied 104 place count 12 transition count 15
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 105 place count 11 transition count 15
Reduce places removed 3 places and 3 transitions.
Iterating global reduction 4 with 3 rules applied. Total rules applied 108 place count 8 transition count 12
Applied a total of 108 rules in 39 ms. Remains 8 /99 variables (removed 91) and now considering 12/128 (removed 116) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 39 ms. Remains : 8/99 places, 12/128 transitions.
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 1 ms
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 2 ms
[2023-03-08 23:40:26] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 99/99 places, 128/128 transitions.
Graph (complete) has 238 edges and 99 vertex of which 91 are kept as prefixes of interest. Removing 8 places using SCC suffix rule.1 ms
Discarding 8 places :
Also discarding 8 output transitions
Drop transitions removed 8 transitions
Reduce places removed 1 places and 1 transitions.
Reduce places removed 1 places and 0 transitions.
Graph (complete) has 100 edges and 89 vertex of which 70 are kept as prefixes of interest. Removing 19 places using SCC suffix rule.1 ms
Discarding 19 places :
Also discarding 19 output transitions
Drop transitions removed 19 transitions
Graph (trivial) has 78 edges and 70 vertex of which 40 / 70 are part of one of the 20 SCC in 1 ms
Free SCC test removed 20 places
Drop transitions removed 9 transitions
Trivial Post-agglo rules discarded 9 transitions
Performed 9 trivial Post agglomeration. Transition count delta: 9
Iterating post reduction 0 with 12 rules applied. Total rules applied 13 place count 50 transition count 91
Reduce places removed 9 places and 0 transitions.
Ensure Unique test removed 20 transitions
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 1 with 29 rules applied. Total rules applied 42 place count 41 transition count 71
Discarding 9 places :
Symmetric choice reduction at 2 with 9 rule applications. Total rules 51 place count 32 transition count 53
Iterating global reduction 2 with 9 rules applied. Total rules applied 60 place count 32 transition count 53
Discarding 8 places :
Symmetric choice reduction at 2 with 8 rule applications. Total rules 68 place count 24 transition count 37
Iterating global reduction 2 with 8 rules applied. Total rules applied 76 place count 24 transition count 37
Discarding 8 places :
Symmetric choice reduction at 2 with 8 rule applications. Total rules 84 place count 16 transition count 21
Iterating global reduction 2 with 8 rules applied. Total rules applied 92 place count 16 transition count 21
Discarding 8 places :
Symmetric choice reduction at 2 with 8 rule applications. Total rules 100 place count 8 transition count 13
Iterating global reduction 2 with 8 rules applied. Total rules applied 108 place count 8 transition count 13
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 2 with 2 rules applied. Total rules applied 110 place count 8 transition count 11
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 1 rules applied. Total rules applied 111 place count 8 transition count 10
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 112 place count 7 transition count 10
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 114 place count 5 transition count 8
Applied a total of 114 rules in 34 ms. Remains 5 /99 variables (removed 94) and now considering 8/128 (removed 120) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 35 ms. Remains : 5/99 places, 8/128 transitions.
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 1 ms
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 0 ms
[2023-03-08 23:40:26] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 128/128 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 91 transition count 120
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 91 transition count 120
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 23 place count 84 transition count 113
Iterating global reduction 0 with 7 rules applied. Total rules applied 30 place count 84 transition count 113
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 35 place count 79 transition count 108
Iterating global reduction 0 with 5 rules applied. Total rules applied 40 place count 79 transition count 108
Applied a total of 40 rules in 19 ms. Remains 79 /99 variables (removed 20) and now considering 108/128 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 19 ms. Remains : 79/99 places, 108/128 transitions.
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 9 ms
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 11 ms
[2023-03-08 23:40:26] [INFO ] Input system was already deterministic with 108 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 128/128 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 91 transition count 120
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 91 transition count 120
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 23 place count 84 transition count 113
Iterating global reduction 0 with 7 rules applied. Total rules applied 30 place count 84 transition count 113
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 36 place count 78 transition count 107
Iterating global reduction 0 with 6 rules applied. Total rules applied 42 place count 78 transition count 107
Applied a total of 42 rules in 16 ms. Remains 78 /99 variables (removed 21) and now considering 107/128 (removed 21) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 78/99 places, 107/128 transitions.
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 9 ms
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 10 ms
[2023-03-08 23:40:26] [INFO ] Input system was already deterministic with 107 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 128/128 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 90 transition count 119
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 90 transition count 119
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 26 place count 82 transition count 111
Iterating global reduction 0 with 8 rules applied. Total rules applied 34 place count 82 transition count 111
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 41 place count 75 transition count 104
Iterating global reduction 0 with 7 rules applied. Total rules applied 48 place count 75 transition count 104
Applied a total of 48 rules in 15 ms. Remains 75 /99 variables (removed 24) and now considering 104/128 (removed 24) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 75/99 places, 104/128 transitions.
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 8 ms
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 9 ms
[2023-03-08 23:40:26] [INFO ] Input system was already deterministic with 104 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 99/99 places, 128/128 transitions.
Graph (complete) has 238 edges and 99 vertex of which 93 are kept as prefixes of interest. Removing 6 places using SCC suffix rule.1 ms
Discarding 6 places :
Also discarding 6 output transitions
Drop transitions removed 6 transitions
Reduce places removed 1 places and 1 transitions.
Reduce places removed 1 places and 0 transitions.
Graph (complete) has 102 edges and 91 vertex of which 77 are kept as prefixes of interest. Removing 14 places using SCC suffix rule.1 ms
Discarding 14 places :
Also discarding 14 output transitions
Drop transitions removed 14 transitions
Graph (trivial) has 76 edges and 77 vertex of which 36 / 77 are part of one of the 18 SCC in 1 ms
Free SCC test removed 18 places
Drop transitions removed 10 transitions
Trivial Post-agglo rules discarded 10 transitions
Performed 10 trivial Post agglomeration. Transition count delta: 10
Iterating post reduction 0 with 13 rules applied. Total rules applied 14 place count 59 transition count 97
Reduce places removed 10 places and 0 transitions.
Ensure Unique test removed 18 transitions
Reduce isomorphic transitions removed 18 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 29 rules applied. Total rules applied 43 place count 49 transition count 78
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 44 place count 48 transition count 78
Discarding 6 places :
Symmetric choice reduction at 3 with 6 rule applications. Total rules 50 place count 42 transition count 66
Iterating global reduction 3 with 6 rules applied. Total rules applied 56 place count 42 transition count 66
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 61 place count 37 transition count 56
Iterating global reduction 3 with 5 rules applied. Total rules applied 66 place count 37 transition count 56
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 69 place count 34 transition count 50
Iterating global reduction 3 with 3 rules applied. Total rules applied 72 place count 34 transition count 50
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 75 place count 31 transition count 47
Iterating global reduction 3 with 3 rules applied. Total rules applied 78 place count 31 transition count 47
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 79 place count 31 transition count 46
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 81 place count 30 transition count 45
Reduce places removed 7 places and 7 transitions.
Iterating global reduction 3 with 7 rules applied. Total rules applied 88 place count 23 transition count 38
Applied a total of 88 rules in 30 ms. Remains 23 /99 variables (removed 76) and now considering 38/128 (removed 90) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 30 ms. Remains : 23/99 places, 38/128 transitions.
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 2 ms
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 2 ms
[2023-03-08 23:40:26] [INFO ] Input system was already deterministic with 38 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 128/128 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 91 transition count 120
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 91 transition count 120
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 23 place count 84 transition count 113
Iterating global reduction 0 with 7 rules applied. Total rules applied 30 place count 84 transition count 113
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 36 place count 78 transition count 107
Iterating global reduction 0 with 6 rules applied. Total rules applied 42 place count 78 transition count 107
Applied a total of 42 rules in 9 ms. Remains 78 /99 variables (removed 21) and now considering 107/128 (removed 21) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 78/99 places, 107/128 transitions.
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 8 ms
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 9 ms
[2023-03-08 23:40:26] [INFO ] Input system was already deterministic with 107 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 128/128 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 91 transition count 120
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 91 transition count 120
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 23 place count 84 transition count 113
Iterating global reduction 0 with 7 rules applied. Total rules applied 30 place count 84 transition count 113
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 36 place count 78 transition count 107
Iterating global reduction 0 with 6 rules applied. Total rules applied 42 place count 78 transition count 107
Applied a total of 42 rules in 7 ms. Remains 78 /99 variables (removed 21) and now considering 107/128 (removed 21) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 78/99 places, 107/128 transitions.
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 8 ms
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 9 ms
[2023-03-08 23:40:26] [INFO ] Input system was already deterministic with 107 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 99/99 places, 128/128 transitions.
Graph (complete) has 238 edges and 99 vertex of which 91 are kept as prefixes of interest. Removing 8 places using SCC suffix rule.1 ms
Discarding 8 places :
Also discarding 8 output transitions
Drop transitions removed 8 transitions
Drop transitions removed 10 transitions
Trivial Post-agglo rules discarded 10 transitions
Performed 10 trivial Post agglomeration. Transition count delta: 10
Iterating post reduction 0 with 10 rules applied. Total rules applied 11 place count 91 transition count 110
Reduce places removed 10 places and 0 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 21 place count 81 transition count 110
Discarding 8 places :
Symmetric choice reduction at 2 with 8 rule applications. Total rules 29 place count 73 transition count 102
Iterating global reduction 2 with 8 rules applied. Total rules applied 37 place count 73 transition count 102
Applied a total of 37 rules in 18 ms. Remains 73 /99 variables (removed 26) and now considering 102/128 (removed 26) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 73/99 places, 102/128 transitions.
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 7 ms
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 7 ms
[2023-03-08 23:40:26] [INFO ] Input system was already deterministic with 102 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 99/99 places, 128/128 transitions.
Graph (complete) has 238 edges and 99 vertex of which 91 are kept as prefixes of interest. Removing 8 places using SCC suffix rule.1 ms
Discarding 8 places :
Also discarding 8 output transitions
Drop transitions removed 8 transitions
Reduce places removed 1 places and 1 transitions.
Reduce places removed 1 places and 0 transitions.
Graph (complete) has 100 edges and 89 vertex of which 71 are kept as prefixes of interest. Removing 18 places using SCC suffix rule.1 ms
Discarding 18 places :
Also discarding 18 output transitions
Drop transitions removed 18 transitions
Graph (trivial) has 74 edges and 71 vertex of which 36 / 71 are part of one of the 18 SCC in 1 ms
Free SCC test removed 18 places
Drop transitions removed 9 transitions
Trivial Post-agglo rules discarded 9 transitions
Performed 9 trivial Post agglomeration. Transition count delta: 9
Iterating post reduction 0 with 12 rules applied. Total rules applied 13 place count 53 transition count 92
Reduce places removed 9 places and 0 transitions.
Ensure Unique test removed 18 transitions
Reduce isomorphic transitions removed 18 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 28 rules applied. Total rules applied 41 place count 44 transition count 73
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 42 place count 43 transition count 73
Discarding 8 places :
Symmetric choice reduction at 3 with 8 rule applications. Total rules 50 place count 35 transition count 57
Iterating global reduction 3 with 8 rules applied. Total rules applied 58 place count 35 transition count 57
Discarding 7 places :
Symmetric choice reduction at 3 with 7 rule applications. Total rules 65 place count 28 transition count 43
Iterating global reduction 3 with 7 rules applied. Total rules applied 72 place count 28 transition count 43
Discarding 6 places :
Symmetric choice reduction at 3 with 6 rule applications. Total rules 78 place count 22 transition count 31
Iterating global reduction 3 with 6 rules applied. Total rules applied 84 place count 22 transition count 31
Discarding 6 places :
Symmetric choice reduction at 3 with 6 rule applications. Total rules 90 place count 16 transition count 25
Iterating global reduction 3 with 6 rules applied. Total rules applied 96 place count 16 transition count 25
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 97 place count 16 transition count 24
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 99 place count 15 transition count 23
Reduce places removed 4 places and 4 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 103 place count 11 transition count 19
Applied a total of 103 rules in 18 ms. Remains 11 /99 variables (removed 88) and now considering 19/128 (removed 109) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 11/99 places, 19/128 transitions.
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 1 ms
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 1 ms
[2023-03-08 23:40:26] [INFO ] Input system was already deterministic with 19 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 128/128 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 91 transition count 120
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 91 transition count 120
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 23 place count 84 transition count 113
Iterating global reduction 0 with 7 rules applied. Total rules applied 30 place count 84 transition count 113
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 36 place count 78 transition count 107
Iterating global reduction 0 with 6 rules applied. Total rules applied 42 place count 78 transition count 107
Applied a total of 42 rules in 15 ms. Remains 78 /99 variables (removed 21) and now considering 107/128 (removed 21) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 15 ms. Remains : 78/99 places, 107/128 transitions.
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 6 ms
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 7 ms
[2023-03-08 23:40:26] [INFO ] Input system was already deterministic with 107 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 128/128 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 90 transition count 119
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 90 transition count 119
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 25 place count 83 transition count 112
Iterating global reduction 0 with 7 rules applied. Total rules applied 32 place count 83 transition count 112
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 38 place count 77 transition count 106
Iterating global reduction 0 with 6 rules applied. Total rules applied 44 place count 77 transition count 106
Applied a total of 44 rules in 5 ms. Remains 77 /99 variables (removed 22) and now considering 106/128 (removed 22) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 77/99 places, 106/128 transitions.
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 6 ms
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 6 ms
[2023-03-08 23:40:26] [INFO ] Input system was already deterministic with 106 transitions.
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 8 ms
[2023-03-08 23:40:26] [INFO ] Flatten gal took : 7 ms
[2023-03-08 23:40:27] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 4 ms.
[2023-03-08 23:40:27] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 99 places, 128 transitions and 366 arcs took 1 ms.
Total runtime 2929 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DiscoveryGPU-PT-10a
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373

FORMULA DiscoveryGPU-PT-10a-CTLCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-10a-CTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-10a-CTLCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-10a-CTLCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-10a-CTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-10a-CTLCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-10a-CTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-10a-CTLCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-10a-CTLCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-10a-CTLCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-10a-CTLCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 13785800 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16105520 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 58 (type SKEL/SRCH) for 30 DiscoveryGPU-PT-10a-CTLCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: LAUNCH INITIAL
lola: LAUNCH task # 10 (type CNST) for 3 DiscoveryGPU-PT-10a-CTLCardinality-01
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 10 (type CNST) for DiscoveryGPU-PT-10a-CTLCardinality-01
lola: result : true
lola: LAUNCH INITIAL
lola: LAUNCH task # 56 (type CNST) for 51 DiscoveryGPU-PT-10a-CTLCardinality-15
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 56 (type CNST) for DiscoveryGPU-PT-10a-CTLCardinality-15
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: planning for (null) stopped (result already fixed).
lola: LAUNCH task # 40 (type EXCL) for 39 DiscoveryGPU-PT-10a-CTLCardinality-10
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for DiscoveryGPU-PT-10a-CTLCardinality-10
lola: result : true
lola: markings : 4
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 59 (type EXCL) for 21 DiscoveryGPU-PT-10a-CTLCardinality-03
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: FINISHED task # 59 (type EXCL) for DiscoveryGPU-PT-10a-CTLCardinality-03
lola: result : true
lola: markings : 3
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 49 (type EXCL) for 48 DiscoveryGPU-PT-10a-CTLCardinality-14
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type EXCL) for DiscoveryGPU-PT-10a-CTLCardinality-14
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 63 (type EXCL) for 3 DiscoveryGPU-PT-10a-CTLCardinality-01
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 61 (type FNDP) for 3 DiscoveryGPU-PT-10a-CTLCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type EQUN) for 3 DiscoveryGPU-PT-10a-CTLCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 61 (type FNDP) for DiscoveryGPU-PT-10a-CTLCardinality-01
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 62 (type EQUN) for DiscoveryGPU-PT-10a-CTLCardinality-01 (obsolete)
lola: CANCELED task # 63 (type EXCL) for DiscoveryGPU-PT-10a-CTLCardinality-01 (obsolete)
lola: LAUNCH task # 37 (type EXCL) for 36 DiscoveryGPU-PT-10a-CTLCardinality-08
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for DiscoveryGPU-PT-10a-CTLCardinality-08
lola: result : true
lola: markings : 202
lola: fired transitions : 387
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 DiscoveryGPU-PT-10a-CTLCardinality-04
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
sara: try reading problem file /home/mcc/execution/373/CTLCardinality-62.sara.

lola: FINISHED task # 62 (type EQUN) for DiscoveryGPU-PT-10a-CTLCardinality-01
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-10a-CTLCardinality-01: CONJ false findpath
DiscoveryGPU-PT-10a-CTLCardinality-03: AGAF false state space /EFEG
DiscoveryGPU-PT-10a-CTLCardinality-08: CTL true CTL model checker
DiscoveryGPU-PT-10a-CTLCardinality-10: CTL true CTL model checker
DiscoveryGPU-PT-10a-CTLCardinality-14: CTL false CTL model checker
DiscoveryGPU-PT-10a-CTLCardinality-15: CONJ false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-10a-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-02: EFAG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-06: CTL 0 1 1 0 0 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-12: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 5/450 3/32 DiscoveryGPU-PT-10a-CTLCardinality-04 596462 m, 119292 m/sec, 4204903 t fired, .
58 CTL SRCH 5/3600 1/5 DiscoveryGPU-PT-10a-CTLCardinality-06 798848 m, 159769 m/sec, 6035731 t fired, .

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DiscoveryGPU-PT-10a-CTLCardinality-01: CONJ false findpath
DiscoveryGPU-PT-10a-CTLCardinality-03: AGAF false state space /EFEG
DiscoveryGPU-PT-10a-CTLCardinality-08: CTL true CTL model checker
DiscoveryGPU-PT-10a-CTLCardinality-10: CTL true CTL model checker
DiscoveryGPU-PT-10a-CTLCardinality-14: CTL false CTL model checker
DiscoveryGPU-PT-10a-CTLCardinality-15: CONJ false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-10a-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-02: EFAG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-06: CTL 0 1 1 0 0 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-12: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 10/450 6/32 DiscoveryGPU-PT-10a-CTLCardinality-04 1218086 m, 124324 m/sec, 8714543 t fired, .
58 CTL SRCH 10/3600 1/5 DiscoveryGPU-PT-10a-CTLCardinality-06 1653372 m, 170904 m/sec, 13041630 t fired, .

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DiscoveryGPU-PT-10a-CTLCardinality-01: CONJ false findpath
DiscoveryGPU-PT-10a-CTLCardinality-03: AGAF false state space /EFEG
DiscoveryGPU-PT-10a-CTLCardinality-08: CTL true CTL model checker
DiscoveryGPU-PT-10a-CTLCardinality-10: CTL true CTL model checker
DiscoveryGPU-PT-10a-CTLCardinality-14: CTL false CTL model checker
DiscoveryGPU-PT-10a-CTLCardinality-15: CONJ false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-10a-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-02: EFAG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-04: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-06: CTL 0 1 1 0 0 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-12: EG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 15/450 8/32 DiscoveryGPU-PT-10a-CTLCardinality-04 1745109 m, 105404 m/sec, 12882455 t fired, .
58 CTL SRCH 15/3600 1/5 DiscoveryGPU-PT-10a-CTLCardinality-06 2466384 m, 162602 m/sec, 20061078 t fired, .

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DiscoveryGPU-PT-10a-CTLCardinality-01: CONJ false findpath
DiscoveryGPU-PT-10a-CTLCardinality-03: AGAF false state space /EFEG
DiscoveryGPU-PT-10a-CTLCardinality-08: CTL true CTL model checker
DiscoveryGPU-PT-10a-CTLCardinality-10: CTL true CTL model checker
DiscoveryGPU-PT-10a-CTLCardinality-14: CTL false CTL model checker
DiscoveryGPU-PT-10a-CTLCardinality-15: CONJ false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DiscoveryGPU-PT-10a-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-02: EFAG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-10a-CTLCardinality-04: CTL 0 0 1 0 1 0 0 0
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25 CTL EXCL 20/450 10/32 DiscoveryGPU-PT-10a-CTLCardinality-04 2256322 m, 102242 m/sec, 17038176 t fired, .
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========== file over 1MB has been truncated ======
retrieve it from the run archives if needed

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DiscoveryGPU-PT-10a"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DiscoveryGPU-PT-10a, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r135-smll-167819414100345"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DiscoveryGPU-PT-10a.tgz
mv DiscoveryGPU-PT-10a execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;