Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r135-smll-167819414100329.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DiscoveryGPU-PT-09a, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r135-smll-167819414100329
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 528K
-rw-r--r-- 1 mcc users 6.6K Feb 25 13:30 CTLCardinality.txt
-rw-r--r-- 1 mcc users 72K Feb 25 13:30 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 25 13:27 CTLFireability.txt
-rw-r--r-- 1 mcc users 54K Feb 25 13:27 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:59 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 15:59 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 15:59 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 15:59 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Feb 25 13:32 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 199K Feb 25 13:32 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 4.9K Feb 25 13:31 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 35K Feb 25 13:31 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:59 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:59 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 32K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DiscoveryGPU-PT-09a-CTLCardinality-00
FORMULA_NAME DiscoveryGPU-PT-09a-CTLCardinality-01
FORMULA_NAME DiscoveryGPU-PT-09a-CTLCardinality-02
FORMULA_NAME DiscoveryGPU-PT-09a-CTLCardinality-03
FORMULA_NAME DiscoveryGPU-PT-09a-CTLCardinality-04
FORMULA_NAME DiscoveryGPU-PT-09a-CTLCardinality-05
FORMULA_NAME DiscoveryGPU-PT-09a-CTLCardinality-06
FORMULA_NAME DiscoveryGPU-PT-09a-CTLCardinality-07
FORMULA_NAME DiscoveryGPU-PT-09a-CTLCardinality-08
FORMULA_NAME DiscoveryGPU-PT-09a-CTLCardinality-09
FORMULA_NAME DiscoveryGPU-PT-09a-CTLCardinality-10
FORMULA_NAME DiscoveryGPU-PT-09a-CTLCardinality-11
FORMULA_NAME DiscoveryGPU-PT-09a-CTLCardinality-12
FORMULA_NAME DiscoveryGPU-PT-09a-CTLCardinality-13
FORMULA_NAME DiscoveryGPU-PT-09a-CTLCardinality-14
FORMULA_NAME DiscoveryGPU-PT-09a-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678316844441

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DiscoveryGPU-PT-09a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 23:07:27] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-08 23:07:28] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 23:07:28] [INFO ] Load time of PNML (sax parser for PT used): 94 ms
[2023-03-08 23:07:28] [INFO ] Transformed 93 places.
[2023-03-08 23:07:28] [INFO ] Transformed 127 transitions.
[2023-03-08 23:07:28] [INFO ] Found NUPN structural information;
[2023-03-08 23:07:28] [INFO ] Parsed PT model containing 93 places and 127 transitions and 408 arcs in 274 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 26 ms.
Support contains 69 out of 93 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 93/93 places, 127/127 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 91 transition count 125
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 91 transition count 125
Drop transitions removed 9 transitions
Redundant transition composition rules discarded 9 transitions
Iterating global reduction 0 with 9 rules applied. Total rules applied 13 place count 91 transition count 116
Applied a total of 13 rules in 42 ms. Remains 91 /93 variables (removed 2) and now considering 116/127 (removed 11) transitions.
// Phase 1: matrix 116 rows 91 cols
[2023-03-08 23:07:28] [INFO ] Computed 2 place invariants in 13 ms
[2023-03-08 23:07:28] [INFO ] Implicit Places using invariants in 332 ms returned []
[2023-03-08 23:07:28] [INFO ] Invariant cache hit.
[2023-03-08 23:07:28] [INFO ] State equation strengthened by 72 read => feed constraints.
[2023-03-08 23:07:29] [INFO ] Implicit Places using invariants and state equation in 215 ms returned []
Implicit Place search using SMT with State Equation took 607 ms to find 0 implicit places.
[2023-03-08 23:07:29] [INFO ] Invariant cache hit.
[2023-03-08 23:07:29] [INFO ] Dead Transitions using invariants and state equation in 186 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 91/93 places, 116/127 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 840 ms. Remains : 91/93 places, 116/127 transitions.
Support contains 69 out of 91 places after structural reductions.
[2023-03-08 23:07:29] [INFO ] Flatten gal took : 62 ms
[2023-03-08 23:07:29] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-08 23:07:29] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA DiscoveryGPU-PT-09a-CTLCardinality-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DiscoveryGPU-PT-09a-CTLCardinality-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-08 23:07:29] [INFO ] Flatten gal took : 28 ms
[2023-03-08 23:07:29] [INFO ] Input system was already deterministic with 116 transitions.
Support contains 57 out of 91 places (down from 69) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 103 resets, run finished after 722 ms. (steps per millisecond=13 ) properties (out of 47) seen :45
Incomplete Best-First random walk after 10001 steps, including 10 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 11 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 2) seen :1
Running SMT prover for 1 properties.
[2023-03-08 23:07:30] [INFO ] Invariant cache hit.
[2023-03-08 23:07:30] [INFO ] After 62ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-08 23:07:30] [INFO ] [Nat]Absence check using 2 positive place invariants in 2 ms returned sat
[2023-03-08 23:07:30] [INFO ] After 124ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 1 atomic propositions for a total of 14 simplifications.
[2023-03-08 23:07:30] [INFO ] Flatten gal took : 10 ms
[2023-03-08 23:07:30] [INFO ] Flatten gal took : 12 ms
[2023-03-08 23:07:30] [INFO ] Input system was already deterministic with 116 transitions.
Computed a total of 12 stabilizing places and 10 stable transitions
Graph (complete) has 254 edges and 91 vertex of which 84 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.3 ms
Starting structural reductions in LTL mode, iteration 0 : 91/91 places, 116/116 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 84 transition count 109
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 84 transition count 109
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 17 place count 81 transition count 106
Iterating global reduction 0 with 3 rules applied. Total rules applied 20 place count 81 transition count 106
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 23 place count 78 transition count 103
Iterating global reduction 0 with 3 rules applied. Total rules applied 26 place count 78 transition count 103
Applied a total of 26 rules in 14 ms. Remains 78 /91 variables (removed 13) and now considering 103/116 (removed 13) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 14 ms. Remains : 78/91 places, 103/116 transitions.
[2023-03-08 23:07:30] [INFO ] Flatten gal took : 7 ms
[2023-03-08 23:07:30] [INFO ] Flatten gal took : 7 ms
[2023-03-08 23:07:30] [INFO ] Input system was already deterministic with 103 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 91/91 places, 116/116 transitions.
Graph (complete) has 254 edges and 91 vertex of which 85 are kept as prefixes of interest. Removing 6 places using SCC suffix rule.2 ms
Discarding 6 places :
Also discarding 6 output transitions
Drop transitions removed 6 transitions
Performed 8 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 8 Pre rules applied. Total rules applied 1 place count 85 transition count 102
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 0 with 16 rules applied. Total rules applied 17 place count 77 transition count 102
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 24 place count 70 transition count 95
Iterating global reduction 0 with 7 rules applied. Total rules applied 31 place count 70 transition count 95
Applied a total of 31 rules in 23 ms. Remains 70 /91 variables (removed 21) and now considering 95/116 (removed 21) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 23 ms. Remains : 70/91 places, 95/116 transitions.
[2023-03-08 23:07:30] [INFO ] Flatten gal took : 9 ms
[2023-03-08 23:07:30] [INFO ] Flatten gal took : 10 ms
[2023-03-08 23:07:31] [INFO ] Input system was already deterministic with 95 transitions.
Starting structural reductions in LTL mode, iteration 0 : 91/91 places, 116/116 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 83 transition count 108
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 83 transition count 108
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 22 place count 77 transition count 102
Iterating global reduction 0 with 6 rules applied. Total rules applied 28 place count 77 transition count 102
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 33 place count 72 transition count 97
Iterating global reduction 0 with 5 rules applied. Total rules applied 38 place count 72 transition count 97
Applied a total of 38 rules in 17 ms. Remains 72 /91 variables (removed 19) and now considering 97/116 (removed 19) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 72/91 places, 97/116 transitions.
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 9 ms
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 12 ms
[2023-03-08 23:07:31] [INFO ] Input system was already deterministic with 97 transitions.
Starting structural reductions in LTL mode, iteration 0 : 91/91 places, 116/116 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 83 transition count 108
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 83 transition count 108
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 23 place count 76 transition count 101
Iterating global reduction 0 with 7 rules applied. Total rules applied 30 place count 76 transition count 101
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 34 place count 72 transition count 97
Iterating global reduction 0 with 4 rules applied. Total rules applied 38 place count 72 transition count 97
Applied a total of 38 rules in 24 ms. Remains 72 /91 variables (removed 19) and now considering 97/116 (removed 19) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 24 ms. Remains : 72/91 places, 97/116 transitions.
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 9 ms
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 10 ms
[2023-03-08 23:07:31] [INFO ] Input system was already deterministic with 97 transitions.
Starting structural reductions in LTL mode, iteration 0 : 91/91 places, 116/116 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 83 transition count 108
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 83 transition count 108
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 24 place count 75 transition count 100
Iterating global reduction 0 with 8 rules applied. Total rules applied 32 place count 75 transition count 100
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 38 place count 69 transition count 94
Iterating global reduction 0 with 6 rules applied. Total rules applied 44 place count 69 transition count 94
Applied a total of 44 rules in 13 ms. Remains 69 /91 variables (removed 22) and now considering 94/116 (removed 22) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 14 ms. Remains : 69/91 places, 94/116 transitions.
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 8 ms
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 9 ms
[2023-03-08 23:07:31] [INFO ] Input system was already deterministic with 94 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 91/91 places, 116/116 transitions.
Graph (complete) has 254 edges and 91 vertex of which 84 are kept as prefixes of interest. Removing 7 places using SCC suffix rule.1 ms
Discarding 7 places :
Also discarding 7 output transitions
Drop transitions removed 7 transitions
Reduce places removed 1 places and 1 transitions.
Reduce places removed 2 places and 0 transitions.
Graph (complete) has 90 edges and 81 vertex of which 64 are kept as prefixes of interest. Removing 17 places using SCC suffix rule.0 ms
Discarding 17 places :
Also discarding 17 output transitions
Drop transitions removed 17 transitions
Graph (trivial) has 72 edges and 64 vertex of which 36 / 64 are part of one of the 18 SCC in 4 ms
Free SCC test removed 18 places
Drop transitions removed 9 transitions
Trivial Post-agglo rules discarded 9 transitions
Performed 9 trivial Post agglomeration. Transition count delta: 9
Iterating post reduction 0 with 13 rules applied. Total rules applied 14 place count 46 transition count 82
Reduce places removed 9 places and 0 transitions.
Ensure Unique test removed 18 transitions
Reduce isomorphic transitions removed 18 transitions.
Iterating post reduction 1 with 27 rules applied. Total rules applied 41 place count 37 transition count 64
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 48 place count 30 transition count 50
Iterating global reduction 2 with 7 rules applied. Total rules applied 55 place count 30 transition count 50
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 62 place count 23 transition count 36
Iterating global reduction 2 with 7 rules applied. Total rules applied 69 place count 23 transition count 36
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 76 place count 16 transition count 22
Iterating global reduction 2 with 7 rules applied. Total rules applied 83 place count 16 transition count 22
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 90 place count 9 transition count 15
Iterating global reduction 2 with 7 rules applied. Total rules applied 97 place count 9 transition count 15
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 98 place count 9 transition count 14
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 1 rules applied. Total rules applied 99 place count 9 transition count 13
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 100 place count 8 transition count 13
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 102 place count 6 transition count 11
Applied a total of 102 rules in 25 ms. Remains 6 /91 variables (removed 85) and now considering 11/116 (removed 105) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 25 ms. Remains : 6/91 places, 11/116 transitions.
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 1 ms
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 1 ms
[2023-03-08 23:07:31] [INFO ] Input system was already deterministic with 11 transitions.
Finished random walk after 138 steps, including 6 resets, run visited all 1 properties in 2 ms. (steps per millisecond=69 )
FORMULA DiscoveryGPU-PT-09a-CTLCardinality-07 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 91/91 places, 116/116 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 84 transition count 109
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 84 transition count 109
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 19 place count 79 transition count 104
Iterating global reduction 0 with 5 rules applied. Total rules applied 24 place count 79 transition count 104
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 28 place count 75 transition count 100
Iterating global reduction 0 with 4 rules applied. Total rules applied 32 place count 75 transition count 100
Applied a total of 32 rules in 8 ms. Remains 75 /91 variables (removed 16) and now considering 100/116 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 75/91 places, 100/116 transitions.
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 8 ms
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 10 ms
[2023-03-08 23:07:31] [INFO ] Input system was already deterministic with 100 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 91/91 places, 116/116 transitions.
Graph (complete) has 254 edges and 91 vertex of which 85 are kept as prefixes of interest. Removing 6 places using SCC suffix rule.1 ms
Discarding 6 places :
Also discarding 6 output transitions
Drop transitions removed 6 transitions
Reduce places removed 1 places and 1 transitions.
Reduce places removed 2 places and 0 transitions.
Graph (complete) has 91 edges and 82 vertex of which 69 are kept as prefixes of interest. Removing 13 places using SCC suffix rule.0 ms
Discarding 13 places :
Also discarding 13 output transitions
Drop transitions removed 13 transitions
Graph (trivial) has 74 edges and 69 vertex of which 36 / 69 are part of one of the 18 SCC in 0 ms
Free SCC test removed 18 places
Drop transitions removed 9 transitions
Trivial Post-agglo rules discarded 9 transitions
Performed 9 trivial Post agglomeration. Transition count delta: 9
Iterating post reduction 0 with 13 rules applied. Total rules applied 14 place count 51 transition count 87
Reduce places removed 9 places and 0 transitions.
Ensure Unique test removed 18 transitions
Reduce isomorphic transitions removed 18 transitions.
Iterating post reduction 1 with 27 rules applied. Total rules applied 41 place count 42 transition count 69
Discarding 5 places :
Symmetric choice reduction at 2 with 5 rule applications. Total rules 46 place count 37 transition count 59
Iterating global reduction 2 with 5 rules applied. Total rules applied 51 place count 37 transition count 59
Discarding 5 places :
Symmetric choice reduction at 2 with 5 rule applications. Total rules 56 place count 32 transition count 49
Iterating global reduction 2 with 5 rules applied. Total rules applied 61 place count 32 transition count 49
Discarding 5 places :
Symmetric choice reduction at 2 with 5 rule applications. Total rules 66 place count 27 transition count 39
Iterating global reduction 2 with 5 rules applied. Total rules applied 71 place count 27 transition count 39
Discarding 5 places :
Symmetric choice reduction at 2 with 5 rule applications. Total rules 76 place count 22 transition count 34
Iterating global reduction 2 with 5 rules applied. Total rules applied 81 place count 22 transition count 34
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 82 place count 22 transition count 33
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 1 rules applied. Total rules applied 83 place count 22 transition count 32
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 84 place count 21 transition count 32
Reduce places removed 4 places and 4 transitions.
Iterating global reduction 4 with 4 rules applied. Total rules applied 88 place count 17 transition count 28
Applied a total of 88 rules in 19 ms. Remains 17 /91 variables (removed 74) and now considering 28/116 (removed 88) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 19 ms. Remains : 17/91 places, 28/116 transitions.
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 2 ms
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 2 ms
[2023-03-08 23:07:31] [INFO ] Input system was already deterministic with 28 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 91/91 places, 116/116 transitions.
Graph (complete) has 254 edges and 91 vertex of which 85 are kept as prefixes of interest. Removing 6 places using SCC suffix rule.1 ms
Discarding 6 places :
Also discarding 6 output transitions
Drop transitions removed 6 transitions
Performed 7 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 7 Pre rules applied. Total rules applied 1 place count 85 transition count 103
Deduced a syphon composed of 7 places in 1 ms
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 0 with 14 rules applied. Total rules applied 15 place count 78 transition count 103
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 21 place count 72 transition count 97
Iterating global reduction 0 with 6 rules applied. Total rules applied 27 place count 72 transition count 97
Applied a total of 27 rules in 17 ms. Remains 72 /91 variables (removed 19) and now considering 97/116 (removed 19) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 72/91 places, 97/116 transitions.
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 8 ms
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 10 ms
[2023-03-08 23:07:31] [INFO ] Input system was already deterministic with 97 transitions.
Starting structural reductions in LTL mode, iteration 0 : 91/91 places, 116/116 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 84 transition count 109
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 84 transition count 109
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 19 place count 79 transition count 104
Iterating global reduction 0 with 5 rules applied. Total rules applied 24 place count 79 transition count 104
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 27 place count 76 transition count 101
Iterating global reduction 0 with 3 rules applied. Total rules applied 30 place count 76 transition count 101
Applied a total of 30 rules in 7 ms. Remains 76 /91 variables (removed 15) and now considering 101/116 (removed 15) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 76/91 places, 101/116 transitions.
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 9 ms
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 10 ms
[2023-03-08 23:07:31] [INFO ] Input system was already deterministic with 101 transitions.
Starting structural reductions in LTL mode, iteration 0 : 91/91 places, 116/116 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 84 transition count 109
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 84 transition count 109
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 21 place count 77 transition count 102
Iterating global reduction 0 with 7 rules applied. Total rules applied 28 place count 77 transition count 102
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 33 place count 72 transition count 97
Iterating global reduction 0 with 5 rules applied. Total rules applied 38 place count 72 transition count 97
Applied a total of 38 rules in 7 ms. Remains 72 /91 variables (removed 19) and now considering 97/116 (removed 19) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 72/91 places, 97/116 transitions.
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 7 ms
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 8 ms
[2023-03-08 23:07:31] [INFO ] Input system was already deterministic with 97 transitions.
Starting structural reductions in LTL mode, iteration 0 : 91/91 places, 116/116 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 84 transition count 109
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 84 transition count 109
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 21 place count 77 transition count 102
Iterating global reduction 0 with 7 rules applied. Total rules applied 28 place count 77 transition count 102
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 33 place count 72 transition count 97
Iterating global reduction 0 with 5 rules applied. Total rules applied 38 place count 72 transition count 97
Applied a total of 38 rules in 5 ms. Remains 72 /91 variables (removed 19) and now considering 97/116 (removed 19) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 72/91 places, 97/116 transitions.
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 5 ms
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 6 ms
[2023-03-08 23:07:31] [INFO ] Input system was already deterministic with 97 transitions.
Starting structural reductions in LTL mode, iteration 0 : 91/91 places, 116/116 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 84 transition count 109
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 84 transition count 109
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 21 place count 77 transition count 102
Iterating global reduction 0 with 7 rules applied. Total rules applied 28 place count 77 transition count 102
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 33 place count 72 transition count 97
Iterating global reduction 0 with 5 rules applied. Total rules applied 38 place count 72 transition count 97
Applied a total of 38 rules in 4 ms. Remains 72 /91 variables (removed 19) and now considering 97/116 (removed 19) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 72/91 places, 97/116 transitions.
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 5 ms
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 6 ms
[2023-03-08 23:07:31] [INFO ] Input system was already deterministic with 97 transitions.
Starting structural reductions in LTL mode, iteration 0 : 91/91 places, 116/116 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 83 transition count 108
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 83 transition count 108
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 24 place count 75 transition count 100
Iterating global reduction 0 with 8 rules applied. Total rules applied 32 place count 75 transition count 100
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 38 place count 69 transition count 94
Iterating global reduction 0 with 6 rules applied. Total rules applied 44 place count 69 transition count 94
Applied a total of 44 rules in 5 ms. Remains 69 /91 variables (removed 22) and now considering 94/116 (removed 22) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 69/91 places, 94/116 transitions.
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 5 ms
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 5 ms
[2023-03-08 23:07:31] [INFO ] Input system was already deterministic with 94 transitions.
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 7 ms
[2023-03-08 23:07:31] [INFO ] Flatten gal took : 7 ms
[2023-03-08 23:07:31] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 3 ms.
[2023-03-08 23:07:31] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 91 places, 116 transitions and 370 arcs took 2 ms.
Total runtime 3635 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DiscoveryGPU-PT-09a
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373

FORMULA DiscoveryGPU-PT-09a-CTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-09a-CTLCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-09a-CTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-09a-CTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-09a-CTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-09a-CTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678317403441

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 4 (type EXCL) for 3 DiscoveryGPU-PT-09a-CTLCardinality-02
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
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38 CTL EXCL 55/293 22/32 DiscoveryGPU-PT-09a-CTLCardinality-14 5052363 m, 84144 m/sec, 55863015 t fired, .

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DiscoveryGPU-PT-09a-CTLCardinality-15: CTL true CTL model checker

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38 CTL EXCL 60/293 24/32 DiscoveryGPU-PT-09a-CTLCardinality-14 5507222 m, 90971 m/sec, 60984867 t fired, .

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DiscoveryGPU-PT-09a-CTLCardinality-15: CTL true CTL model checker

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38 CTL EXCL 65/293 26/32 DiscoveryGPU-PT-09a-CTLCardinality-14 5929729 m, 84501 m/sec, 66068642 t fired, .

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DiscoveryGPU-PT-09a-CTLCardinality-15: CTL true CTL model checker

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38 CTL EXCL 70/293 28/32 DiscoveryGPU-PT-09a-CTLCardinality-14 6362019 m, 86458 m/sec, 71099255 t fired, .

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DiscoveryGPU-PT-09a-CTLCardinality-15: CTL true CTL model checker

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38 CTL EXCL 75/293 29/32 DiscoveryGPU-PT-09a-CTLCardinality-14 6767177 m, 81031 m/sec, 76104374 t fired, .

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DiscoveryGPU-PT-09a-CTLCardinality-15: CTL true CTL model checker

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38 CTL EXCL 80/293 31/32 DiscoveryGPU-PT-09a-CTLCardinality-14 7206468 m, 87858 m/sec, 81053010 t fired, .

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DiscoveryGPU-PT-09a-CTLCardinality-13: CTL false CTL model checker
DiscoveryGPU-PT-09a-CTLCardinality-15: CTL true CTL model checker

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32 CTL EXCL 5/343 3/32 DiscoveryGPU-PT-09a-CTLCardinality-12 600894 m, 120178 m/sec, 4753138 t fired, .

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32 CTL EXCL 10/343 6/32 DiscoveryGPU-PT-09a-CTLCardinality-12 1178363 m, 115493 m/sec, 9563496 t fired, .

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32 CTL EXCL 15/343 8/32 DiscoveryGPU-PT-09a-CTLCardinality-12 1699878 m, 104303 m/sec, 14491039 t fired, .

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32 CTL EXCL 20/343 10/32 DiscoveryGPU-PT-09a-CTLCardinality-12 2250440 m, 110112 m/sec, 19430429 t fired, .

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32 CTL EXCL 25/343 12/32 DiscoveryGPU-PT-09a-CTLCardinality-12 2789691 m, 107850 m/sec, 24407521 t fired, .

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32 CTL EXCL 30/343 15/32 DiscoveryGPU-PT-09a-CTLCardinality-12 3361957 m, 114453 m/sec, 29384396 t fired, .

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32 CTL EXCL 35/343 17/32 DiscoveryGPU-PT-09a-CTLCardinality-12 3887147 m, 105038 m/sec, 34321847 t fired, .

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32 CTL EXCL 40/343 19/32 DiscoveryGPU-PT-09a-CTLCardinality-12 4419780 m, 106526 m/sec, 39336197 t fired, .

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DiscoveryGPU-PT-09a-CTLCardinality-05: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-09a-CTLCardinality-06: DISJ 0 1 0 0 2 0 1 0
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DiscoveryGPU-PT-09a-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
DiscoveryGPU-PT-09a-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 65/627 25/32 DiscoveryGPU-PT-09a-CTLCardinality-03 5793045 m, 84800 m/sec, 58962740 t fired, .

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DiscoveryGPU-PT-09a-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
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7 CTL EXCL 70/627 27/32 DiscoveryGPU-PT-09a-CTLCardinality-03 6214641 m, 84319 m/sec, 63511300 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 75/627 29/32 DiscoveryGPU-PT-09a-CTLCardinality-03 6612764 m, 79624 m/sec, 68101147 t fired, .

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7 CTL EXCL 80/627 31/32 DiscoveryGPU-PT-09a-CTLCardinality-03 7032009 m, 83849 m/sec, 72631988 t fired, .

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7 CTL EXCL 85/627 32/32 DiscoveryGPU-PT-09a-CTLCardinality-03 7469075 m, 87413 m/sec, 77069953 t fired, .

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lola: result : false
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lola: result : false
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lola: result : false
lola: markings : 9127
lola: fired transitions : 95842
lola: time used : 0.000000
lola: memory pages used : 1
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lola: result : true
lola: markings : 120
lola: fired transitions : 543
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 13

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-09a-CTLCardinality-00: CTL false CTL model checker
DiscoveryGPU-PT-09a-CTLCardinality-02: CTL unknown AGGR
DiscoveryGPU-PT-09a-CTLCardinality-03: CTL unknown AGGR
DiscoveryGPU-PT-09a-CTLCardinality-05: CTL unknown AGGR
DiscoveryGPU-PT-09a-CTLCardinality-06: DISJ unknown DISJ
DiscoveryGPU-PT-09a-CTLCardinality-08: CTL unknown AGGR
DiscoveryGPU-PT-09a-CTLCardinality-09: CTL false CTL model checker
DiscoveryGPU-PT-09a-CTLCardinality-10: CTL true CTL model checker
DiscoveryGPU-PT-09a-CTLCardinality-11: CTL false CTL model checker
DiscoveryGPU-PT-09a-CTLCardinality-12: CTL unknown AGGR
DiscoveryGPU-PT-09a-CTLCardinality-13: CTL false CTL model checker
DiscoveryGPU-PT-09a-CTLCardinality-14: CTL unknown AGGR
DiscoveryGPU-PT-09a-CTLCardinality-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DiscoveryGPU-PT-09a"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DiscoveryGPU-PT-09a, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r135-smll-167819414100329"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DiscoveryGPU-PT-09a.tgz
mv DiscoveryGPU-PT-09a execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;