Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r135-smll-167819414000298.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DiscoveryGPU-PT-07a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r135-smll-167819414000298
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 484K
-rw-r--r-- 1 mcc users 6.5K Feb 25 13:36 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K Feb 25 13:36 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.9K Feb 25 13:33 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 25 13:33 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 15:59 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 15:59 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:59 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:59 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 25 13:37 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 156K Feb 25 13:37 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.6K Feb 25 13:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 55K Feb 25 13:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:59 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:59 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 25K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DiscoveryGPU-PT-07a-CTLFireability-00
FORMULA_NAME DiscoveryGPU-PT-07a-CTLFireability-01
FORMULA_NAME DiscoveryGPU-PT-07a-CTLFireability-02
FORMULA_NAME DiscoveryGPU-PT-07a-CTLFireability-03
FORMULA_NAME DiscoveryGPU-PT-07a-CTLFireability-04
FORMULA_NAME DiscoveryGPU-PT-07a-CTLFireability-05
FORMULA_NAME DiscoveryGPU-PT-07a-CTLFireability-06
FORMULA_NAME DiscoveryGPU-PT-07a-CTLFireability-07
FORMULA_NAME DiscoveryGPU-PT-07a-CTLFireability-08
FORMULA_NAME DiscoveryGPU-PT-07a-CTLFireability-09
FORMULA_NAME DiscoveryGPU-PT-07a-CTLFireability-10
FORMULA_NAME DiscoveryGPU-PT-07a-CTLFireability-11
FORMULA_NAME DiscoveryGPU-PT-07a-CTLFireability-12
FORMULA_NAME DiscoveryGPU-PT-07a-CTLFireability-13
FORMULA_NAME DiscoveryGPU-PT-07a-CTLFireability-14
FORMULA_NAME DiscoveryGPU-PT-07a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678314717292

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DiscoveryGPU-PT-07a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 22:32:01] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-08 22:32:01] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 22:32:01] [INFO ] Load time of PNML (sax parser for PT used): 56 ms
[2023-03-08 22:32:01] [INFO ] Transformed 73 places.
[2023-03-08 22:32:01] [INFO ] Transformed 99 transitions.
[2023-03-08 22:32:01] [INFO ] Found NUPN structural information;
[2023-03-08 22:32:01] [INFO ] Parsed PT model containing 73 places and 99 transitions and 318 arcs in 172 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 13 ms.
Initial state reduction rules removed 1 formulas.
FORMULA DiscoveryGPU-PT-07a-CTLFireability-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 50 out of 73 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 73/73 places, 99/99 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 71 transition count 97
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 71 transition count 97
Drop transitions removed 7 transitions
Redundant transition composition rules discarded 7 transitions
Iterating global reduction 0 with 7 rules applied. Total rules applied 11 place count 71 transition count 90
Applied a total of 11 rules in 28 ms. Remains 71 /73 variables (removed 2) and now considering 90/99 (removed 9) transitions.
// Phase 1: matrix 90 rows 71 cols
[2023-03-08 22:32:01] [INFO ] Computed 2 place invariants in 7 ms
[2023-03-08 22:32:01] [INFO ] Implicit Places using invariants in 217 ms returned []
[2023-03-08 22:32:01] [INFO ] Invariant cache hit.
[2023-03-08 22:32:01] [INFO ] State equation strengthened by 56 read => feed constraints.
[2023-03-08 22:32:01] [INFO ] Implicit Places using invariants and state equation in 143 ms returned []
Implicit Place search using SMT with State Equation took 410 ms to find 0 implicit places.
[2023-03-08 22:32:01] [INFO ] Invariant cache hit.
[2023-03-08 22:32:02] [INFO ] Dead Transitions using invariants and state equation in 98 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 71/73 places, 90/99 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 538 ms. Remains : 71/73 places, 90/99 transitions.
Support contains 50 out of 71 places after structural reductions.
[2023-03-08 22:32:02] [INFO ] Flatten gal took : 64 ms
[2023-03-08 22:32:02] [INFO ] Flatten gal took : 24 ms
[2023-03-08 22:32:02] [INFO ] Input system was already deterministic with 90 transitions.
Support contains 49 out of 71 places (down from 50) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 131 resets, run finished after 624 ms. (steps per millisecond=16 ) properties (out of 49) seen :47
Incomplete Best-First random walk after 10001 steps, including 20 resets, run finished after 71 ms. (steps per millisecond=140 ) properties (out of 2) seen :1
Finished Best-First random walk after 1048 steps, including 1 resets, run visited all 1 properties in 6 ms. (steps per millisecond=174 )
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 13 ms
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 16 ms
[2023-03-08 22:32:03] [INFO ] Input system was already deterministic with 90 transitions.
Computed a total of 10 stabilizing places and 8 stable transitions
Graph (complete) has 198 edges and 71 vertex of which 66 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.3 ms
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 90/90 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 65 transition count 84
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 65 transition count 84
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 18 place count 59 transition count 78
Iterating global reduction 0 with 6 rules applied. Total rules applied 24 place count 59 transition count 78
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 27 place count 56 transition count 75
Iterating global reduction 0 with 3 rules applied. Total rules applied 30 place count 56 transition count 75
Applied a total of 30 rules in 17 ms. Remains 56 /71 variables (removed 15) and now considering 75/90 (removed 15) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 56/71 places, 75/90 transitions.
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 9 ms
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 9 ms
[2023-03-08 22:32:03] [INFO ] Input system was already deterministic with 75 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 90/90 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 65 transition count 84
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 65 transition count 84
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 18 place count 59 transition count 78
Iterating global reduction 0 with 6 rules applied. Total rules applied 24 place count 59 transition count 78
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 27 place count 56 transition count 75
Iterating global reduction 0 with 3 rules applied. Total rules applied 30 place count 56 transition count 75
Applied a total of 30 rules in 14 ms. Remains 56 /71 variables (removed 15) and now considering 75/90 (removed 15) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 15 ms. Remains : 56/71 places, 75/90 transitions.
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 8 ms
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 6 ms
[2023-03-08 22:32:03] [INFO ] Input system was already deterministic with 75 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 90/90 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 65 transition count 84
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 65 transition count 84
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 18 place count 59 transition count 78
Iterating global reduction 0 with 6 rules applied. Total rules applied 24 place count 59 transition count 78
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 27 place count 56 transition count 75
Iterating global reduction 0 with 3 rules applied. Total rules applied 30 place count 56 transition count 75
Applied a total of 30 rules in 9 ms. Remains 56 /71 variables (removed 15) and now considering 75/90 (removed 15) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 56/71 places, 75/90 transitions.
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:32:03] [INFO ] Input system was already deterministic with 75 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 90/90 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 67 transition count 86
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 67 transition count 86
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 12 place count 63 transition count 82
Iterating global reduction 0 with 4 rules applied. Total rules applied 16 place count 63 transition count 82
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 18 place count 61 transition count 80
Iterating global reduction 0 with 2 rules applied. Total rules applied 20 place count 61 transition count 80
Applied a total of 20 rules in 7 ms. Remains 61 /71 variables (removed 10) and now considering 80/90 (removed 10) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 61/71 places, 80/90 transitions.
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 13 ms
[2023-03-08 22:32:03] [INFO ] Input system was already deterministic with 80 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 71/71 places, 90/90 transitions.
Graph (complete) has 198 edges and 71 vertex of which 67 are kept as prefixes of interest. Removing 4 places using SCC suffix rule.1 ms
Discarding 4 places :
Also discarding 4 output transitions
Drop transitions removed 4 transitions
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 5 Pre rules applied. Total rules applied 1 place count 67 transition count 81
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 0 with 10 rules applied. Total rules applied 11 place count 62 transition count 81
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 16 place count 57 transition count 76
Iterating global reduction 0 with 5 rules applied. Total rules applied 21 place count 57 transition count 76
Applied a total of 21 rules in 19 ms. Remains 57 /71 variables (removed 14) and now considering 76/90 (removed 14) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 20 ms. Remains : 57/71 places, 76/90 transitions.
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:32:03] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 90/90 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 66 transition count 85
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 66 transition count 85
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 14 place count 62 transition count 81
Iterating global reduction 0 with 4 rules applied. Total rules applied 18 place count 62 transition count 81
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 21 place count 59 transition count 78
Iterating global reduction 0 with 3 rules applied. Total rules applied 24 place count 59 transition count 78
Applied a total of 24 rules in 7 ms. Remains 59 /71 variables (removed 12) and now considering 78/90 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 59/71 places, 78/90 transitions.
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:32:03] [INFO ] Input system was already deterministic with 78 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 71/71 places, 90/90 transitions.
Graph (complete) has 198 edges and 71 vertex of which 66 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.1 ms
Discarding 5 places :
Also discarding 5 output transitions
Drop transitions removed 5 transitions
Performed 6 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 6 Pre rules applied. Total rules applied 1 place count 66 transition count 79
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 0 with 12 rules applied. Total rules applied 13 place count 60 transition count 79
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 19 place count 54 transition count 73
Iterating global reduction 0 with 6 rules applied. Total rules applied 25 place count 54 transition count 73
Applied a total of 25 rules in 10 ms. Remains 54 /71 variables (removed 17) and now considering 73/90 (removed 17) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 54/71 places, 73/90 transitions.
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:32:03] [INFO ] Input system was already deterministic with 73 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 71/71 places, 90/90 transitions.
Graph (complete) has 198 edges and 71 vertex of which 66 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.1 ms
Discarding 5 places :
Also discarding 5 output transitions
Drop transitions removed 5 transitions
Performed 6 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 6 Pre rules applied. Total rules applied 1 place count 66 transition count 79
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 0 with 12 rules applied. Total rules applied 13 place count 60 transition count 79
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 19 place count 54 transition count 73
Iterating global reduction 0 with 6 rules applied. Total rules applied 25 place count 54 transition count 73
Applied a total of 25 rules in 10 ms. Remains 54 /71 variables (removed 17) and now considering 73/90 (removed 17) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 54/71 places, 73/90 transitions.
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 3 ms
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:32:03] [INFO ] Input system was already deterministic with 73 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 90/90 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 65 transition count 84
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 65 transition count 84
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 18 place count 59 transition count 78
Iterating global reduction 0 with 6 rules applied. Total rules applied 24 place count 59 transition count 78
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 28 place count 55 transition count 74
Iterating global reduction 0 with 4 rules applied. Total rules applied 32 place count 55 transition count 74
Applied a total of 32 rules in 5 ms. Remains 55 /71 variables (removed 16) and now considering 74/90 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 55/71 places, 74/90 transitions.
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:32:03] [INFO ] Input system was already deterministic with 74 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 90/90 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 67 transition count 86
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 67 transition count 86
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 11 place count 64 transition count 83
Iterating global reduction 0 with 3 rules applied. Total rules applied 14 place count 64 transition count 83
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 16 place count 62 transition count 81
Iterating global reduction 0 with 2 rules applied. Total rules applied 18 place count 62 transition count 81
Applied a total of 18 rules in 5 ms. Remains 62 /71 variables (removed 9) and now considering 81/90 (removed 9) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 62/71 places, 81/90 transitions.
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:32:03] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 90/90 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 65 transition count 84
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 65 transition count 84
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 18 place count 59 transition count 78
Iterating global reduction 0 with 6 rules applied. Total rules applied 24 place count 59 transition count 78
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 28 place count 55 transition count 74
Iterating global reduction 0 with 4 rules applied. Total rules applied 32 place count 55 transition count 74
Applied a total of 32 rules in 4 ms. Remains 55 /71 variables (removed 16) and now considering 74/90 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 55/71 places, 74/90 transitions.
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:32:03] [INFO ] Input system was already deterministic with 74 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 90/90 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 65 transition count 84
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 65 transition count 84
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 18 place count 59 transition count 78
Iterating global reduction 0 with 6 rules applied. Total rules applied 24 place count 59 transition count 78
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 28 place count 55 transition count 74
Iterating global reduction 0 with 4 rules applied. Total rules applied 32 place count 55 transition count 74
Applied a total of 32 rules in 4 ms. Remains 55 /71 variables (removed 16) and now considering 74/90 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 55/71 places, 74/90 transitions.
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:32:03] [INFO ] Input system was already deterministic with 74 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 90/90 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 65 transition count 84
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 65 transition count 84
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 17 place count 60 transition count 79
Iterating global reduction 0 with 5 rules applied. Total rules applied 22 place count 60 transition count 79
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 26 place count 56 transition count 75
Iterating global reduction 0 with 4 rules applied. Total rules applied 30 place count 56 transition count 75
Applied a total of 30 rules in 3 ms. Remains 56 /71 variables (removed 15) and now considering 75/90 (removed 15) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 56/71 places, 75/90 transitions.
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:32:03] [INFO ] Input system was already deterministic with 75 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 90/90 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 65 transition count 84
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 65 transition count 84
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 17 place count 60 transition count 79
Iterating global reduction 0 with 5 rules applied. Total rules applied 22 place count 60 transition count 79
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 25 place count 57 transition count 76
Iterating global reduction 0 with 3 rules applied. Total rules applied 28 place count 57 transition count 76
Applied a total of 28 rules in 3 ms. Remains 57 /71 variables (removed 14) and now considering 76/90 (removed 14) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 57/71 places, 76/90 transitions.
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:32:03] [INFO ] Input system was already deterministic with 76 transitions.
Starting structural reductions in LTL mode, iteration 0 : 71/71 places, 90/90 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 65 transition count 84
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 65 transition count 84
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 18 place count 59 transition count 78
Iterating global reduction 0 with 6 rules applied. Total rules applied 24 place count 59 transition count 78
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 28 place count 55 transition count 74
Iterating global reduction 0 with 4 rules applied. Total rules applied 32 place count 55 transition count 74
Applied a total of 32 rules in 3 ms. Remains 55 /71 variables (removed 16) and now considering 74/90 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 55/71 places, 74/90 transitions.
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 4 ms
[2023-03-08 22:32:03] [INFO ] Input system was already deterministic with 74 transitions.
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 6 ms
[2023-03-08 22:32:03] [INFO ] Flatten gal took : 5 ms
[2023-03-08 22:32:03] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-08 22:32:03] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 71 places, 90 transitions and 288 arcs took 2 ms.
Total runtime 2777 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DiscoveryGPU-PT-07a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA DiscoveryGPU-PT-07a-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DiscoveryGPU-PT-07a-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678314921466

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 15 (type EXCL) for 12 DiscoveryGPU-PT-07a-CTLFireability-04
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 15 (type EXCL) for DiscoveryGPU-PT-07a-CTLFireability-04
lola: result : false
lola: markings : 141
lola: fired transitions : 557
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 DiscoveryGPU-PT-07a-CTLFireability-06
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 54 (type FNDP) for 43 DiscoveryGPU-PT-07a-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type EQUN) for 43 DiscoveryGPU-PT-07a-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SRCH) for 43 DiscoveryGPU-PT-07a-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 57 (type SRCH) for DiscoveryGPU-PT-07a-CTLFireability-14
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 54 (type FNDP) for DiscoveryGPU-PT-07a-CTLFireability-14
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 55 (type EQUN) for DiscoveryGPU-PT-07a-CTLFireability-14 (obsolete)
sara: try reading problem file /home/mcc/execution/373/CTLFireability-55.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 55 (type EQUN) for DiscoveryGPU-PT-07a-CTLFireability-14
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DiscoveryGPU-PT-07a-CTLFireability-04: CONJ false CTL model checker
DiscoveryGPU-PT-07a-CTLFireability-14: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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DiscoveryGPU-PT-07a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLFireability-11: AXAG 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DiscoveryGPU-PT-07a-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 5/276 3/32 DiscoveryGPU-PT-07a-CTLFireability-06 663518 m, 132703 m/sec, 5930777 t fired, .

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23 CTL EXCL 10/276 6/32 DiscoveryGPU-PT-07a-CTLFireability-06 1282644 m, 123825 m/sec, 12185647 t fired, .

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23 CTL EXCL 15/276 8/32 DiscoveryGPU-PT-07a-CTLFireability-06 1880921 m, 119655 m/sec, 18101627 t fired, .

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23 CTL EXCL 20/276 11/32 DiscoveryGPU-PT-07a-CTLFireability-06 2418519 m, 107519 m/sec, 23725973 t fired, .

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23 CTL EXCL 25/276 13/32 DiscoveryGPU-PT-07a-CTLFireability-06 2970266 m, 110349 m/sec, 29047124 t fired, .

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23 CTL EXCL 30/276 15/32 DiscoveryGPU-PT-07a-CTLFireability-06 3549456 m, 115838 m/sec, 34539371 t fired, .

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23 CTL EXCL 35/276 18/32 DiscoveryGPU-PT-07a-CTLFireability-06 4134415 m, 116991 m/sec, 40131630 t fired, .

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lola: result : true
lola: markings : 5314411
lola: fired transitions : 61961983
lola: time used : 62.000000
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lola: Portfolio finished: no open formulas

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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DiscoveryGPU-PT-07a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DiscoveryGPU-PT-07a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r135-smll-167819414000298"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DiscoveryGPU-PT-07a.tgz
mv DiscoveryGPU-PT-07a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;