Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r135-smll-167819413800218.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Diffusion2D-PT-D40N010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r135-smll-167819413800218
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 5.1M
-rw-r--r-- 1 mcc users 8.3K Feb 26 04:23 CTLCardinality.txt
-rw-r--r-- 1 mcc users 75K Feb 26 04:23 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Feb 26 04:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K Feb 26 04:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.2K Feb 25 15:58 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 15:58 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 25 15:58 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:58 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 04:24 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 113K Feb 26 04:24 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 26 04:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 86K Feb 26 04:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 15:58 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 15:58 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 4.7M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Diffusion2D-PT-D40N010-CTLFireability-00
FORMULA_NAME Diffusion2D-PT-D40N010-CTLFireability-01
FORMULA_NAME Diffusion2D-PT-D40N010-CTLFireability-02
FORMULA_NAME Diffusion2D-PT-D40N010-CTLFireability-03
FORMULA_NAME Diffusion2D-PT-D40N010-CTLFireability-04
FORMULA_NAME Diffusion2D-PT-D40N010-CTLFireability-05
FORMULA_NAME Diffusion2D-PT-D40N010-CTLFireability-06
FORMULA_NAME Diffusion2D-PT-D40N010-CTLFireability-07
FORMULA_NAME Diffusion2D-PT-D40N010-CTLFireability-08
FORMULA_NAME Diffusion2D-PT-D40N010-CTLFireability-09
FORMULA_NAME Diffusion2D-PT-D40N010-CTLFireability-10
FORMULA_NAME Diffusion2D-PT-D40N010-CTLFireability-11
FORMULA_NAME Diffusion2D-PT-D40N010-CTLFireability-12
FORMULA_NAME Diffusion2D-PT-D40N010-CTLFireability-13
FORMULA_NAME Diffusion2D-PT-D40N010-CTLFireability-14
FORMULA_NAME Diffusion2D-PT-D40N010-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678294946719

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Diffusion2D-PT-D40N010
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 17:02:30] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-08 17:02:30] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 17:02:31] [INFO ] Load time of PNML (sax parser for PT used): 833 ms
[2023-03-08 17:02:31] [INFO ] Transformed 1600 places.
[2023-03-08 17:02:31] [INFO ] Transformed 12324 transitions.
[2023-03-08 17:02:31] [INFO ] Parsed PT model containing 1600 places and 12324 transitions and 24648 arcs in 1137 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 21 ms.
Support contains 105 out of 1600 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 711 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
// Phase 1: matrix 12324 rows 1600 cols
[2023-03-08 17:02:32] [INFO ] Computed 1 place invariants in 189 ms
[2023-03-08 17:02:33] [INFO ] Implicit Places using invariants in 936 ms returned []
Implicit Place search using SMT only with invariants took 980 ms to find 0 implicit places.
[2023-03-08 17:02:33] [INFO ] Invariant cache hit.
[2023-03-08 17:02:41] [INFO ] Dead Transitions using invariants and state equation in 7764 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9484 ms. Remains : 1600/1600 places, 12324/12324 transitions.
Support contains 105 out of 1600 places after structural reductions.
[2023-03-08 17:02:42] [INFO ] Flatten gal took : 615 ms
[2023-03-08 17:02:42] [INFO ] Flatten gal took : 270 ms
[2023-03-08 17:02:43] [INFO ] Input system was already deterministic with 12324 transitions.
Incomplete random walk after 10005 steps, including 2 resets, run finished after 357 ms. (steps per millisecond=28 ) properties (out of 77) seen :26
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=142 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 51) seen :0
Running SMT prover for 51 properties.
[2023-03-08 17:02:44] [INFO ] Invariant cache hit.
[2023-03-08 17:02:47] [INFO ] [Real]Absence check using 1 positive place invariants in 26 ms returned sat
[2023-03-08 17:03:09] [INFO ] After 19789ms SMT Verify possible using state equation in real domain returned unsat :0 sat :31 real:20
[2023-03-08 17:03:09] [INFO ] After 19824ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :31 real:20
Attempting to minimize the solution found.
Minimization took 8 ms.
[2023-03-08 17:03:09] [INFO ] After 25075ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :31 real:20
[2023-03-08 17:03:11] [INFO ] [Nat]Absence check using 1 positive place invariants in 17 ms returned sat
[2023-03-08 17:03:34] [INFO ] After 21208ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :51
[2023-03-08 17:03:34] [INFO ] After 21211ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :51
Attempting to minimize the solution found.
Minimization took 4 ms.
[2023-03-08 17:03:34] [INFO ] After 25170ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :51
Fused 51 Parikh solutions to 39 different solutions.
Parikh walk visited 49 properties in 21803 ms.
Support contains 2 out of 1600 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Graph (trivial) has 12298 edges and 1600 vertex of which 1598 / 1600 are part of one of the 1 SCC in 34 ms
Free SCC test removed 1597 places
Drop transitions removed 12298 transitions
Ensure Unique test removed 22 transitions
Reduce isomorphic transitions removed 12320 transitions.
Applied a total of 1 rules in 68 ms. Remains 3 /1600 variables (removed 1597) and now considering 4/12324 (removed 12320) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 76 ms. Remains : 3/1600 places, 4/12324 transitions.
Finished random walk after 111 steps, including 0 resets, run visited all 2 properties in 1 ms. (steps per millisecond=111 )
[2023-03-08 17:03:57] [INFO ] Flatten gal took : 230 ms
[2023-03-08 17:03:57] [INFO ] Flatten gal took : 239 ms
[2023-03-08 17:03:57] [INFO ] Input system was already deterministic with 12324 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Graph (trivial) has 12250 edges and 1600 vertex of which 1595 / 1600 are part of one of the 1 SCC in 13 ms
Free SCC test removed 1594 places
Ensure Unique test removed 12313 transitions
Reduce isomorphic transitions removed 12313 transitions.
Applied a total of 1 rules in 42 ms. Remains 6 /1600 variables (removed 1594) and now considering 11/12324 (removed 12313) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 43 ms. Remains : 6/1600 places, 11/12324 transitions.
[2023-03-08 17:03:58] [INFO ] Flatten gal took : 1 ms
[2023-03-08 17:03:58] [INFO ] Flatten gal took : 0 ms
[2023-03-08 17:03:58] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Graph (trivial) has 12180 edges and 1600 vertex of which 1591 / 1600 are part of one of the 1 SCC in 11 ms
Free SCC test removed 1590 places
Ensure Unique test removed 12305 transitions
Reduce isomorphic transitions removed 12305 transitions.
Applied a total of 1 rules in 34 ms. Remains 10 /1600 variables (removed 1590) and now considering 19/12324 (removed 12305) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 35 ms. Remains : 10/1600 places, 19/12324 transitions.
[2023-03-08 17:03:58] [INFO ] Flatten gal took : 1 ms
[2023-03-08 17:03:58] [INFO ] Flatten gal took : 1 ms
[2023-03-08 17:03:58] [INFO ] Input system was already deterministic with 19 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Graph (trivial) has 12314 edges and 1600 vertex of which 1599 / 1600 are part of one of the 1 SCC in 4 ms
Free SCC test removed 1598 places
Ensure Unique test removed 12321 transitions
Reduce isomorphic transitions removed 12321 transitions.
Applied a total of 1 rules in 21 ms. Remains 2 /1600 variables (removed 1598) and now considering 3/12324 (removed 12321) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 22 ms. Remains : 2/1600 places, 3/12324 transitions.
[2023-03-08 17:03:58] [INFO ] Flatten gal took : 1 ms
[2023-03-08 17:03:58] [INFO ] Flatten gal took : 0 ms
[2023-03-08 17:03:58] [INFO ] Input system was already deterministic with 3 transitions.
Finished random walk after 1 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=1 )
FORMULA Diffusion2D-PT-D40N010-CTLFireability-02 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Graph (trivial) has 12244 edges and 1600 vertex of which 1595 / 1600 are part of one of the 1 SCC in 5 ms
Free SCC test removed 1594 places
Ensure Unique test removed 12313 transitions
Reduce isomorphic transitions removed 12313 transitions.
Applied a total of 1 rules in 18 ms. Remains 6 /1600 variables (removed 1594) and now considering 11/12324 (removed 12313) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 6/1600 places, 11/12324 transitions.
[2023-03-08 17:03:58] [INFO ] Flatten gal took : 0 ms
[2023-03-08 17:03:58] [INFO ] Flatten gal took : 0 ms
[2023-03-08 17:03:58] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 400 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 406 ms. Remains : 1600/1600 places, 12324/12324 transitions.
[2023-03-08 17:03:58] [INFO ] Flatten gal took : 205 ms
[2023-03-08 17:03:59] [INFO ] Flatten gal took : 209 ms
[2023-03-08 17:03:59] [INFO ] Input system was already deterministic with 12324 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Graph (trivial) has 12308 edges and 1600 vertex of which 1599 / 1600 are part of one of the 1 SCC in 4 ms
Free SCC test removed 1598 places
Ensure Unique test removed 12321 transitions
Reduce isomorphic transitions removed 12321 transitions.
Applied a total of 1 rules in 16 ms. Remains 2 /1600 variables (removed 1598) and now considering 3/12324 (removed 12321) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 16 ms. Remains : 2/1600 places, 3/12324 transitions.
[2023-03-08 17:03:59] [INFO ] Flatten gal took : 0 ms
[2023-03-08 17:03:59] [INFO ] Flatten gal took : 0 ms
[2023-03-08 17:03:59] [INFO ] Input system was already deterministic with 3 transitions.
Finished random walk after 1 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=1 )
FORMULA Diffusion2D-PT-D40N010-CTLFireability-05 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 204 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 208 ms. Remains : 1600/1600 places, 12324/12324 transitions.
[2023-03-08 17:03:59] [INFO ] Flatten gal took : 189 ms
[2023-03-08 17:04:00] [INFO ] Flatten gal took : 181 ms
[2023-03-08 17:04:00] [INFO ] Input system was already deterministic with 12324 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 204 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 208 ms. Remains : 1600/1600 places, 12324/12324 transitions.
[2023-03-08 17:04:00] [INFO ] Flatten gal took : 181 ms
[2023-03-08 17:04:01] [INFO ] Flatten gal took : 188 ms
[2023-03-08 17:04:01] [INFO ] Input system was already deterministic with 12324 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 224 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 226 ms. Remains : 1600/1600 places, 12324/12324 transitions.
[2023-03-08 17:04:01] [INFO ] Flatten gal took : 199 ms
[2023-03-08 17:04:02] [INFO ] Flatten gal took : 212 ms
[2023-03-08 17:04:02] [INFO ] Input system was already deterministic with 12324 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 201 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 202 ms. Remains : 1600/1600 places, 12324/12324 transitions.
[2023-03-08 17:04:03] [INFO ] Flatten gal took : 175 ms
[2023-03-08 17:04:03] [INFO ] Flatten gal took : 186 ms
[2023-03-08 17:04:03] [INFO ] Input system was already deterministic with 12324 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Graph (trivial) has 12308 edges and 1600 vertex of which 1599 / 1600 are part of one of the 1 SCC in 10 ms
Free SCC test removed 1598 places
Ensure Unique test removed 12321 transitions
Reduce isomorphic transitions removed 12321 transitions.
Applied a total of 1 rules in 20 ms. Remains 2 /1600 variables (removed 1598) and now considering 3/12324 (removed 12321) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 21 ms. Remains : 2/1600 places, 3/12324 transitions.
[2023-03-08 17:04:03] [INFO ] Flatten gal took : 0 ms
[2023-03-08 17:04:03] [INFO ] Flatten gal took : 0 ms
[2023-03-08 17:04:03] [INFO ] Input system was already deterministic with 3 transitions.
Finished random walk after 1 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=1 )
FORMULA Diffusion2D-PT-D40N010-CTLFireability-10 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 240 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 242 ms. Remains : 1600/1600 places, 12324/12324 transitions.
[2023-03-08 17:04:04] [INFO ] Flatten gal took : 183 ms
[2023-03-08 17:04:04] [INFO ] Flatten gal took : 187 ms
[2023-03-08 17:04:04] [INFO ] Input system was already deterministic with 12324 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Graph (trivial) has 12308 edges and 1600 vertex of which 1599 / 1600 are part of one of the 1 SCC in 4 ms
Free SCC test removed 1598 places
Ensure Unique test removed 12321 transitions
Reduce isomorphic transitions removed 12321 transitions.
Applied a total of 1 rules in 13 ms. Remains 2 /1600 variables (removed 1598) and now considering 3/12324 (removed 12321) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 2/1600 places, 3/12324 transitions.
[2023-03-08 17:04:04] [INFO ] Flatten gal took : 0 ms
[2023-03-08 17:04:04] [INFO ] Flatten gal took : 0 ms
[2023-03-08 17:04:04] [INFO ] Input system was already deterministic with 3 transitions.
Finished random walk after 1 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=1 )
FORMULA Diffusion2D-PT-D40N010-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 211 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 212 ms. Remains : 1600/1600 places, 12324/12324 transitions.
[2023-03-08 17:04:05] [INFO ] Flatten gal took : 181 ms
[2023-03-08 17:04:05] [INFO ] Flatten gal took : 195 ms
[2023-03-08 17:04:05] [INFO ] Input system was already deterministic with 12324 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 215 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 216 ms. Remains : 1600/1600 places, 12324/12324 transitions.
[2023-03-08 17:04:06] [INFO ] Flatten gal took : 190 ms
[2023-03-08 17:04:06] [INFO ] Flatten gal took : 182 ms
[2023-03-08 17:04:06] [INFO ] Input system was already deterministic with 12324 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1600/1600 places, 12324/12324 transitions.
Applied a total of 0 rules in 206 ms. Remains 1600 /1600 variables (removed 0) and now considering 12324/12324 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 207 ms. Remains : 1600/1600 places, 12324/12324 transitions.
[2023-03-08 17:04:07] [INFO ] Flatten gal took : 182 ms
[2023-03-08 17:04:07] [INFO ] Flatten gal took : 192 ms
[2023-03-08 17:04:07] [INFO ] Input system was already deterministic with 12324 transitions.
[2023-03-08 17:04:07] [INFO ] Flatten gal took : 182 ms
[2023-03-08 17:04:08] [INFO ] Flatten gal took : 206 ms
[2023-03-08 17:04:08] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 6 ms.
[2023-03-08 17:04:08] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 1600 places, 12324 transitions and 24648 arcs took 57 ms.
Total runtime 97824 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Diffusion2D-PT-D40N010
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA Diffusion2D-PT-D40N010-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D40N010-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D40N010-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D40N010-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D40N010-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D40N010-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678296373342

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Diffusion2D-PT-D40N010-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 7 (type EXCL) for 6 Diffusion2D-PT-D40N010-CTLFireability-03
lola: time limit : 298 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for Diffusion2D-PT-D40N010-CTLFireability-03
lola: result : false
lola: markings : 13
lola: fired transitions : 36
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 4 (type EXCL) for 3 Diffusion2D-PT-D40N010-CTLFireability-01
lola: time limit : 325 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 4 (type EXCL) for Diffusion2D-PT-D40N010-CTLFireability-01
lola: result : true
lola: markings : 92378
lola: fired transitions : 1468373
lola: time used : 2.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 Diffusion2D-PT-D40N010-CTLFireability-00
lola: time limit : 357 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for Diffusion2D-PT-D40N010-CTLFireability-00
lola: result : true
lola: markings : 3
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 28 (type EXCL) for 27 Diffusion2D-PT-D40N010-CTLFireability-13
lola: time limit : 397 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Diffusion2D-PT-D40N010-CTLFireability-00: CTL true CTL model checker
Diffusion2D-PT-D40N010-CTLFireability-01: CTL true CTL model checker
Diffusion2D-PT-D40N010-CTLFireability-03: CTL false CTL model checker

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Diffusion2D-PT-D40N010-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-09: CTL 1 0 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 1/397 1/32 Diffusion2D-PT-D40N010-CTLFireability-13 8016 m, 1603 m/sec, 41882 t fired, .

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lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Diffusion2D-PT-D40N010-CTLFireability-00: CTL true CTL model checker
Diffusion2D-PT-D40N010-CTLFireability-01: CTL true CTL model checker
Diffusion2D-PT-D40N010-CTLFireability-03: CTL false CTL model checker

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Diffusion2D-PT-D40N010-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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28 CTL EXCL 6/397 1/32 Diffusion2D-PT-D40N010-CTLFireability-13 33685 m, 5133 m/sec, 342026 t fired, .

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Diffusion2D-PT-D40N010-CTLFireability-01: CTL true CTL model checker
Diffusion2D-PT-D40N010-CTLFireability-03: CTL false CTL model checker

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Diffusion2D-PT-D40N010-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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28 CTL EXCL 11/397 2/32 Diffusion2D-PT-D40N010-CTLFireability-13 72951 m, 7853 m/sec, 634425 t fired, .

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Diffusion2D-PT-D40N010-CTLFireability-00: CTL true CTL model checker
Diffusion2D-PT-D40N010-CTLFireability-01: CTL true CTL model checker
Diffusion2D-PT-D40N010-CTLFireability-03: CTL false CTL model checker

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Diffusion2D-PT-D40N010-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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28 CTL EXCL 16/397 2/32 Diffusion2D-PT-D40N010-CTLFireability-13 129561 m, 11322 m/sec, 939076 t fired, .

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Diffusion2D-PT-D40N010-CTLFireability-00: CTL true CTL model checker
Diffusion2D-PT-D40N010-CTLFireability-01: CTL true CTL model checker
Diffusion2D-PT-D40N010-CTLFireability-03: CTL false CTL model checker

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Diffusion2D-PT-D40N010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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28 CTL EXCL 21/397 2/32 Diffusion2D-PT-D40N010-CTLFireability-13 129561 m, 0 m/sec, 1215835 t fired, .

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Diffusion2D-PT-D40N010-CTLFireability-00: CTL true CTL model checker
Diffusion2D-PT-D40N010-CTLFireability-01: CTL true CTL model checker
Diffusion2D-PT-D40N010-CTLFireability-03: CTL false CTL model checker

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Diffusion2D-PT-D40N010-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D40N010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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28 CTL EXCL 26/397 2/32 Diffusion2D-PT-D40N010-CTLFireability-13 129561 m, 0 m/sec, 1479876 t fired, .

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Diffusion2D-PT-D40N010-CTLFireability-00: CTL true CTL model checker
Diffusion2D-PT-D40N010-CTLFireability-01: CTL true CTL model checker
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28 CTL EXCL 31/397 3/32 Diffusion2D-PT-D40N010-CTLFireability-13 156804 m, 5448 m/sec, 1766541 t fired, .

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28 CTL EXCL 36/397 3/32 Diffusion2D-PT-D40N010-CTLFireability-13 179804 m, 4600 m/sec, 2050752 t fired, .

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28 CTL EXCL 41/397 4/32 Diffusion2D-PT-D40N010-CTLFireability-13 218941 m, 7827 m/sec, 2335874 t fired, .

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Diffusion2D-PT-D40N010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D40N010-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D40N010-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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Diffusion2D-PT-D40N010-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D40N010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D40N010-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D40N010-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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Diffusion2D-PT-D40N010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D40N010-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D40N010-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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Diffusion2D-PT-D40N010-CTLFireability-03: CTL false CTL model checker
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Diffusion2D-PT-D40N010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D40N010-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D40N010-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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Diffusion2D-PT-D40N010-CTLFireability-03: CTL false CTL model checker
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Diffusion2D-PT-D40N010-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D40N010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D40N010-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D40N010-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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Diffusion2D-PT-D40N010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D40N010-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D40N010-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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Diffusion2D-PT-D40N010-CTLFireability-03: CTL false CTL model checker
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Diffusion2D-PT-D40N010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D40N010-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D40N010-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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Diffusion2D-PT-D40N010-CTLFireability-03: CTL false CTL model checker
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Diffusion2D-PT-D40N010-CTLFireability-08: CTL false CTL model checker

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Diffusion2D-PT-D40N010-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D40N010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D40N010-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
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Diffusion2D-PT-D40N010-CTLFireability-01: CTL true CTL model checker
Diffusion2D-PT-D40N010-CTLFireability-03: CTL false CTL model checker
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Diffusion2D-PT-D40N010-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Diffusion2D-PT-D40N010-CTLFireability-00: CTL true CTL model checker
Diffusion2D-PT-D40N010-CTLFireability-01: CTL true CTL model checker
Diffusion2D-PT-D40N010-CTLFireability-03: CTL false CTL model checker
Diffusion2D-PT-D40N010-CTLFireability-04: CTL false CTL model checker
Diffusion2D-PT-D40N010-CTLFireability-06: CTL unknown AGGR
Diffusion2D-PT-D40N010-CTLFireability-07: CTL false CTL model checker
Diffusion2D-PT-D40N010-CTLFireability-08: CTL false CTL model checker
Diffusion2D-PT-D40N010-CTLFireability-09: CTL unknown AGGR
Diffusion2D-PT-D40N010-CTLFireability-11: CTL unknown AGGR
Diffusion2D-PT-D40N010-CTLFireability-13: CTL unknown AGGR
Diffusion2D-PT-D40N010-CTLFireability-14: CTL unknown AGGR
Diffusion2D-PT-D40N010-CTLFireability-15: CTL unknown AGGR


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Diffusion2D-PT-D40N010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Diffusion2D-PT-D40N010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r135-smll-167819413800218"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Diffusion2D-PT-D40N010.tgz
mv Diffusion2D-PT-D40N010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;