fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r135-smll-167819413500114
Last Updated
May 14, 2023

About the Execution of LoLa+red for Diffusion2D-PT-D10N010

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
7172.388 293844.00 291278.00 1393.00 ?FTFFT?T???TTTTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r135-smll-167819413500114.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Diffusion2D-PT-D10N010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r135-smll-167819413500114
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 640K
-rw-r--r-- 1 mcc users 6.7K Feb 26 04:01 CTLCardinality.txt
-rw-r--r-- 1 mcc users 61K Feb 26 04:01 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Feb 26 04:00 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Feb 26 04:00 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.3K Feb 25 15:57 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 15:57 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Feb 25 15:57 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:57 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.3K Feb 26 04:02 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 69K Feb 26 04:02 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.2K Feb 26 04:02 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 58K Feb 26 04:02 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 15:57 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:57 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 255K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Diffusion2D-PT-D10N010-CTLFireability-00
FORMULA_NAME Diffusion2D-PT-D10N010-CTLFireability-01
FORMULA_NAME Diffusion2D-PT-D10N010-CTLFireability-02
FORMULA_NAME Diffusion2D-PT-D10N010-CTLFireability-03
FORMULA_NAME Diffusion2D-PT-D10N010-CTLFireability-04
FORMULA_NAME Diffusion2D-PT-D10N010-CTLFireability-05
FORMULA_NAME Diffusion2D-PT-D10N010-CTLFireability-06
FORMULA_NAME Diffusion2D-PT-D10N010-CTLFireability-07
FORMULA_NAME Diffusion2D-PT-D10N010-CTLFireability-08
FORMULA_NAME Diffusion2D-PT-D10N010-CTLFireability-09
FORMULA_NAME Diffusion2D-PT-D10N010-CTLFireability-10
FORMULA_NAME Diffusion2D-PT-D10N010-CTLFireability-11
FORMULA_NAME Diffusion2D-PT-D10N010-CTLFireability-12
FORMULA_NAME Diffusion2D-PT-D10N010-CTLFireability-13
FORMULA_NAME Diffusion2D-PT-D10N010-CTLFireability-14
FORMULA_NAME Diffusion2D-PT-D10N010-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678282449507

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Diffusion2D-PT-D10N010
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 13:34:12] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-08 13:34:12] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 13:34:12] [INFO ] Load time of PNML (sax parser for PT used): 130 ms
[2023-03-08 13:34:12] [INFO ] Transformed 100 places.
[2023-03-08 13:34:12] [INFO ] Transformed 684 transitions.
[2023-03-08 13:34:12] [INFO ] Parsed PT model containing 100 places and 684 transitions and 1368 arcs in 241 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 14 ms.
Initial state reduction rules removed 1 formulas.
FORMULA Diffusion2D-PT-D10N010-CTLFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 66 out of 100 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 24 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
// Phase 1: matrix 684 rows 100 cols
[2023-03-08 13:34:12] [INFO ] Computed 1 place invariants in 24 ms
[2023-03-08 13:34:12] [INFO ] Implicit Places using invariants in 228 ms returned []
[2023-03-08 13:34:12] [INFO ] Invariant cache hit.
[2023-03-08 13:34:12] [INFO ] Implicit Places using invariants and state equation in 276 ms returned []
Implicit Place search using SMT with State Equation took 546 ms to find 0 implicit places.
[2023-03-08 13:34:12] [INFO ] Invariant cache hit.
[2023-03-08 13:34:13] [INFO ] Dead Transitions using invariants and state equation in 490 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1068 ms. Remains : 100/100 places, 684/684 transitions.
Support contains 66 out of 100 places after structural reductions.
[2023-03-08 13:34:13] [INFO ] Flatten gal took : 99 ms
[2023-03-08 13:34:13] [INFO ] Flatten gal took : 39 ms
[2023-03-08 13:34:13] [INFO ] Input system was already deterministic with 684 transitions.
Support contains 63 out of 100 places (down from 66) after GAL structural reductions.
Incomplete random walk after 10003 steps, including 2 resets, run finished after 390 ms. (steps per millisecond=25 ) properties (out of 62) seen :55
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 7) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 6) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 5) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=666 ) properties (out of 4) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=714 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
[2023-03-08 13:34:14] [INFO ] Invariant cache hit.
[2023-03-08 13:34:14] [INFO ] [Real]Absence check using 1 positive place invariants in 2 ms returned sat
[2023-03-08 13:34:14] [INFO ] After 353ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-08 13:34:14] [INFO ] [Nat]Absence check using 1 positive place invariants in 2 ms returned sat
[2023-03-08 13:34:15] [INFO ] After 251ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2023-03-08 13:34:15] [INFO ] After 384ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 81 ms.
[2023-03-08 13:34:15] [INFO ] After 536ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Finished Parikh walk after 278 steps, including 0 resets, run visited all 1 properties in 3 ms. (steps per millisecond=92 )
Parikh walk visited 3 properties in 15 ms.
[2023-03-08 13:34:15] [INFO ] Flatten gal took : 28 ms
[2023-03-08 13:34:15] [INFO ] Flatten gal took : 29 ms
[2023-03-08 13:34:15] [INFO ] Input system was already deterministic with 684 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 12 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:34:15] [INFO ] Flatten gal took : 26 ms
[2023-03-08 13:34:15] [INFO ] Flatten gal took : 25 ms
[2023-03-08 13:34:15] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Graph (trivial) has 620 edges and 100 vertex of which 96 / 100 are part of one of the 1 SCC in 5 ms
Free SCC test removed 95 places
Ensure Unique test removed 675 transitions
Reduce isomorphic transitions removed 675 transitions.
Applied a total of 1 rules in 13 ms. Remains 5 /100 variables (removed 95) and now considering 9/684 (removed 675) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 5/100 places, 9/684 transitions.
[2023-03-08 13:34:15] [INFO ] Flatten gal took : 1 ms
[2023-03-08 13:34:15] [INFO ] Flatten gal took : 1 ms
[2023-03-08 13:34:15] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 11 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:34:15] [INFO ] Flatten gal took : 21 ms
[2023-03-08 13:34:15] [INFO ] Flatten gal took : 20 ms
[2023-03-08 13:34:15] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 11 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:34:15] [INFO ] Flatten gal took : 17 ms
[2023-03-08 13:34:15] [INFO ] Flatten gal took : 17 ms
[2023-03-08 13:34:15] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 5 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:34:15] [INFO ] Flatten gal took : 17 ms
[2023-03-08 13:34:15] [INFO ] Flatten gal took : 16 ms
[2023-03-08 13:34:16] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 4 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 15 ms
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 15 ms
[2023-03-08 13:34:16] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 3 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 14 ms
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 14 ms
[2023-03-08 13:34:16] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Graph (trivial) has 606 edges and 100 vertex of which 95 / 100 are part of one of the 1 SCC in 1 ms
Free SCC test removed 94 places
Ensure Unique test removed 671 transitions
Reduce isomorphic transitions removed 671 transitions.
Applied a total of 1 rules in 5 ms. Remains 6 /100 variables (removed 94) and now considering 13/684 (removed 671) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 6/100 places, 13/684 transitions.
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 1 ms
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 0 ms
[2023-03-08 13:34:16] [INFO ] Input system was already deterministic with 13 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 4 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 13 ms
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 14 ms
[2023-03-08 13:34:16] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 4 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 13 ms
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 14 ms
[2023-03-08 13:34:16] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 4 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 13 ms
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 12 ms
[2023-03-08 13:34:16] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Graph (trivial) has 618 edges and 100 vertex of which 95 / 100 are part of one of the 1 SCC in 1 ms
Free SCC test removed 94 places
Ensure Unique test removed 671 transitions
Reduce isomorphic transitions removed 671 transitions.
Applied a total of 1 rules in 5 ms. Remains 6 /100 variables (removed 94) and now considering 13/684 (removed 671) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 6/100 places, 13/684 transitions.
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 1 ms
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 1 ms
[2023-03-08 13:34:16] [INFO ] Input system was already deterministic with 13 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Graph (trivial) has 652 edges and 100 vertex of which 98 / 100 are part of one of the 1 SCC in 1 ms
Free SCC test removed 97 places
Ensure Unique test removed 679 transitions
Reduce isomorphic transitions removed 679 transitions.
Applied a total of 1 rules in 4 ms. Remains 3 /100 variables (removed 97) and now considering 5/684 (removed 679) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 3/100 places, 5/684 transitions.
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 0 ms
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 0 ms
[2023-03-08 13:34:16] [INFO ] Input system was already deterministic with 5 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 4 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 14 ms
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 14 ms
[2023-03-08 13:34:16] [INFO ] Input system was already deterministic with 684 transitions.
Starting structural reductions in LTL mode, iteration 0 : 100/100 places, 684/684 transitions.
Applied a total of 0 rules in 3 ms. Remains 100 /100 variables (removed 0) and now considering 684/684 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 100/100 places, 684/684 transitions.
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 13 ms
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 13 ms
[2023-03-08 13:34:16] [INFO ] Input system was already deterministic with 684 transitions.
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 13 ms
[2023-03-08 13:34:16] [INFO ] Flatten gal took : 12 ms
[2023-03-08 13:34:16] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-08 13:34:16] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 100 places, 684 transitions and 1368 arcs took 3 ms.
Total runtime 4537 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Diffusion2D-PT-D10N010
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA Diffusion2D-PT-D10N010-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D10N010-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D10N010-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D10N010-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D10N010-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D10N010-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D10N010-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D10N010-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D10N010-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Diffusion2D-PT-D10N010-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678282743351

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 10 (type EXCL) for 9 Diffusion2D-PT-D10N010-CTLFireability-03
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 49 (type FNDP) for 33 Diffusion2D-PT-D10N010-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 33 Diffusion2D-PT-D10N010-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type SRCH) for 33 Diffusion2D-PT-D10N010-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 52 (type SRCH) for Diffusion2D-PT-D10N010-CTLFireability-11
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for Diffusion2D-PT-D10N010-CTLFireability-11 (obsolete)
lola: CANCELED task # 50 (type EQUN) for Diffusion2D-PT-D10N010-CTLFireability-11 (obsolete)
lola: FINISHED task # 49 (type FNDP) for Diffusion2D-PT-D10N010-CTLFireability-11
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
sara: try reading problem file /home/mcc/execution/373/CTLFireability-50.sara.
sara: place or transition ordering is non-deterministic

lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 50 (type EQUN) for Diffusion2D-PT-D10N010-CTLFireability-11
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Diffusion2D-PT-D10N010-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-11: CONJ 0 1 0 0 5 0 0 1
Diffusion2D-PT-D10N010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 5/240 5/32 Diffusion2D-PT-D10N010-CTLFireability-03 889937 m, 177987 m/sec, 3272897 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Diffusion2D-PT-D10N010-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-11: CONJ 0 1 0 0 5 0 0 1
Diffusion2D-PT-D10N010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 10/240 9/32 Diffusion2D-PT-D10N010-CTLFireability-03 1765932 m, 175199 m/sec, 6493557 t fired, .

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lola: FINISHED task # 10 (type EXCL) for Diffusion2D-PT-D10N010-CTLFireability-03
lola: result : false
lola: markings : 1792919
lola: fired transitions : 6600341
lola: time used : 11.000000
lola: memory pages used : 9
lola: LAUNCH task # 47 (type EXCL) for 46 Diffusion2D-PT-D10N010-CTLFireability-14
lola: time limit : 256 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for Diffusion2D-PT-D10N010-CTLFireability-14
lola: result : true
lola: markings : 5
lola: fired transitions : 27
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 43 Diffusion2D-PT-D10N010-CTLFireability-13
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for Diffusion2D-PT-D10N010-CTLFireability-13
lola: result : true
lola: markings : 163335
lola: fired transitions : 1208248
lola: time used : 2.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 Diffusion2D-PT-D10N010-CTLFireability-10
lola: time limit : 298 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Diffusion2D-PT-D10N010-CTLFireability-03: CTL false CTL model checker
Diffusion2D-PT-D10N010-CTLFireability-13: CTL true CTL model checker
Diffusion2D-PT-D10N010-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Diffusion2D-PT-D10N010-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-11: CONJ 0 1 0 0 5 0 0 1
Diffusion2D-PT-D10N010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 2/298 3/32 Diffusion2D-PT-D10N010-CTLFireability-10 428913 m, 85782 m/sec, 2059274 t fired, .

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Diffusion2D-PT-D10N010-CTLFireability-03: CTL false CTL model checker
Diffusion2D-PT-D10N010-CTLFireability-13: CTL true CTL model checker
Diffusion2D-PT-D10N010-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Diffusion2D-PT-D10N010-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-11: CONJ 0 1 0 0 5 0 0 1
Diffusion2D-PT-D10N010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 7/298 7/32 Diffusion2D-PT-D10N010-CTLFireability-10 1232583 m, 160734 m/sec, 5921592 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Diffusion2D-PT-D10N010-CTLFireability-03: CTL false CTL model checker
Diffusion2D-PT-D10N010-CTLFireability-13: CTL true CTL model checker
Diffusion2D-PT-D10N010-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Diffusion2D-PT-D10N010-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D10N010-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
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28 CTL EXCL 40/322 22/32 Diffusion2D-PT-D10N010-CTLFireability-09 4458140 m, 111187 m/sec, 29335633 t fired, .

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Diffusion2D-PT-D10N010-CTLFireability-14: CTL true CTL model checker

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Diffusion2D-PT-D10N010-CTLFireability-11: CONJ 0 1 0 0 5 0 0 1
Diffusion2D-PT-D10N010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 65/381 28/32 Diffusion2D-PT-D10N010-CTLFireability-06 5490395 m, 80878 m/sec, 47881638 t fired, .

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Diffusion2D-PT-D10N010-CTLFireability-11: CONJ 0 1 0 0 5 0 0 1
Diffusion2D-PT-D10N010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

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19 CTL EXCL 70/381 30/32 Diffusion2D-PT-D10N010-CTLFireability-06 5902453 m, 82411 m/sec, 51479504 t fired, .

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Diffusion2D-PT-D10N010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

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19 CTL EXCL 75/381 32/32 Diffusion2D-PT-D10N010-CTLFireability-06 6322874 m, 84084 m/sec, 55126191 t fired, .

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Diffusion2D-PT-D10N010-CTLFireability-14: CTL true CTL model checker

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Diffusion2D-PT-D10N010-CTLFireability-11: CONJ 0 1 0 0 5 0 0 1
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Diffusion2D-PT-D10N010-CTLFireability-05: CTL true CTL model checker
Diffusion2D-PT-D10N010-CTLFireability-13: CTL true CTL model checker
Diffusion2D-PT-D10N010-CTLFireability-14: CTL true CTL model checker

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Diffusion2D-PT-D10N010-CTLFireability-11: CONJ 0 1 0 0 5 0 0 1
Diffusion2D-PT-D10N010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

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1 CTL EXCL 3/558 4/32 Diffusion2D-PT-D10N010-CTLFireability-00 686554 m, 137310 m/sec, 2601090 t fired, .

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Diffusion2D-PT-D10N010-CTLFireability-05: CTL true CTL model checker
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Diffusion2D-PT-D10N010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

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1 CTL EXCL 8/558 9/32 Diffusion2D-PT-D10N010-CTLFireability-00 1619793 m, 186647 m/sec, 6140269 t fired, .

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Diffusion2D-PT-D10N010-CTLFireability-05: CTL true CTL model checker
Diffusion2D-PT-D10N010-CTLFireability-13: CTL true CTL model checker
Diffusion2D-PT-D10N010-CTLFireability-14: CTL true CTL model checker

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1 CTL EXCL 13/558 13/32 Diffusion2D-PT-D10N010-CTLFireability-00 2533649 m, 182771 m/sec, 9594835 t fired, .

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1 CTL EXCL 18/558 17/32 Diffusion2D-PT-D10N010-CTLFireability-00 3443530 m, 181976 m/sec, 13038977 t fired, .

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Diffusion2D-PT-D10N010-CTLFireability-05: CTL true CTL model checker
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1 CTL EXCL 23/558 22/32 Diffusion2D-PT-D10N010-CTLFireability-00 4362469 m, 183787 m/sec, 16518283 t fired, .

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Diffusion2D-PT-D10N010-CTLFireability-11: CONJ 0 1 0 0 5 0 0 1
Diffusion2D-PT-D10N010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

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1 CTL EXCL 28/558 26/32 Diffusion2D-PT-D10N010-CTLFireability-00 5270123 m, 181530 m/sec, 19949214 t fired, .

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Diffusion2D-PT-D10N010-CTLFireability-05: CTL true CTL model checker
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Diffusion2D-PT-D10N010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

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1 CTL EXCL 33/558 31/32 Diffusion2D-PT-D10N010-CTLFireability-00 6172701 m, 180515 m/sec, 23368490 t fired, .

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Diffusion2D-PT-D10N010-CTLFireability-02: CTL true CTL model checker
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Diffusion2D-PT-D10N010-CTLFireability-05: CTL true CTL model checker
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Diffusion2D-PT-D10N010-CTLFireability-11: CONJ 0 1 0 0 5 0 0 1
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Diffusion2D-PT-D10N010-CTLFireability-00: CTL unknown AGGR
Diffusion2D-PT-D10N010-CTLFireability-01: CTL false CTL model checker
Diffusion2D-PT-D10N010-CTLFireability-02: CTL true CTL model checker
Diffusion2D-PT-D10N010-CTLFireability-03: CTL false CTL model checker
Diffusion2D-PT-D10N010-CTLFireability-04: CTL false CTL model checker
Diffusion2D-PT-D10N010-CTLFireability-05: CTL true CTL model checker
Diffusion2D-PT-D10N010-CTLFireability-06: CTL unknown AGGR
Diffusion2D-PT-D10N010-CTLFireability-07: CTL true CTL model checker
Diffusion2D-PT-D10N010-CTLFireability-08: CTL unknown AGGR
Diffusion2D-PT-D10N010-CTLFireability-09: CTL unknown AGGR
Diffusion2D-PT-D10N010-CTLFireability-10: CTL unknown AGGR
Diffusion2D-PT-D10N010-CTLFireability-11: CONJ true CONJ
Diffusion2D-PT-D10N010-CTLFireability-12: CTL true CTL model checker
Diffusion2D-PT-D10N010-CTLFireability-13: CTL true CTL model checker
Diffusion2D-PT-D10N010-CTLFireability-14: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Diffusion2D-PT-D10N010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Diffusion2D-PT-D10N010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r135-smll-167819413500114"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Diffusion2D-PT-D10N010.tgz
mv Diffusion2D-PT-D10N010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;