About the Execution of LoLa+red for Diffusion2D-PT-D05N150
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 6070.023 | 156063.00 | 158324.00 | 1065.10 | T?TFTTT??TFFFTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r135-smll-167819413400074.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Diffusion2D-PT-D05N150, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r135-smll-167819413400074
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 552K
-rw-r--r-- 1 mcc users 7.2K Feb 26 04:29 CTLCardinality.txt
-rw-r--r-- 1 mcc users 67K Feb 26 04:29 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.2K Feb 26 04:27 CTLFireability.txt
-rw-r--r-- 1 mcc users 61K Feb 26 04:27 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.3K Feb 25 15:57 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 15:57 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Feb 25 15:57 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:57 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Feb 26 04:30 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 155K Feb 26 04:30 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.9K Feb 26 04:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 65K Feb 26 04:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 15:57 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:57 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 55K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Diffusion2D-PT-D05N150-CTLFireability-00
FORMULA_NAME Diffusion2D-PT-D05N150-CTLFireability-01
FORMULA_NAME Diffusion2D-PT-D05N150-CTLFireability-02
FORMULA_NAME Diffusion2D-PT-D05N150-CTLFireability-03
FORMULA_NAME Diffusion2D-PT-D05N150-CTLFireability-04
FORMULA_NAME Diffusion2D-PT-D05N150-CTLFireability-05
FORMULA_NAME Diffusion2D-PT-D05N150-CTLFireability-06
FORMULA_NAME Diffusion2D-PT-D05N150-CTLFireability-07
FORMULA_NAME Diffusion2D-PT-D05N150-CTLFireability-08
FORMULA_NAME Diffusion2D-PT-D05N150-CTLFireability-09
FORMULA_NAME Diffusion2D-PT-D05N150-CTLFireability-10
FORMULA_NAME Diffusion2D-PT-D05N150-CTLFireability-11
FORMULA_NAME Diffusion2D-PT-D05N150-CTLFireability-12
FORMULA_NAME Diffusion2D-PT-D05N150-CTLFireability-13
FORMULA_NAME Diffusion2D-PT-D05N150-CTLFireability-14
FORMULA_NAME Diffusion2D-PT-D05N150-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678273954435
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Diffusion2D-PT-D05N150
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 11:12:36] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-08 11:12:37] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 11:12:37] [INFO ] Load time of PNML (sax parser for PT used): 62 ms
[2023-03-08 11:12:37] [INFO ] Transformed 25 places.
[2023-03-08 11:12:37] [INFO ] Transformed 144 transitions.
[2023-03-08 11:12:37] [INFO ] Parsed PT model containing 25 places and 144 transitions and 288 arcs in 150 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 16 ms.
Initial state reduction rules removed 3 formulas.
FORMULA Diffusion2D-PT-D05N150-CTLFireability-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Diffusion2D-PT-D05N150-CTLFireability-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Diffusion2D-PT-D05N150-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 24 out of 25 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Applied a total of 0 rules in 14 ms. Remains 25 /25 variables (removed 0) and now considering 144/144 (removed 0) transitions.
// Phase 1: matrix 144 rows 25 cols
[2023-03-08 11:12:37] [INFO ] Computed 1 place invariants in 14 ms
[2023-03-08 11:12:37] [INFO ] Implicit Places using invariants in 173 ms returned []
[2023-03-08 11:12:37] [INFO ] Invariant cache hit.
[2023-03-08 11:12:37] [INFO ] Implicit Places using invariants and state equation in 111 ms returned []
Implicit Place search using SMT with State Equation took 322 ms to find 0 implicit places.
[2023-03-08 11:12:37] [INFO ] Invariant cache hit.
[2023-03-08 11:12:37] [INFO ] Dead Transitions using invariants and state equation in 149 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 489 ms. Remains : 25/25 places, 144/144 transitions.
Support contains 24 out of 25 places after structural reductions.
[2023-03-08 11:12:37] [INFO ] Flatten gal took : 45 ms
[2023-03-08 11:12:37] [INFO ] Flatten gal took : 15 ms
[2023-03-08 11:12:38] [INFO ] Input system was already deterministic with 144 transitions.
Incomplete random walk after 10119 steps, including 2 resets, run finished after 59 ms. (steps per millisecond=171 ) properties (out of 38) seen :28
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 10) seen :9
Finished Best-First random walk after 51 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=25 )
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 9 ms
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 11 ms
[2023-03-08 11:12:38] [INFO ] Input system was already deterministic with 144 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Applied a total of 0 rules in 3 ms. Remains 25 /25 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 25/25 places, 144/144 transitions.
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 8 ms
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 8 ms
[2023-03-08 11:12:38] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Applied a total of 0 rules in 2 ms. Remains 25 /25 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 25/25 places, 144/144 transitions.
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 7 ms
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 7 ms
[2023-03-08 11:12:38] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Applied a total of 0 rules in 2 ms. Remains 25 /25 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 25/25 places, 144/144 transitions.
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 7 ms
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 7 ms
[2023-03-08 11:12:38] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Applied a total of 0 rules in 2 ms. Remains 25 /25 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 25/25 places, 144/144 transitions.
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 7 ms
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 7 ms
[2023-03-08 11:12:38] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Applied a total of 0 rules in 2 ms. Remains 25 /25 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 25/25 places, 144/144 transitions.
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 6 ms
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 7 ms
[2023-03-08 11:12:38] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Applied a total of 0 rules in 2 ms. Remains 25 /25 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 25/25 places, 144/144 transitions.
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 6 ms
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 12 ms
[2023-03-08 11:12:38] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Applied a total of 0 rules in 2 ms. Remains 25 /25 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 25/25 places, 144/144 transitions.
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 6 ms
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 6 ms
[2023-03-08 11:12:38] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Graph (trivial) has 66 edges and 25 vertex of which 17 / 25 are part of one of the 2 SCC in 4 ms
Free SCC test removed 15 places
Ensure Unique test removed 96 transitions
Reduce isomorphic transitions removed 96 transitions.
Applied a total of 1 rules in 14 ms. Remains 10 /25 variables (removed 15) and now considering 48/144 (removed 96) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 10/25 places, 48/144 transitions.
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 3 ms
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 2 ms
[2023-03-08 11:12:38] [INFO ] Input system was already deterministic with 48 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Graph (trivial) has 94 edges and 25 vertex of which 20 / 25 are part of one of the 1 SCC in 1 ms
Free SCC test removed 19 places
Ensure Unique test removed 125 transitions
Reduce isomorphic transitions removed 125 transitions.
Applied a total of 1 rules in 4 ms. Remains 6 /25 variables (removed 19) and now considering 19/144 (removed 125) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 6/25 places, 19/144 transitions.
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 1 ms
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 1 ms
[2023-03-08 11:12:38] [INFO ] Input system was already deterministic with 19 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Applied a total of 0 rules in 2 ms. Remains 25 /25 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 25/25 places, 144/144 transitions.
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 7 ms
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 7 ms
[2023-03-08 11:12:38] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Applied a total of 0 rules in 1 ms. Remains 25 /25 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 25/25 places, 144/144 transitions.
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 6 ms
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 7 ms
[2023-03-08 11:12:38] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Applied a total of 0 rules in 1 ms. Remains 25 /25 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 25/25 places, 144/144 transitions.
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 6 ms
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 6 ms
[2023-03-08 11:12:38] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Graph (trivial) has 50 edges and 25 vertex of which 16 / 25 are part of one of the 2 SCC in 1 ms
Free SCC test removed 14 places
Ensure Unique test removed 96 transitions
Reduce isomorphic transitions removed 96 transitions.
Applied a total of 1 rules in 4 ms. Remains 11 /25 variables (removed 14) and now considering 48/144 (removed 96) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 11/25 places, 48/144 transitions.
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 3 ms
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 2 ms
[2023-03-08 11:12:38] [INFO ] Input system was already deterministic with 48 transitions.
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 6 ms
[2023-03-08 11:12:38] [INFO ] Flatten gal took : 7 ms
[2023-03-08 11:12:38] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-08 11:12:38] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 25 places, 144 transitions and 288 arcs took 1 ms.
Total runtime 1903 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Diffusion2D-PT-D05N150
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability
FORMULA Diffusion2D-PT-D05N150-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Diffusion2D-PT-D05N150-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Diffusion2D-PT-D05N150-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Diffusion2D-PT-D05N150-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Diffusion2D-PT-D05N150-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Diffusion2D-PT-D05N150-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Diffusion2D-PT-D05N150-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Diffusion2D-PT-D05N150-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Diffusion2D-PT-D05N150-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Diffusion2D-PT-D05N150-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678274110498
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 8 (type EXCL) for 7 Diffusion2D-PT-D05N150-CTLFireability-01
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Diffusion2D-PT-D05N150-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 CTL EXCL 5/257 3/32 Diffusion2D-PT-D05N150-CTLFireability-01 519653 m, 103930 m/sec, 2909052 t fired, .
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Diffusion2D-PT-D05N150-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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Diffusion2D-PT-D05N150-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
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Diffusion2D-PT-D05N150-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 CTL EXCL 10/257 5/32 Diffusion2D-PT-D05N150-CTLFireability-01 987974 m, 93664 m/sec, 5550136 t fired, .
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Diffusion2D-PT-D05N150-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 CTL EXCL 15/257 7/32 Diffusion2D-PT-D05N150-CTLFireability-01 1466219 m, 95649 m/sec, 8209563 t fired, .
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Diffusion2D-PT-D05N150-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 CTL EXCL 20/257 9/32 Diffusion2D-PT-D05N150-CTLFireability-01 1954826 m, 97721 m/sec, 10927666 t fired, .
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Diffusion2D-PT-D05N150-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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Diffusion2D-PT-D05N150-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
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Diffusion2D-PT-D05N150-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 CTL EXCL 25/257 11/32 Diffusion2D-PT-D05N150-CTLFireability-01 2453636 m, 99762 m/sec, 13695712 t fired, .
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Diffusion2D-PT-D05N150-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N150-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 CTL EXCL 30/257 13/32 Diffusion2D-PT-D05N150-CTLFireability-01 2945107 m, 98294 m/sec, 16431766 t fired, .
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Diffusion2D-PT-D05N150-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 CTL EXCL 35/257 15/32 Diffusion2D-PT-D05N150-CTLFireability-01 3468054 m, 104589 m/sec, 19369396 t fired, .
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Diffusion2D-PT-D05N150-CTLFireability-02: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-03: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-04: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-05: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-06: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-09: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-11: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-13: CTL true CTL model checker
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Diffusion2D-PT-D05N150-CTLFireability-03: CTL false CTL model checker
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Diffusion2D-PT-D05N150-CTLFireability-05: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-06: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-09: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-11: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-13: CTL true CTL model checker
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Diffusion2D-PT-D05N150-CTLFireability-00: DISJ true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-02: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-03: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-04: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-05: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-06: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-09: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-11: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-13: CTL true CTL model checker
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Diffusion2D-PT-D05N150-CTLFireability-00: DISJ true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-02: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-03: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-04: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-05: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-06: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-09: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-11: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-13: CTL true CTL model checker
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Diffusion2D-PT-D05N150-CTLFireability-03: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-04: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-05: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-06: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-09: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-11: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-13: CTL true CTL model checker
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Diffusion2D-PT-D05N150-CTLFireability-00: DISJ true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-02: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-03: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-04: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-05: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-06: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-09: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-11: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-13: CTL true CTL model checker
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Diffusion2D-PT-D05N150-CTLFireability-00: DISJ true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-02: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-03: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-04: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-05: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-06: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-09: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-11: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-13: CTL true CTL model checker
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Diffusion2D-PT-D05N150-CTLFireability-00: DISJ true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-02: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-03: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-04: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-05: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-06: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-09: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-11: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-13: CTL true CTL model checker
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Diffusion2D-PT-D05N150-CTLFireability-00: DISJ true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-02: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-03: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-04: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-05: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-06: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-09: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-11: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-13: CTL true CTL model checker
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Diffusion2D-PT-D05N150-CTLFireability-00: DISJ true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-02: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-03: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-04: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-05: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-06: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-09: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-11: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-13: CTL true CTL model checker
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Diffusion2D-PT-D05N150-CTLFireability-00: DISJ true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-01: CTL unknown AGGR
Diffusion2D-PT-D05N150-CTLFireability-02: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-03: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-04: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-05: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-06: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-07: CTL unknown AGGR
Diffusion2D-PT-D05N150-CTLFireability-08: CTL unknown AGGR
Diffusion2D-PT-D05N150-CTLFireability-09: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-11: CTL false CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-13: CTL true CTL model checker
Diffusion2D-PT-D05N150-CTLFireability-15: CTL false CTL model checker
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Diffusion2D-PT-D05N150"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Diffusion2D-PT-D05N150, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r135-smll-167819413400074"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/Diffusion2D-PT-D05N150.tgz
mv Diffusion2D-PT-D05N150 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;