About the Execution of LoLa+red for Diffusion2D-PT-D05N010
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2288.228 | 40589.00 | 44720.00 | 1864.20 | TF?FFTFFTFFTTFTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r135-smll-167819413400050.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Diffusion2D-PT-D05N010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r135-smll-167819413400050
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 504K
-rw-r--r-- 1 mcc users 6.6K Feb 26 04:11 CTLCardinality.txt
-rw-r--r-- 1 mcc users 60K Feb 26 04:11 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.8K Feb 26 04:09 CTLFireability.txt
-rw-r--r-- 1 mcc users 43K Feb 26 04:09 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.4K Feb 25 15:57 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 15:57 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 15:57 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 15:57 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 04:11 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 119K Feb 26 04:11 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 26 04:11 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 88K Feb 26 04:11 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 15:57 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:57 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 55K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Diffusion2D-PT-D05N010-CTLFireability-00
FORMULA_NAME Diffusion2D-PT-D05N010-CTLFireability-01
FORMULA_NAME Diffusion2D-PT-D05N010-CTLFireability-02
FORMULA_NAME Diffusion2D-PT-D05N010-CTLFireability-03
FORMULA_NAME Diffusion2D-PT-D05N010-CTLFireability-04
FORMULA_NAME Diffusion2D-PT-D05N010-CTLFireability-05
FORMULA_NAME Diffusion2D-PT-D05N010-CTLFireability-06
FORMULA_NAME Diffusion2D-PT-D05N010-CTLFireability-07
FORMULA_NAME Diffusion2D-PT-D05N010-CTLFireability-08
FORMULA_NAME Diffusion2D-PT-D05N010-CTLFireability-09
FORMULA_NAME Diffusion2D-PT-D05N010-CTLFireability-10
FORMULA_NAME Diffusion2D-PT-D05N010-CTLFireability-11
FORMULA_NAME Diffusion2D-PT-D05N010-CTLFireability-12
FORMULA_NAME Diffusion2D-PT-D05N010-CTLFireability-13
FORMULA_NAME Diffusion2D-PT-D05N010-CTLFireability-14
FORMULA_NAME Diffusion2D-PT-D05N010-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678272168452
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Diffusion2D-PT-D05N010
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 10:42:51] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-08 10:42:51] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 10:42:53] [INFO ] Load time of PNML (sax parser for PT used): 1635 ms
[2023-03-08 10:42:53] [INFO ] Transformed 25 places.
[2023-03-08 10:42:53] [INFO ] Transformed 144 transitions.
[2023-03-08 10:42:53] [INFO ] Parsed PT model containing 25 places and 144 transitions and 288 arcs in 1767 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 26 ms.
Initial state reduction rules removed 2 formulas.
FORMULA Diffusion2D-PT-D05N010-CTLFireability-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Diffusion2D-PT-D05N010-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 24 out of 25 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Applied a total of 0 rules in 22 ms. Remains 25 /25 variables (removed 0) and now considering 144/144 (removed 0) transitions.
// Phase 1: matrix 144 rows 25 cols
[2023-03-08 10:42:53] [INFO ] Computed 1 place invariants in 16 ms
[2023-03-08 10:42:54] [INFO ] Implicit Places using invariants in 452 ms returned []
[2023-03-08 10:42:54] [INFO ] Invariant cache hit.
[2023-03-08 10:42:54] [INFO ] Implicit Places using invariants and state equation in 176 ms returned []
Implicit Place search using SMT with State Equation took 695 ms to find 0 implicit places.
[2023-03-08 10:42:54] [INFO ] Invariant cache hit.
[2023-03-08 10:42:54] [INFO ] Dead Transitions using invariants and state equation in 238 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 964 ms. Remains : 25/25 places, 144/144 transitions.
Support contains 24 out of 25 places after structural reductions.
[2023-03-08 10:42:55] [INFO ] Flatten gal took : 68 ms
[2023-03-08 10:42:55] [INFO ] Flatten gal took : 24 ms
[2023-03-08 10:42:55] [INFO ] Input system was already deterministic with 144 transitions.
Incomplete random walk after 10006 steps, including 2 resets, run finished after 282 ms. (steps per millisecond=35 ) properties (out of 33) seen :31
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 2) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-08 10:42:55] [INFO ] Invariant cache hit.
[2023-03-08 10:42:55] [INFO ] After 44ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 1 atomic propositions for a total of 14 simplifications.
[2023-03-08 10:42:55] [INFO ] Flatten gal took : 15 ms
[2023-03-08 10:42:55] [INFO ] Flatten gal took : 14 ms
[2023-03-08 10:42:55] [INFO ] Input system was already deterministic with 144 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Graph (trivial) has 118 edges and 25 vertex of which 23 / 25 are part of one of the 1 SCC in 5 ms
Free SCC test removed 22 places
Ensure Unique test removed 139 transitions
Reduce isomorphic transitions removed 139 transitions.
Applied a total of 1 rules in 14 ms. Remains 3 /25 variables (removed 22) and now considering 5/144 (removed 139) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 3/25 places, 5/144 transitions.
[2023-03-08 10:42:55] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:42:55] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:42:55] [INFO ] Input system was already deterministic with 5 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Applied a total of 0 rules in 3 ms. Remains 25 /25 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 25/25 places, 144/144 transitions.
[2023-03-08 10:42:55] [INFO ] Flatten gal took : 23 ms
[2023-03-08 10:42:55] [INFO ] Flatten gal took : 11 ms
[2023-03-08 10:42:55] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Applied a total of 0 rules in 2 ms. Remains 25 /25 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 25/25 places, 144/144 transitions.
[2023-03-08 10:42:55] [INFO ] Flatten gal took : 11 ms
[2023-03-08 10:42:55] [INFO ] Flatten gal took : 10 ms
[2023-03-08 10:42:55] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Applied a total of 0 rules in 1 ms. Remains 25 /25 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 25/25 places, 144/144 transitions.
[2023-03-08 10:42:55] [INFO ] Flatten gal took : 9 ms
[2023-03-08 10:42:55] [INFO ] Flatten gal took : 10 ms
[2023-03-08 10:42:55] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Graph (trivial) has 98 edges and 25 vertex of which 22 / 25 are part of one of the 1 SCC in 1 ms
Free SCC test removed 21 places
Ensure Unique test removed 135 transitions
Reduce isomorphic transitions removed 135 transitions.
Applied a total of 1 rules in 3 ms. Remains 4 /25 variables (removed 21) and now considering 9/144 (removed 135) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 4/25 places, 9/144 transitions.
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:42:56] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Applied a total of 0 rules in 2 ms. Remains 25 /25 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 25/25 places, 144/144 transitions.
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 10 ms
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 10 ms
[2023-03-08 10:42:56] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Graph (trivial) has 138 edges and 25 vertex of which 24 / 25 are part of one of the 1 SCC in 1 ms
Free SCC test removed 23 places
Ensure Unique test removed 141 transitions
Reduce isomorphic transitions removed 141 transitions.
Applied a total of 1 rules in 2 ms. Remains 2 /25 variables (removed 23) and now considering 3/144 (removed 141) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 2/25 places, 3/144 transitions.
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 0 ms
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 0 ms
[2023-03-08 10:42:56] [INFO ] Input system was already deterministic with 3 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Graph (trivial) has 138 edges and 25 vertex of which 24 / 25 are part of one of the 1 SCC in 1 ms
Free SCC test removed 23 places
Ensure Unique test removed 141 transitions
Reduce isomorphic transitions removed 141 transitions.
Applied a total of 1 rules in 2 ms. Remains 2 /25 variables (removed 23) and now considering 3/144 (removed 141) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 2/25 places, 3/144 transitions.
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 0 ms
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 0 ms
[2023-03-08 10:42:56] [INFO ] Input system was already deterministic with 3 transitions.
Finished random walk after 1 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=1 )
FORMULA Diffusion2D-PT-D05N010-CTLFireability-08 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Graph (trivial) has 134 edges and 25 vertex of which 24 / 25 are part of one of the 1 SCC in 1 ms
Free SCC test removed 23 places
Ensure Unique test removed 141 transitions
Reduce isomorphic transitions removed 141 transitions.
Applied a total of 1 rules in 2 ms. Remains 2 /25 variables (removed 23) and now considering 3/144 (removed 141) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 2/25 places, 3/144 transitions.
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 0 ms
[2023-03-08 10:42:56] [INFO ] Input system was already deterministic with 3 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Applied a total of 0 rules in 1 ms. Remains 25 /25 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 25/25 places, 144/144 transitions.
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 8 ms
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 9 ms
[2023-03-08 10:42:56] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Graph (trivial) has 108 edges and 25 vertex of which 22 / 25 are part of one of the 1 SCC in 1 ms
Free SCC test removed 21 places
Ensure Unique test removed 137 transitions
Reduce isomorphic transitions removed 137 transitions.
Applied a total of 1 rules in 2 ms. Remains 4 /25 variables (removed 21) and now considering 7/144 (removed 137) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 4/25 places, 7/144 transitions.
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:42:56] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Applied a total of 0 rules in 1 ms. Remains 25 /25 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 25/25 places, 144/144 transitions.
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 9 ms
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 9 ms
[2023-03-08 10:42:56] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Applied a total of 0 rules in 1 ms. Remains 25 /25 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 25/25 places, 144/144 transitions.
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 9 ms
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 9 ms
[2023-03-08 10:42:56] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 144/144 transitions.
Graph (trivial) has 90 edges and 25 vertex of which 20 / 25 are part of one of the 1 SCC in 1 ms
Free SCC test removed 19 places
Ensure Unique test removed 125 transitions
Reduce isomorphic transitions removed 125 transitions.
Applied a total of 1 rules in 3 ms. Remains 6 /25 variables (removed 19) and now considering 19/144 (removed 125) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 6/25 places, 19/144 transitions.
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:42:56] [INFO ] Input system was already deterministic with 19 transitions.
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 10 ms
[2023-03-08 10:42:56] [INFO ] Flatten gal took : 9 ms
[2023-03-08 10:42:56] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-08 10:42:56] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 25 places, 144 transitions and 288 arcs took 2 ms.
Total runtime 4525 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Diffusion2D-PT-D05N010
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability
FORMULA Diffusion2D-PT-D05N010-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Diffusion2D-PT-D05N010-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Diffusion2D-PT-D05N010-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Diffusion2D-PT-D05N010-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Diffusion2D-PT-D05N010-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Diffusion2D-PT-D05N010-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Diffusion2D-PT-D05N010-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Diffusion2D-PT-D05N010-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Diffusion2D-PT-D05N010-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Diffusion2D-PT-D05N010-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Diffusion2D-PT-D05N010-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Diffusion2D-PT-D05N010-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678272209041
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 56 (type SKEL/FNDP) for 35 Diffusion2D-PT-D05N010-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SKEL/EQUN) for 35 Diffusion2D-PT-D05N010-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 58 (type SKEL/SRCH) for 35 Diffusion2D-PT-D05N010-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/SRCH) for 35 Diffusion2D-PT-D05N010-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Rule S: 0 transitions removed,0 places removed
lola: FINISHED task # 58 (type SKEL/SRCH) for Diffusion2D-PT-D05N010-CTLFireability-11
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 56 (type FNDP) for Diffusion2D-PT-D05N010-CTLFireability-11 (obsolete)
lola: CANCELED task # 57 (type EQUN) for Diffusion2D-PT-D05N010-CTLFireability-11 (obsolete)
lola: CANCELED task # 59 (type SRCH) for Diffusion2D-PT-D05N010-CTLFireability-11 (obsolete)
lola: FINISHED task # 56 (type SKEL/FNDP) for Diffusion2D-PT-D05N010-CTLFireability-11
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 1 (type EXCL) for 0 Diffusion2D-PT-D05N010-CTLFireability-00
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for Diffusion2D-PT-D05N010-CTLFireability-00
lola: result : true
lola: markings : 66
lola: fired transitions : 353
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
sara: try reading problem file /home/mcc/execution/374/CTLFireability-57.sara.
lola: LAUNCH task # 10 (type EXCL) for 3 Diffusion2D-PT-D05N010-CTLFireability-01
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for Diffusion2D-PT-D05N010-CTLFireability-01
lola: result : false
lola: markings : 103
lola: fired transitions : 237
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 12 (type EXCL) for 3 Diffusion2D-PT-D05N010-CTLFireability-01
lola: time limit : 240 sec
lola: memory limit: 32 pages
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 12 (type EXCL) for Diffusion2D-PT-D05N010-CTLFireability-01
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 57 (type SKEL/EQUN) for Diffusion2D-PT-D05N010-CTLFireability-11
lola: result : true
lola: LAUNCH task # 47 (type EXCL) for 46 Diffusion2D-PT-D05N010-CTLFireability-13
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 47 (type EXCL) for Diffusion2D-PT-D05N010-CTLFireability-13
lola: result : false
lola: markings : 4
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 15 (type EXCL) for 14 Diffusion2D-PT-D05N010-CTLFireability-02
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 60 (type FNDP) for 35 Diffusion2D-PT-D05N010-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type EQUN) for 35 Diffusion2D-PT-D05N010-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 63 (type SRCH) for 35 Diffusion2D-PT-D05N010-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 63 (type SRCH) for Diffusion2D-PT-D05N010-CTLFireability-11
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 60 (type FNDP) for Diffusion2D-PT-D05N010-CTLFireability-11 (obsolete)
lola: CANCELED task # 61 (type EQUN) for Diffusion2D-PT-D05N010-CTLFireability-11 (obsolete)
lola: LAUNCH task # 64 (type FNDP) for 35 Diffusion2D-PT-D05N010-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type EQUN) for 35 Diffusion2D-PT-D05N010-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SRCH) for 35 Diffusion2D-PT-D05N010-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 60 (type FNDP) for Diffusion2D-PT-D05N010-CTLFireability-11
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 61 (type EQUN) for Diffusion2D-PT-D05N010-CTLFireability-11
lola: result : unknown
lola: FINISHED task # 69 (type SRCH) for Diffusion2D-PT-D05N010-CTLFireability-11
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 64 (type FNDP) for Diffusion2D-PT-D05N010-CTLFireability-11 (obsolete)
lola: CANCELED task # 67 (type EQUN) for Diffusion2D-PT-D05N010-CTLFireability-11 (obsolete)
lola: FINISHED task # 64 (type FNDP) for Diffusion2D-PT-D05N010-CTLFireability-11
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/374/CTLFireability-67.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 67 (type EQUN) for Diffusion2D-PT-D05N010-CTLFireability-11
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Diffusion2D-PT-D05N010-CTLFireability-00: CTL true CTL model checker
Diffusion2D-PT-D05N010-CTLFireability-11: CONJ true CONJ
Diffusion2D-PT-D05N010-CTLFireability-13: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Diffusion2D-PT-D05N010-CTLFireability-01: CONJ 0 1 0 0 5 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-05: EFEG 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-07: AGAF 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-09: F 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 5/360 6/32 Diffusion2D-PT-D05N010-CTLFireability-02 1240943 m, 248188 m/sec, 5055877 t fired, .
Time elapsed: 5 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 13
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Diffusion2D-PT-D05N010-CTLFireability-00: CTL true CTL model checker
Diffusion2D-PT-D05N010-CTLFireability-11: CONJ true CONJ
Diffusion2D-PT-D05N010-CTLFireability-13: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Diffusion2D-PT-D05N010-CTLFireability-01: CONJ 0 1 0 0 5 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-05: EFEG 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-07: AGAF 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-09: F 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 10/360 11/32 Diffusion2D-PT-D05N010-CTLFireability-02 2622147 m, 276240 m/sec, 10738767 t fired, .
Time elapsed: 10 secs. Pages in use: 11
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Diffusion2D-PT-D05N010-CTLFireability-00: CTL true CTL model checker
Diffusion2D-PT-D05N010-CTLFireability-11: CONJ true CONJ
Diffusion2D-PT-D05N010-CTLFireability-13: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Diffusion2D-PT-D05N010-CTLFireability-01: CONJ 0 1 0 0 5 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-05: EFEG 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-07: AGAF 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-09: F 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 15/360 17/32 Diffusion2D-PT-D05N010-CTLFireability-02 3956740 m, 266918 m/sec, 16235079 t fired, .
Time elapsed: 15 secs. Pages in use: 17
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Diffusion2D-PT-D05N010-CTLFireability-00: CTL true CTL model checker
Diffusion2D-PT-D05N010-CTLFireability-11: CONJ true CONJ
Diffusion2D-PT-D05N010-CTLFireability-13: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Diffusion2D-PT-D05N010-CTLFireability-01: CONJ 0 1 0 0 5 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-05: EFEG 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-07: AGAF 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-09: F 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 20/360 22/32 Diffusion2D-PT-D05N010-CTLFireability-02 5284407 m, 265533 m/sec, 21719186 t fired, .
Time elapsed: 20 secs. Pages in use: 22
# running tasks: 1 of 4 Visible: 13
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Diffusion2D-PT-D05N010-CTLFireability-00: CTL true CTL model checker
Diffusion2D-PT-D05N010-CTLFireability-11: CONJ true CONJ
Diffusion2D-PT-D05N010-CTLFireability-13: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Diffusion2D-PT-D05N010-CTLFireability-01: CONJ 0 1 0 0 5 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-05: EFEG 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-07: AGAF 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-09: F 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 25/360 28/32 Diffusion2D-PT-D05N010-CTLFireability-02 6542781 m, 251674 m/sec, 26952525 t fired, .
Time elapsed: 25 secs. Pages in use: 28
# running tasks: 1 of 4 Visible: 13
lola: CANCELED task # 15 (type EXCL) for Diffusion2D-PT-D05N010-CTLFireability-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Diffusion2D-PT-D05N010-CTLFireability-00: CTL true CTL model checker
Diffusion2D-PT-D05N010-CTLFireability-11: CONJ true CONJ
Diffusion2D-PT-D05N010-CTLFireability-13: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Diffusion2D-PT-D05N010-CTLFireability-01: CONJ 0 1 0 0 5 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
Diffusion2D-PT-D05N010-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-05: EFEG 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-07: AGAF 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-09: F 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
Diffusion2D-PT-D05N010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 30 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 13
lola: LAUNCH task # 50 (type EXCL) for 49 Diffusion2D-PT-D05N010-CTLFireability-14
lola: time limit : 396 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for Diffusion2D-PT-D05N010-CTLFireability-14
lola: result : true
lola: markings : 21
lola: fired transitions : 64
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 33 (type EXCL) for 32 Diffusion2D-PT-D05N010-CTLFireability-10
lola: time limit : 446 sec
lola: memory limit: 32 pages
lola: FINISHED task # 33 (type EXCL) for Diffusion2D-PT-D05N010-CTLFireability-10
lola: result : false
lola: markings : 161
lola: fired transitions : 407
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 23 Diffusion2D-PT-D05N010-CTLFireability-06
lola: time limit : 510 sec
lola: memory limit: 32 pages
lola: FINISHED task # 24 (type EXCL) for Diffusion2D-PT-D05N010-CTLFireability-06
lola: result : false
lola: markings : 1
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 18 (type EXCL) for 17 Diffusion2D-PT-D05N010-CTLFireability-03
lola: time limit : 595 sec
lola: memory limit: 32 pages
lola: FINISHED task # 18 (type EXCL) for Diffusion2D-PT-D05N010-CTLFireability-03
lola: result : false
lola: markings : 29
lola: fired transitions : 46
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 70 (type EXCL) for 29 Diffusion2D-PT-D05N010-CTLFireability-09
lola: time limit : 714 sec
lola: memory limit: 32 pages
lola: FINISHED task # 70 (type EXCL) for Diffusion2D-PT-D05N010-CTLFireability-09
lola: result : true
lola: markings : 1
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 66 (type EXCL) for 26 Diffusion2D-PT-D05N010-CTLFireability-07
lola: time limit : 892 sec
lola: memory limit: 32 pages
lola: FINISHED task # 66 (type EXCL) for Diffusion2D-PT-D05N010-CTLFireability-07
lola: result : true
lola: markings : 1
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 21 (type EXCL) for 20 Diffusion2D-PT-D05N010-CTLFireability-05
lola: time limit : 1190 sec
lola: memory limit: 32 pages
lola: FINISHED task # 21 (type EXCL) for Diffusion2D-PT-D05N010-CTLFireability-05
lola: result : true
lola: markings : 1
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 65 (type EXCL) for 3 Diffusion2D-PT-D05N010-CTLFireability-01
lola: time limit : 1785 sec
lola: memory limit: 32 pages
lola: FINISHED task # 65 (type EXCL) for Diffusion2D-PT-D05N010-CTLFireability-01
lola: result : true
lola: markings : 1001
lola: fired transitions : 9294
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 53 (type EXCL) for 52 Diffusion2D-PT-D05N010-CTLFireability-15
lola: time limit : 3570 sec
lola: memory limit: 32 pages
lola: FINISHED task # 53 (type EXCL) for Diffusion2D-PT-D05N010-CTLFireability-15
lola: result : false
lola: markings : 37
lola: fired transitions : 133
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 13
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Diffusion2D-PT-D05N010-CTLFireability-00: CTL true CTL model checker
Diffusion2D-PT-D05N010-CTLFireability-01: CONJ false tscc_search
Diffusion2D-PT-D05N010-CTLFireability-02: CTL unknown AGGR
Diffusion2D-PT-D05N010-CTLFireability-03: CTL false CTL model checker
Diffusion2D-PT-D05N010-CTLFireability-05: EFEG true state space /EFEG
Diffusion2D-PT-D05N010-CTLFireability-06: CTL false CTL model checker
Diffusion2D-PT-D05N010-CTLFireability-07: AGAF false state space /EFEG
Diffusion2D-PT-D05N010-CTLFireability-09: F false state space / EG
Diffusion2D-PT-D05N010-CTLFireability-10: CTL false CTL model checker
Diffusion2D-PT-D05N010-CTLFireability-11: CONJ true CONJ
Diffusion2D-PT-D05N010-CTLFireability-13: CTL false CTL model checker
Diffusion2D-PT-D05N010-CTLFireability-14: CTL true CTL model checker
Diffusion2D-PT-D05N010-CTLFireability-15: CTL false CTL model checker
Time elapsed: 30 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Diffusion2D-PT-D05N010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Diffusion2D-PT-D05N010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r135-smll-167819413400050"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/Diffusion2D-PT-D05N010.tgz
mv Diffusion2D-PT-D05N010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;