About the Execution of LoLA for DoubleLock-PT-p2s1
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
12542.340 | 3600000.00 | 11088676.00 | 9704.70 | T?FFTTFTTFTTFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r134-smll-167819412900534.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is DoubleLock-PT-p2s1, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r134-smll-167819412900534
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 548K
-rw-r--r-- 1 mcc users 6.1K Feb 25 14:19 CTLCardinality.txt
-rw-r--r-- 1 mcc users 66K Feb 25 14:19 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Feb 25 14:18 CTLFireability.txt
-rw-r--r-- 1 mcc users 60K Feb 25 14:18 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:01 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 16:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 16:01 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 16:01 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 14:20 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 134K Feb 25 14:20 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.2K Feb 25 14:20 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 70K Feb 25 14:20 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:01 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:01 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 97K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-00
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-01
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-02
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-03
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-04
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-05
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-06
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-07
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-08
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-09
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-10
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-11
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-12
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-13
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-14
FORMULA_NAME DoubleLock-PT-p2s1-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1678526181705
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DoubleLock-PT-p2s1
Not applying reductions.
Model is PT
ReachabilityCardinality PT
starting LoLA
BK_INPUT DoubleLock-PT-p2s1
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DoubleLock-PT-p2s1-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 3670316 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16165980 kB
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 7 (type CNST) for 6 DoubleLock-PT-p2s1-ReachabilityCardinality-02
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 7 (type CNST) for DoubleLock-PT-p2s1-ReachabilityCardinality-02
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 10 (type CNST) for 9 DoubleLock-PT-p2s1-ReachabilityCardinality-03
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 10 (type CNST) for DoubleLock-PT-p2s1-ReachabilityCardinality-03
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 8 transitions removed,8 places removed
lola: LAUNCH INITIAL
lola: LAUNCH task # 34 (type CNST) for 33 DoubleLock-PT-p2s1-ReachabilityCardinality-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 34 (type CNST) for DoubleLock-PT-p2s1-ReachabilityCardinality-11
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 66 (type EXCL) for 36 DoubleLock-PT-p2s1-ReachabilityCardinality-12
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 49 (type FNDP) for 0 DoubleLock-PT-p2s1-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 0 DoubleLock-PT-p2s1-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type FNDP) for 24 DoubleLock-PT-p2s1-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 50 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-00
lola: result : false
lola: CANCELED task # 49 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 68 (type FNDP) for 39 DoubleLock-PT-p2s1-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type EQUN) for 39 DoubleLock-PT-p2s1-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 49 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 3587
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-69.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 69 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-13
lola: result : false
lola: CANCELED task # 68 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 89 (type FNDP) for 45 DoubleLock-PT-p2s1-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 100 (type EQUN) for 45 DoubleLock-PT-p2s1-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 68 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-13
lola: result : unknown
lola: fired transitions : 22301
lola: tried executions : 86
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-100.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 EF FNDP 4/239 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 533239 t fired, 1 attempts, .
66 EF EXCL 4/327 4/32 DoubleLock-PT-p2s1-ReachabilityCardinality-12 883915 m, 176783 m/sec, 1014860 t fired, .
89 EF FNDP 4/239 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-15 486846 t fired, 1 attempts, .
100 EF STEQ 4/257 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-15 sara is running.
Time elapsed: 5 secs. Pages in use: 4
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 EF FNDP 9/235 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 1104899 t fired, 2 attempts, .
66 EF EXCL 9/327 7/32 DoubleLock-PT-p2s1-ReachabilityCardinality-12 1798916 m, 183000 m/sec, 2065416 t fired, .
89 EF FNDP 9/235 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-15 1047130 t fired, 2 attempts, .
100 EF STEQ 9/253 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-15 sara is running.
Time elapsed: 10 secs. Pages in use: 7
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 100 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-15
lola: result : false
lola: CANCELED task # 89 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 91 (type FNDP) for 12 DoubleLock-PT-p2s1-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 115 (type EQUN) for 12 DoubleLock-PT-p2s1-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 89 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-15
lola: result : unknown
lola: fired transitions : 1257625
lola: tried executions : 3
lola: time used : 11.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-115.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 115 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-04
lola: result : false
lola: CANCELED task # 91 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 75 (type FNDP) for 18 DoubleLock-PT-p2s1-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type EQUN) for 18 DoubleLock-PT-p2s1-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 91 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 28527
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 75 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-06
lola: result : true
lola: fired transitions : 52
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 76 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 102 (type FNDP) for 30 DoubleLock-PT-p2s1-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 105 (type EQUN) for 30 DoubleLock-PT-p2s1-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-76.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-105.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 105 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-10
lola: result : false
lola: CANCELED task # 102 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 90 (type FNDP) for 27 DoubleLock-PT-p2s1-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 93 (type EQUN) for 27 DoubleLock-PT-p2s1-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 102 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-10
lola: result : unknown
lola: fired transitions : 23655
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-93.sara.
sara: place or transition ordering is non-deterministic
sara: warning, failure of lp_solve (at job 172)
lola: FINISHED task # 93 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-09
lola: result : false
lola: CANCELED task # 90 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 82 (type FNDP) for 3 DoubleLock-PT-p2s1-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 84 (type EQUN) for 3 DoubleLock-PT-p2s1-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 90 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 124894
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-84.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 EF FNDP 14/436 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-08 1627075 t fired, 2 attempts, .
66 EF EXCL 14/599 10/32 DoubleLock-PT-p2s1-ReachabilityCardinality-12 2595505 m, 159317 m/sec, 2980019 t fired, .
82 EF FNDP 1/448 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 126070 t fired, 97 attempts, .
84 EF STEQ 1/448 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 15 secs. Pages in use: 10
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 51 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-08
lola: result : true
lola: fired transitions : 2000319
lola: tried executions : 3
lola: time used : 18.000000
lola: memory pages used : 0
lola: LAUNCH task # 88 (type FNDP) for 21 DoubleLock-PT-p2s1-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 88 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-07
lola: result : true
lola: fired transitions : 38
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 103 (type FNDP) for 42 DoubleLock-PT-p2s1-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 103 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-14
lola: result : true
lola: fired transitions : 143
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 114 (type FNDP) for 15 DoubleLock-PT-p2s1-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 19/1199 13/32 DoubleLock-PT-p2s1-ReachabilityCardinality-12 3284498 m, 137798 m/sec, 3771087 t fired, .
82 EF FNDP 6/891 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 581548 t fired, 811 attempts, .
84 EF STEQ 6/891 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 1/895 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 98285 t fired, 1 attempts, .
Time elapsed: 20 secs. Pages in use: 13
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 24/1199 16/32 DoubleLock-PT-p2s1-ReachabilityCardinality-12 3989161 m, 140932 m/sec, 4580142 t fired, .
82 EF FNDP 11/890 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 1043802 t fired, 1653 attempts, .
84 EF STEQ 11/890 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 6/894 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 573453 t fired, 1 attempts, .
Time elapsed: 25 secs. Pages in use: 16
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 29/1199 19/32 DoubleLock-PT-p2s1-ReachabilityCardinality-12 4724852 m, 147138 m/sec, 5424824 t fired, .
82 EF FNDP 16/885 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 1488016 t fired, 2558 attempts, .
84 EF STEQ 16/885 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 11/889 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 1075188 t fired, 2 attempts, .
Time elapsed: 30 secs. Pages in use: 19
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 34/1199 21/32 DoubleLock-PT-p2s1-ReachabilityCardinality-12 5474145 m, 149858 m/sec, 6285125 t fired, .
82 EF FNDP 21/880 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 1943736 t fired, 3584 attempts, .
84 EF STEQ 21/880 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 16/884 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 1530180 t fired, 2 attempts, .
Time elapsed: 35 secs. Pages in use: 21
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 39/1199 24/32 DoubleLock-PT-p2s1-ReachabilityCardinality-12 6180931 m, 141357 m/sec, 7096619 t fired, .
82 EF FNDP 26/875 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 2381770 t fired, 4724 attempts, .
84 EF STEQ 26/875 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 21/879 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 1992915 t fired, 2 attempts, .
Time elapsed: 40 secs. Pages in use: 24
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 44/1199 27/32 DoubleLock-PT-p2s1-ReachabilityCardinality-12 6889993 m, 141812 m/sec, 7910729 t fired, .
82 EF FNDP 31/870 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 2831948 t fired, 6005 attempts, .
84 EF STEQ 31/870 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 26/874 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 2503922 t fired, 3 attempts, .
Time elapsed: 45 secs. Pages in use: 27
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 49/1199 29/32 DoubleLock-PT-p2s1-ReachabilityCardinality-12 7590191 m, 140039 m/sec, 8714659 t fired, .
82 EF FNDP 36/865 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 3292655 t fired, 7427 attempts, .
84 EF STEQ 36/865 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 31/869 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 3001194 t fired, 4 attempts, .
Time elapsed: 50 secs. Pages in use: 29
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 EF EXCL 54/1199 32/32 DoubleLock-PT-p2s1-ReachabilityCardinality-12 8304184 m, 142798 m/sec, 9534428 t fired, .
82 EF FNDP 41/860 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 3762225 t fired, 9070 attempts, .
84 EF STEQ 41/860 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 36/864 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 3457789 t fired, 4 attempts, .
Time elapsed: 55 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 66 (type EXCL) for DoubleLock-PT-p2s1-ReachabilityCardinality-12 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 4 1 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 46/855 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 4306744 t fired, 11057 attempts, .
84 EF STEQ 46/855 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 41/859 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 4044789 t fired, 5 attempts, .
Time elapsed: 60 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 122 (type EXCL) for 15 DoubleLock-PT-p2s1-ReachabilityCardinality-05
lola: time limit : 1770 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 51/850 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 4756323 t fired, 12775 attempts, .
84 EF STEQ 51/850 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 46/854 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 4541812 t fired, 5 attempts, .
122 EF EXCL 5/1770 3/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 740616 m, 148123 m/sec, 850333 t fired, .
Time elapsed: 65 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 56/845 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 5224711 t fired, 14569 attempts, .
84 EF STEQ 56/845 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 51/849 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 5027478 t fired, 6 attempts, .
122 EF EXCL 10/1770 6/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 1488778 m, 149632 m/sec, 1709333 t fired, .
Time elapsed: 70 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 61/840 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 5705586 t fired, 16459 attempts, .
84 EF STEQ 61/840 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 56/844 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 5530176 t fired, 6 attempts, .
122 EF EXCL 15/1770 9/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 2208913 m, 144027 m/sec, 2536155 t fired, .
Time elapsed: 75 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 66/835 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 6165958 t fired, 18269 attempts, .
84 EF STEQ 66/835 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 61/839 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 5995361 t fired, 6 attempts, .
122 EF EXCL 20/1770 12/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 2908111 m, 139839 m/sec, 3338937 t fired, .
Time elapsed: 80 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 71/830 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 6642709 t fired, 20203 attempts, .
84 EF STEQ 71/830 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 66/834 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 6509046 t fired, 7 attempts, .
122 EF EXCL 25/1770 14/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 3596490 m, 137675 m/sec, 4129298 t fired, .
Time elapsed: 85 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 76/825 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 7095267 t fired, 21986 attempts, .
84 EF STEQ 76/825 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 71/829 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 6968285 t fired, 7 attempts, .
122 EF EXCL 30/1770 17/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 4321013 m, 144904 m/sec, 4961157 t fired, .
Time elapsed: 90 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 81/820 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 7552776 t fired, 23813 attempts, .
84 EF STEQ 81/820 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 76/824 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 7437566 t fired, 8 attempts, .
122 EF EXCL 35/1770 20/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 5045609 m, 144919 m/sec, 5793101 t fired, .
Time elapsed: 95 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 86/815 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 8015798 t fired, 25710 attempts, .
84 EF STEQ 86/815 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 81/819 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 7897004 t fired, 8 attempts, .
122 EF EXCL 40/1770 23/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 5780384 m, 146955 m/sec, 6636733 t fired, .
Time elapsed: 100 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 91/810 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 8483134 t fired, 27531 attempts, .
84 EF STEQ 91/810 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 86/814 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 8374417 t fired, 9 attempts, .
122 EF EXCL 45/1770 25/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 6489991 m, 141921 m/sec, 7451467 t fired, .
Time elapsed: 105 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 96/805 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 8922106 t fired, 29298 attempts, .
84 EF STEQ 96/805 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 91/809 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 8843174 t fired, 9 attempts, .
122 EF EXCL 50/1770 28/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 7207745 m, 143550 m/sec, 8275553 t fired, .
Time elapsed: 110 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 101/800 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 9363667 t fired, 31131 attempts, .
84 EF STEQ 101/800 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 96/804 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 9323605 t fired, 10 attempts, .
122 EF EXCL 55/1770 31/32 DoubleLock-PT-p2s1-ReachabilityCardinality-05 7994101 m, 157271 m/sec, 9178407 t fired, .
Time elapsed: 115 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 122 (type EXCL) for DoubleLock-PT-p2s1-ReachabilityCardinality-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 106/795 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 9873608 t fired, 33213 attempts, .
84 EF STEQ 106/795 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 101/799 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 9838852 t fired, 10 attempts, .
Time elapsed: 120 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 87 (type EXCL) for 3 DoubleLock-PT-p2s1-ReachabilityCardinality-01
lola: time limit : 3480 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 3 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 111/790 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 10296071 t fired, 34928 attempts, .
84 EF STEQ 111/790 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
87 EF EXCL 5/3480 2/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 426223 m, 85244 m/sec, 489363 t fired, .
114 EF FNDP 106/794 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 10309626 t fired, 11 attempts, .
Time elapsed: 125 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 3 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 116/785 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 10736054 t fired, 36699 attempts, .
84 EF STEQ 116/785 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
87 EF EXCL 10/3480 4/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 880988 m, 90953 m/sec, 1011500 t fired, .
114 EF FNDP 111/789 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 10761259 t fired, 11 attempts, .
Time elapsed: 130 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 3 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 121/780 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 11200894 t fired, 38574 attempts, .
84 EF STEQ 121/780 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
87 EF EXCL 15/3480 5/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 1300758 m, 83954 m/sec, 1493458 t fired, .
114 EF FNDP 116/784 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 11233716 t fired, 12 attempts, .
Time elapsed: 135 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 3 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 126/775 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 11657728 t fired, 40348 attempts, .
84 EF STEQ 126/775 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
87 EF EXCL 20/3480 7/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 1720573 m, 83963 m/sec, 1975468 t fired, .
114 EF FNDP 121/779 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 11700045 t fired, 12 attempts, .
Time elapsed: 140 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 3 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 131/770 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 12099612 t fired, 42158 attempts, .
84 EF STEQ 131/770 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
87 EF EXCL 25/3480 9/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 2154811 m, 86847 m/sec, 2474037 t fired, .
114 EF FNDP 126/774 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 12168846 t fired, 13 attempts, .
Time elapsed: 145 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 3 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 136/765 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 12507157 t fired, 43831 attempts, .
84 EF STEQ 136/765 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
87 EF EXCL 30/3480 10/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 2601596 m, 89357 m/sec, 2987012 t fired, .
114 EF FNDP 131/769 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 12636597 t fired, 13 attempts, .
Time elapsed: 150 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 3 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 141/760 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 12962789 t fired, 45637 attempts, .
84 EF STEQ 141/760 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
87 EF EXCL 35/3480 12/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 3023104 m, 84301 m/sec, 3470966 t fired, .
114 EF FNDP 136/764 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 13124868 t fired, 14 attempts, .
Time elapsed: 155 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 3 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 146/755 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 13427332 t fired, 47512 attempts, .
84 EF STEQ 146/755 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
87 EF EXCL 40/3480 14/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 3435610 m, 82501 m/sec, 3944584 t fired, .
114 EF FNDP 141/759 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 13590195 t fired, 14 attempts, .
Time elapsed: 160 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 3 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 151/750 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 13884794 t fired, 49324 attempts, .
84 EF STEQ 151/750 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
87 EF EXCL 45/3480 15/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 3850669 m, 83011 m/sec, 4421133 t fired, .
114 EF FNDP 146/754 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 14079193 t fired, 15 attempts, .
Time elapsed: 165 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 3 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 156/745 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 14313541 t fired, 51071 attempts, .
84 EF STEQ 156/745 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
87 EF EXCL 50/3480 17/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 4266259 m, 83118 m/sec, 4898292 t fired, .
114 EF FNDP 151/749 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 14557674 t fired, 15 attempts, .
Time elapsed: 170 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 3 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 161/740 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 14730561 t fired, 52679 attempts, .
84 EF STEQ 161/740 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
87 EF EXCL 55/3480 18/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 4698982 m, 86544 m/sec, 5395123 t fired, .
114 EF FNDP 156/744 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 15033715 t fired, 16 attempts, .
Time elapsed: 175 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 3 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 166/735 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 15174741 t fired, 54424 attempts, .
84 EF STEQ 166/735 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
87 EF EXCL 60/3480 20/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 5133754 m, 86954 m/sec, 5894306 t fired, .
114 EF FNDP 161/739 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 15482926 t fired, 16 attempts, .
Time elapsed: 180 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 3 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 171/730 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 15641403 t fired, 56214 attempts, .
84 EF STEQ 171/730 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
87 EF EXCL 65/3480 22/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 5561295 m, 85508 m/sec, 6385186 t fired, .
114 EF FNDP 166/734 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 15935717 t fired, 16 attempts, .
Time elapsed: 185 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 3 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 176/725 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 16089264 t fired, 57942 attempts, .
84 EF STEQ 176/725 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
87 EF EXCL 70/3480 23/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 5993274 m, 86395 m/sec, 6881162 t fired, .
114 EF FNDP 171/729 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 16404131 t fired, 17 attempts, .
Time elapsed: 190 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 3 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 181/720 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 16522183 t fired, 59657 attempts, .
84 EF STEQ 181/720 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
87 EF EXCL 75/3480 25/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 6418929 m, 85131 m/sec, 7369877 t fired, .
114 EF FNDP 176/724 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 16869623 t fired, 17 attempts, .
Time elapsed: 195 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 3 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 186/715 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 16948061 t fired, 61316 attempts, .
84 EF STEQ 186/715 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
87 EF EXCL 80/3480 27/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 6852369 m, 86688 m/sec, 7867529 t fired, .
114 EF FNDP 181/719 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 17344266 t fired, 18 attempts, .
Time elapsed: 200 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 3 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 191/710 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 17381102 t fired, 63063 attempts, .
84 EF STEQ 191/710 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
87 EF EXCL 85/3480 28/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 7274773 m, 84480 m/sec, 8352513 t fired, .
114 EF FNDP 186/714 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 17823192 t fired, 18 attempts, .
Time elapsed: 205 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 3 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 196/705 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 17828482 t fired, 64775 attempts, .
84 EF STEQ 196/705 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
87 EF EXCL 90/3480 30/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 7680997 m, 81244 m/sec, 8818917 t fired, .
114 EF FNDP 191/709 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 18304706 t fired, 19 attempts, .
Time elapsed: 210 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 3 0 1 0 0 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 201/700 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 18268759 t fired, 66513 attempts, .
84 EF STEQ 201/700 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
87 EF EXCL 95/3480 31/32 DoubleLock-PT-p2s1-ReachabilityCardinality-01 8113433 m, 86487 m/sec, 9315417 t fired, .
114 EF FNDP 196/704 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 18762074 t fired, 19 attempts, .
Time elapsed: 215 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 87 (type EXCL) for DoubleLock-PT-p2s1-ReachabilityCardinality-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 2 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 206/695 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 18750113 t fired, 68435 attempts, .
84 EF STEQ 206/695 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 201/699 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 19315649 t fired, 20 attempts, .
Time elapsed: 220 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 62 (type FNDP) for 36 DoubleLock-PT-p2s1-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 2 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 EF FNDP 5/1126 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-12 447476 t fired, 1 attempts, .
82 EF FNDP 211/989 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 19189316 t fired, 70179 attempts, .
84 EF STEQ 211/989 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 206/992 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 19788484 t fired, 20 attempts, .
Time elapsed: 225 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 2 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 EF FNDP 10/1121 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-12 873055 t fired, 1 attempts, .
82 EF FNDP 216/984 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 19616915 t fired, 71751 attempts, .
84 EF STEQ 217/984 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 212/987 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 20230859 t fired, 21 attempts, .
Time elapsed: 231 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 2 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 EF FNDP 16/1115 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-12 1325861 t fired, 2 attempts, .
82 EF FNDP 222/978 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 20034949 t fired, 73387 attempts, .
84 EF STEQ 222/978 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 217/981 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 20673976 t fired, 21 attempts, .
Time elapsed: 236 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 2 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 EF FNDP 21/1110 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-12 1785208 t fired, 2 attempts, .
82 EF FNDP 227/973 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 20452466 t fired, 75012 attempts, .
84 EF STEQ 227/973 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 222/976 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 21141375 t fired, 22 attempts, .
Time elapsed: 241 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 2 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 EF FNDP 26/1105 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-12 2238702 t fired, 3 attempts, .
82 EF FNDP 232/968 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 20882779 t fired, 76710 attempts, .
84 EF STEQ 232/968 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 227/971 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 21605590 t fired, 22 attempts, .
Time elapsed: 246 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 2 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 EF FNDP 31/1100 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-12 2687079 t fired, 3 attempts, .
82 EF FNDP 237/963 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 21295566 t fired, 78415 attempts, .
84 EF STEQ 237/963 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 232/966 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 22074748 t fired, 23 attempts, .
Time elapsed: 251 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 2 2 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 EF FNDP 36/1095 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-12 3123272 t fired, 4 attempts, .
82 EF FNDP 242/958 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 21724226 t fired, 80024 attempts, .
84 EF STEQ 242/958 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
114 EF FNDP 237/961 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-05 22540248 t fired, 23 attempts, .
Time elapsed: 256 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 62 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-12
lola: result : true
lola: fired transitions : 3366007
lola: tried executions : 4
lola: time used : 38.000000
lola: memory pages used : 0
lola: LAUNCH task # 119 (type EQUN) for 15 DoubleLock-PT-p2s1-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-119.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 119 (type EQUN) for DoubleLock-PT-p2s1-ReachabilityCardinality-05
lola: result : false
lola: CANCELED task # 114 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 86 (type SRCH) for 3 DoubleLock-PT-p2s1-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 112 (type SRCH) for 3 DoubleLock-PT-p2s1-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 114 (type FNDP) for DoubleLock-PT-p2s1-ReachabilityCardinality-05
lola: result : unknown
lola: fired transitions : 22789657
lola: tried executions : 24
lola: time used : 239.000000
lola: memory pages used : 0
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 4 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 247/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 22143535 t fired, 81651 attempts, .
84 EF STEQ 247/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
86 EF SRCH 3/3342 1/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 198312 m, 39662 m/sec, 222022 t fired, .
112 EF SRCH 3/3342 1/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 203373 m, 40674 m/sec, 203372 t fired, .
Time elapsed: 261 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 4 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 252/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 22641351 t fired, 83575 attempts, .
84 EF STEQ 252/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
86 EF SRCH 8/3342 3/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 601085 m, 80554 m/sec, 673127 t fired, .
112 EF SRCH 8/3342 3/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 636151 m, 86555 m/sec, 636150 t fired, .
Time elapsed: 266 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 4 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 257/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 23128525 t fired, 85492 attempts, .
84 EF STEQ 257/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
86 EF SRCH 13/3342 4/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 1001263 m, 80035 m/sec, 1121327 t fired, .
112 EF SRCH 13/3342 5/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 1055874 m, 83944 m/sec, 1055873 t fired, .
Time elapsed: 271 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 112 (type SRCH) for DoubleLock-PT-p2s1-ReachabilityCardinality-01 (memory limit exceeded)
lola: CANCELED task # 86 (type SRCH) for DoubleLock-PT-p2s1-ReachabilityCardinality-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 262/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 23656320 t fired, 87561 attempts, .
84 EF STEQ 262/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 276 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 267/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 24246367 t fired, 89869 attempts, .
84 EF STEQ 267/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 281 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 272/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 24840240 t fired, 92156 attempts, .
84 EF STEQ 272/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 286 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 277/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 25433880 t fired, 94452 attempts, .
84 EF STEQ 277/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 291 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 282/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 26028419 t fired, 96710 attempts, .
84 EF STEQ 282/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 296 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 287/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 26622886 t fired, 99049 attempts, .
84 EF STEQ 287/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 301 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 292/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 27218095 t fired, 101334 attempts, .
84 EF STEQ 292/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 306 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 297/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 27812455 t fired, 103626 attempts, .
84 EF STEQ 297/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 311 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 302/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 28403069 t fired, 105928 attempts, .
84 EF STEQ 302/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 316 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 307/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 28993095 t fired, 108259 attempts, .
84 EF STEQ 307/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 321 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 312/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 29583848 t fired, 110546 attempts, .
84 EF STEQ 312/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 326 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 317/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 30173637 t fired, 112803 attempts, .
84 EF STEQ 317/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 331 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 322/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 30763620 t fired, 115061 attempts, .
84 EF STEQ 322/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 336 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 327/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 31356566 t fired, 117394 attempts, .
84 EF STEQ 327/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 341 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 332/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 31947184 t fired, 119739 attempts, .
84 EF STEQ 332/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 346 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 337/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 32539999 t fired, 122009 attempts, .
84 EF STEQ 337/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 351 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 342/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 33132467 t fired, 124275 attempts, .
84 EF STEQ 342/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 356 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 347/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 33725308 t fired, 126610 attempts, .
84 EF STEQ 347/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 361 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 352/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 34314856 t fired, 128876 attempts, .
84 EF STEQ 352/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 366 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 357/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 34903950 t fired, 131118 attempts, .
84 EF STEQ 357/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 371 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 362/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 35493903 t fired, 133390 attempts, .
84 EF STEQ 362/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 376 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 367/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 36082251 t fired, 135652 attempts, .
84 EF STEQ 367/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 381 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 372/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 36671585 t fired, 137962 attempts, .
84 EF STEQ 372/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 386 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 377/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 37261321 t fired, 140274 attempts, .
84 EF STEQ 377/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 391 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 382/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 37852416 t fired, 142505 attempts, .
84 EF STEQ 382/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 396 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 387/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 38442984 t fired, 144798 attempts, .
84 EF STEQ 387/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 401 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 392/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 39032307 t fired, 147126 attempts, .
84 EF STEQ 392/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 406 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 397/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 39623966 t fired, 149448 attempts, .
84 EF STEQ 397/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 411 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 402/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 40213930 t fired, 151772 attempts, .
84 EF STEQ 402/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 416 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 407/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 40801063 t fired, 154088 attempts, .
84 EF STEQ 407/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 421 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 412/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 41391224 t fired, 156353 attempts, .
84 EF STEQ 412/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 426 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 417/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 41981387 t fired, 158614 attempts, .
84 EF STEQ 417/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 431 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 422/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 42572168 t fired, 160808 attempts, .
84 EF STEQ 422/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 436 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 427/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 43161305 t fired, 163101 attempts, .
84 EF STEQ 427/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 441 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 432/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 43765871 t fired, 165464 attempts, .
84 EF STEQ 432/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 446 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 437/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 44400077 t fired, 167909 attempts, .
84 EF STEQ 437/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 451 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 442/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 45037053 t fired, 170371 attempts, .
84 EF STEQ 442/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 456 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 447/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 45674706 t fired, 172857 attempts, .
84 EF STEQ 447/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 461 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 452/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 46312398 t fired, 175358 attempts, .
84 EF STEQ 452/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 466 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 457/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 46948719 t fired, 177759 attempts, .
84 EF STEQ 457/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 471 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 462/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 47586043 t fired, 180210 attempts, .
84 EF STEQ 462/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 476 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 467/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 48222032 t fired, 182706 attempts, .
84 EF STEQ 467/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 481 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 472/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 48860724 t fired, 185156 attempts, .
84 EF STEQ 472/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 486 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 477/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 49499043 t fired, 187584 attempts, .
84 EF STEQ 477/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 491 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 482/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 50138544 t fired, 190044 attempts, .
84 EF STEQ 482/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 496 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 487/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 50777416 t fired, 192481 attempts, .
84 EF STEQ 487/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 501 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 492/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 51419445 t fired, 194906 attempts, .
84 EF STEQ 492/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 506 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 497/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 52061962 t fired, 197330 attempts, .
84 EF STEQ 497/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 511 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 502/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 52704563 t fired, 199821 attempts, .
84 EF STEQ 502/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 516 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 507/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 53346575 t fired, 202337 attempts, .
84 EF STEQ 507/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 521 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 512/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 53988374 t fired, 204806 attempts, .
84 EF STEQ 512/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 526 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 517/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 54630579 t fired, 207286 attempts, .
84 EF STEQ 517/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 531 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 522/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 55271292 t fired, 209633 attempts, .
84 EF STEQ 522/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 536 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 527/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 55910216 t fired, 212091 attempts, .
84 EF STEQ 527/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 541 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 532/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 56548024 t fired, 214503 attempts, .
84 EF STEQ 532/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 546 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 537/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 57184070 t fired, 216956 attempts, .
84 EF STEQ 537/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 551 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 542/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 57820708 t fired, 219346 attempts, .
84 EF STEQ 542/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 556 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 547/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 58456960 t fired, 221764 attempts, .
84 EF STEQ 547/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 561 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 552/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 59092970 t fired, 224232 attempts, .
84 EF STEQ 552/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 566 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 557/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 59728728 t fired, 226707 attempts, .
84 EF STEQ 557/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 571 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 562/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 60364354 t fired, 229157 attempts, .
84 EF STEQ 562/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 576 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 567/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 60999572 t fired, 231571 attempts, .
84 EF STEQ 567/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 581 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 572/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 61634234 t fired, 234056 attempts, .
84 EF STEQ 572/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 586 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 577/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 62269970 t fired, 236498 attempts, .
84 EF STEQ 577/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 591 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 582/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 62906842 t fired, 238784 attempts, .
84 EF STEQ 582/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 596 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 587/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 63542799 t fired, 241291 attempts, .
84 EF STEQ 587/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 601 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 592/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 64178170 t fired, 243790 attempts, .
84 EF STEQ 592/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 606 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 597/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 64815162 t fired, 246254 attempts, .
84 EF STEQ 597/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 611 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 602/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 65451745 t fired, 248664 attempts, .
84 EF STEQ 602/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 616 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 607/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 66087791 t fired, 251121 attempts, .
84 EF STEQ 607/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 621 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 612/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 66723288 t fired, 253575 attempts, .
84 EF STEQ 612/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 626 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 617/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 67358883 t fired, 256020 attempts, .
84 EF STEQ 617/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 631 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 622/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 67994470 t fired, 258453 attempts, .
84 EF STEQ 622/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 636 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 627/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 68629675 t fired, 260959 attempts, .
84 EF STEQ 627/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 641 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 632/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 69265916 t fired, 263400 attempts, .
84 EF STEQ 632/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 646 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 637/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 69901572 t fired, 265907 attempts, .
84 EF STEQ 637/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 651 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 642/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 70537631 t fired, 268284 attempts, .
84 EF STEQ 642/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 656 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 647/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 71173797 t fired, 270707 attempts, .
84 EF STEQ 647/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 661 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 652/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 71809680 t fired, 273110 attempts, .
84 EF STEQ 652/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 666 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 657/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 72445266 t fired, 275545 attempts, .
84 EF STEQ 657/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 671 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 662/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 73080697 t fired, 277951 attempts, .
84 EF STEQ 662/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 676 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 667/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 73715993 t fired, 280345 attempts, .
84 EF STEQ 667/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 681 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 672/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 74351452 t fired, 282804 attempts, .
84 EF STEQ 672/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 686 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 677/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 74986622 t fired, 285270 attempts, .
84 EF STEQ 677/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 691 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 682/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 75622089 t fired, 287788 attempts, .
84 EF STEQ 682/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 696 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 687/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 76257848 t fired, 290188 attempts, .
84 EF STEQ 687/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 701 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 692/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 76894495 t fired, 292615 attempts, .
84 EF STEQ 692/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 706 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 697/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 77530588 t fired, 295073 attempts, .
84 EF STEQ 697/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 711 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 702/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 78167482 t fired, 297510 attempts, .
84 EF STEQ 702/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 716 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 707/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 78802902 t fired, 299870 attempts, .
84 EF STEQ 707/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 721 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 712/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 79439813 t fired, 302354 attempts, .
84 EF STEQ 712/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 726 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 717/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 80076740 t fired, 304847 attempts, .
84 EF STEQ 717/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 731 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 722/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 80713686 t fired, 307262 attempts, .
84 EF STEQ 722/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 736 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 727/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 81350694 t fired, 309681 attempts, .
84 EF STEQ 727/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 741 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 732/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 81987214 t fired, 312083 attempts, .
84 EF STEQ 732/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 746 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 737/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 82623121 t fired, 314498 attempts, .
84 EF STEQ 737/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 751 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 742/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 83258567 t fired, 317017 attempts, .
84 EF STEQ 742/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 756 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 747/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 83894433 t fired, 319472 attempts, .
84 EF STEQ 747/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 761 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 752/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 84529306 t fired, 321923 attempts, .
84 EF STEQ 752/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 766 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 757/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 85164800 t fired, 324322 attempts, .
84 EF STEQ 757/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 771 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 762/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 85800971 t fired, 326749 attempts, .
84 EF STEQ 762/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 776 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 767/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 86436732 t fired, 329268 attempts, .
84 EF STEQ 767/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 781 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 772/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 87072456 t fired, 331710 attempts, .
84 EF STEQ 772/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 786 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 777/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 87707442 t fired, 334107 attempts, .
84 EF STEQ 777/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 791 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 782/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 88342700 t fired, 336597 attempts, .
84 EF STEQ 782/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 796 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 787/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 88978077 t fired, 339056 attempts, .
84 EF STEQ 787/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 801 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 792/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 89613183 t fired, 341492 attempts, .
84 EF STEQ 792/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 806 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 797/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 90248344 t fired, 343865 attempts, .
84 EF STEQ 797/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 811 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 802/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 90883961 t fired, 346329 attempts, .
84 EF STEQ 802/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 816 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 807/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 91519550 t fired, 348703 attempts, .
84 EF STEQ 807/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 821 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 812/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 92155198 t fired, 351170 attempts, .
84 EF STEQ 812/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 826 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 817/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 92766789 t fired, 353505 attempts, .
84 EF STEQ 817/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 831 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 822/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 93364826 t fired, 355807 attempts, .
84 EF STEQ 822/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 836 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 827/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 93976765 t fired, 358231 attempts, .
84 EF STEQ 827/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 841 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 832/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 94582439 t fired, 360524 attempts, .
84 EF STEQ 832/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 846 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 837/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 95196018 t fired, 362881 attempts, .
84 EF STEQ 837/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 851 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 842/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 95814133 t fired, 365229 attempts, .
84 EF STEQ 842/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 856 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 847/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 96432770 t fired, 367589 attempts, .
84 EF STEQ 847/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 861 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 852/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 97051969 t fired, 369947 attempts, .
84 EF STEQ 852/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 866 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 857/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 97673352 t fired, 372393 attempts, .
84 EF STEQ 857/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 871 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 862/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 98294856 t fired, 374718 attempts, .
84 EF STEQ 862/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 876 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 867/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 98916617 t fired, 377147 attempts, .
84 EF STEQ 867/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 881 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 872/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 99538147 t fired, 379527 attempts, .
84 EF STEQ 872/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 886 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 877/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 100159382 t fired, 381859 attempts, .
84 EF STEQ 877/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 891 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 882/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 100777857 t fired, 384192 attempts, .
84 EF STEQ 882/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 896 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 887/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 101394739 t fired, 386523 attempts, .
84 EF STEQ 887/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 901 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 892/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 102013572 t fired, 388869 attempts, .
84 EF STEQ 892/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 906 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 897/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 102632944 t fired, 391231 attempts, .
84 EF STEQ 897/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 911 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 902/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 103251799 t fired, 393674 attempts, .
84 EF STEQ 902/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 916 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 907/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 103868442 t fired, 395963 attempts, .
84 EF STEQ 907/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 921 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 912/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 104484910 t fired, 398317 attempts, .
84 EF STEQ 912/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 926 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 917/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 105102321 t fired, 400690 attempts, .
84 EF STEQ 917/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 931 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 922/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 105718587 t fired, 403016 attempts, .
84 EF STEQ 922/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 936 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 927/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 106334638 t fired, 405350 attempts, .
84 EF STEQ 927/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 941 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 932/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 106949369 t fired, 407716 attempts, .
84 EF STEQ 932/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 946 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 937/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 107567402 t fired, 410111 attempts, .
84 EF STEQ 937/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 951 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 942/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 108161643 t fired, 412395 attempts, .
84 EF STEQ 942/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 956 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 947/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 108756696 t fired, 414667 attempts, .
84 EF STEQ 947/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 961 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 952/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 109349153 t fired, 416960 attempts, .
84 EF STEQ 952/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 966 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 957/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 109938949 t fired, 419164 attempts, .
84 EF STEQ 957/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 971 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 962/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 110548716 t fired, 421508 attempts, .
84 EF STEQ 962/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 976 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 967/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 111139045 t fired, 423879 attempts, .
84 EF STEQ 967/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 981 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 972/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 111730402 t fired, 426170 attempts, .
84 EF STEQ 972/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 986 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 977/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 112322907 t fired, 428478 attempts, .
84 EF STEQ 977/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 991 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 982/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 112943352 t fired, 430836 attempts, .
84 EF STEQ 982/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 996 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 987/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 113539729 t fired, 433124 attempts, .
84 EF STEQ 987/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1001 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 992/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 114133720 t fired, 435447 attempts, .
84 EF STEQ 992/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1006 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 997/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 114728017 t fired, 437665 attempts, .
84 EF STEQ 997/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1011 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1002/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 115321143 t fired, 439917 attempts, .
84 EF STEQ 1002/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1016 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1007/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 115928475 t fired, 442183 attempts, .
84 EF STEQ 1007/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1021 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1012/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 116538197 t fired, 444527 attempts, .
84 EF STEQ 1012/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1026 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1017/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 117126499 t fired, 446729 attempts, .
84 EF STEQ 1017/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1031 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1022/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 117718050 t fired, 449033 attempts, .
84 EF STEQ 1022/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1036 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1027/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 118306869 t fired, 451288 attempts, .
84 EF STEQ 1027/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1041 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1032/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 118899138 t fired, 453528 attempts, .
84 EF STEQ 1032/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1046 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1037/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 119486390 t fired, 455811 attempts, .
84 EF STEQ 1037/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1051 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1042/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 120072962 t fired, 458080 attempts, .
84 EF STEQ 1042/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1056 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1047/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 120659168 t fired, 460273 attempts, .
84 EF STEQ 1047/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1061 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1052/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 121245631 t fired, 462474 attempts, .
84 EF STEQ 1052/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1066 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1057/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 121830101 t fired, 464684 attempts, .
84 EF STEQ 1057/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1071 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1062/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 122414848 t fired, 466953 attempts, .
84 EF STEQ 1062/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1076 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1067/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 123001658 t fired, 469327 attempts, .
84 EF STEQ 1067/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1081 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1072/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 123588245 t fired, 471566 attempts, .
84 EF STEQ 1072/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1086 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1077/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 124176649 t fired, 473777 attempts, .
84 EF STEQ 1077/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1091 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1082/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 124783755 t fired, 476105 attempts, .
84 EF STEQ 1082/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1096 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1087/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 125376390 t fired, 478329 attempts, .
84 EF STEQ 1087/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1101 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1092/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 125975856 t fired, 480648 attempts, .
84 EF STEQ 1092/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1106 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1097/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 126587813 t fired, 482962 attempts, .
84 EF STEQ 1097/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1111 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1102/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 127187862 t fired, 485300 attempts, .
84 EF STEQ 1102/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1116 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1107/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 127778072 t fired, 487523 attempts, .
84 EF STEQ 1107/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1121 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1112/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 128368962 t fired, 489765 attempts, .
84 EF STEQ 1112/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1126 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1117/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 128960589 t fired, 492034 attempts, .
84 EF STEQ 1117/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1131 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1122/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 129552006 t fired, 494265 attempts, .
84 EF STEQ 1122/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1136 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1127/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 130143971 t fired, 496550 attempts, .
84 EF STEQ 1127/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1141 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1132/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 130733097 t fired, 498798 attempts, .
84 EF STEQ 1132/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1146 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1137/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 131322611 t fired, 501046 attempts, .
84 EF STEQ 1137/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1151 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1142/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 131915390 t fired, 503370 attempts, .
84 EF STEQ 1142/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1156 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1147/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 132517299 t fired, 505631 attempts, .
84 EF STEQ 1147/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1161 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1152/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 133107015 t fired, 507904 attempts, .
84 EF STEQ 1152/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1166 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1157/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 133694569 t fired, 510164 attempts, .
84 EF STEQ 1157/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1171 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1162/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 134287312 t fired, 512410 attempts, .
84 EF STEQ 1162/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1176 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1167/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 134875864 t fired, 514630 attempts, .
84 EF STEQ 1167/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1181 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1172/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 135464207 t fired, 516888 attempts, .
84 EF STEQ 1172/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1186 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1177/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 136055395 t fired, 519099 attempts, .
84 EF STEQ 1177/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1191 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1182/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 136647040 t fired, 521305 attempts, .
84 EF STEQ 1182/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1196 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1187/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 137238718 t fired, 523571 attempts, .
84 EF STEQ 1187/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1201 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1192/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 137828732 t fired, 525863 attempts, .
84 EF STEQ 1192/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1206 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1197/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 138418875 t fired, 528135 attempts, .
84 EF STEQ 1197/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1211 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1202/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 139009223 t fired, 530401 attempts, .
84 EF STEQ 1202/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1216 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1207/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 139599907 t fired, 532624 attempts, .
84 EF STEQ 1207/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1221 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1212/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 140189956 t fired, 534913 attempts, .
84 EF STEQ 1212/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1226 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1217/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 140780384 t fired, 537269 attempts, .
84 EF STEQ 1217/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1231 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1222/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 141373044 t fired, 539544 attempts, .
84 EF STEQ 1222/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1236 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1227/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 141965848 t fired, 541815 attempts, .
84 EF STEQ 1227/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1241 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1232/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 142561347 t fired, 544078 attempts, .
84 EF STEQ 1232/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1246 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1237/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 143154912 t fired, 546282 attempts, .
84 EF STEQ 1237/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1251 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1242/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 143748451 t fired, 548509 attempts, .
84 EF STEQ 1242/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1256 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1247/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 144342054 t fired, 550757 attempts, .
84 EF STEQ 1247/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1261 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1252/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 144935961 t fired, 553125 attempts, .
84 EF STEQ 1252/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1266 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1257/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 145530744 t fired, 555421 attempts, .
84 EF STEQ 1257/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1271 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1262/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 146125322 t fired, 557681 attempts, .
84 EF STEQ 1262/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1276 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1267/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 146719879 t fired, 560005 attempts, .
84 EF STEQ 1267/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1281 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1272/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 147314431 t fired, 562220 attempts, .
84 EF STEQ 1272/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1286 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1277/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 147907589 t fired, 564436 attempts, .
84 EF STEQ 1277/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1291 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1282/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 148501195 t fired, 566672 attempts, .
84 EF STEQ 1282/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1296 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1287/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 149094440 t fired, 568968 attempts, .
84 EF STEQ 1287/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1301 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1292/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 149685532 t fired, 571180 attempts, .
84 EF STEQ 1292/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1306 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1297/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 150278809 t fired, 573419 attempts, .
84 EF STEQ 1297/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1311 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1302/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 150873163 t fired, 575700 attempts, .
84 EF STEQ 1302/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1316 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1307/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 151464013 t fired, 577947 attempts, .
84 EF STEQ 1307/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1321 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1312/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 152053473 t fired, 580231 attempts, .
84 EF STEQ 1312/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1326 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1317/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 152646532 t fired, 582507 attempts, .
84 EF STEQ 1317/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1331 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1322/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 153234896 t fired, 584781 attempts, .
84 EF STEQ 1322/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1336 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1327/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 153823517 t fired, 587010 attempts, .
84 EF STEQ 1327/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1341 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1332/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 154418700 t fired, 589337 attempts, .
84 EF STEQ 1332/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1346 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1337/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 155013190 t fired, 591593 attempts, .
84 EF STEQ 1337/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1351 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1342/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 155605519 t fired, 593906 attempts, .
84 EF STEQ 1342/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1356 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1347/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 156186926 t fired, 596021 attempts, .
84 EF STEQ 1347/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1361 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1352/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 156779595 t fired, 598280 attempts, .
84 EF STEQ 1352/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1366 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1357/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 157375251 t fired, 600549 attempts, .
84 EF STEQ 1357/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1371 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1362/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 157970090 t fired, 602879 attempts, .
84 EF STEQ 1362/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1376 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1367/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 158563629 t fired, 605148 attempts, .
84 EF STEQ 1367/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1381 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1372/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 159165821 t fired, 607330 attempts, .
84 EF STEQ 1372/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1386 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1377/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 159784626 t fired, 609679 attempts, .
84 EF STEQ 1377/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1391 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1382/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 160402432 t fired, 611950 attempts, .
84 EF STEQ 1382/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1396 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1387/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 161014181 t fired, 614263 attempts, .
84 EF STEQ 1387/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1401 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1392/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 161608689 t fired, 616443 attempts, .
84 EF STEQ 1392/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1406 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1397/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 162204367 t fired, 618697 attempts, .
84 EF STEQ 1397/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1411 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1402/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 162799666 t fired, 620961 attempts, .
84 EF STEQ 1402/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1416 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1407/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 163395077 t fired, 623293 attempts, .
84 EF STEQ 1407/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1421 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1412/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 163990148 t fired, 625555 attempts, .
84 EF STEQ 1412/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1426 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1417/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 164584358 t fired, 627819 attempts, .
84 EF STEQ 1417/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1431 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1422/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 165178656 t fired, 630131 attempts, .
84 EF STEQ 1422/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1436 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1427/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 165776690 t fired, 632365 attempts, .
84 EF STEQ 1427/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1441 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1432/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 166385323 t fired, 634689 attempts, .
84 EF STEQ 1432/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1446 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1437/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 166982171 t fired, 636915 attempts, .
84 EF STEQ 1437/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1451 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1442/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 167576971 t fired, 639250 attempts, .
84 EF STEQ 1442/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1456 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1447/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 168171588 t fired, 641427 attempts, .
84 EF STEQ 1447/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1461 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1452/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 168766548 t fired, 643739 attempts, .
84 EF STEQ 1452/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1466 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1457/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 169361956 t fired, 646056 attempts, .
84 EF STEQ 1457/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1471 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1462/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 169958627 t fired, 648360 attempts, .
84 EF STEQ 1462/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1476 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1467/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 170552787 t fired, 650648 attempts, .
84 EF STEQ 1467/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1481 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1472/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 171152464 t fired, 652929 attempts, .
84 EF STEQ 1472/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1486 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1477/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 171751492 t fired, 655260 attempts, .
84 EF STEQ 1477/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1491 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1482/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 172344352 t fired, 657543 attempts, .
84 EF STEQ 1482/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1496 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1487/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 172949242 t fired, 659846 attempts, .
84 EF STEQ 1487/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1501 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1492/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 173559842 t fired, 662268 attempts, .
84 EF STEQ 1492/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1506 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1497/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 174158686 t fired, 664509 attempts, .
84 EF STEQ 1497/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1511 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1502/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 174756448 t fired, 666778 attempts, .
84 EF STEQ 1502/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1516 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1507/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 175351555 t fired, 669026 attempts, .
84 EF STEQ 1507/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1521 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1512/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 175949695 t fired, 671318 attempts, .
84 EF STEQ 1512/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1526 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1517/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 176549687 t fired, 673673 attempts, .
84 EF STEQ 1517/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1531 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1522/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 177149445 t fired, 675899 attempts, .
84 EF STEQ 1522/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1536 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1527/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 177748695 t fired, 678197 attempts, .
84 EF STEQ 1527/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1541 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1532/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 178348495 t fired, 680462 attempts, .
84 EF STEQ 1532/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1546 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1537/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 178947791 t fired, 682783 attempts, .
84 EF STEQ 1537/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1551 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1542/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 179550803 t fired, 685081 attempts, .
84 EF STEQ 1542/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1556 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1547/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 180163382 t fired, 687397 attempts, .
84 EF STEQ 1547/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1561 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1552/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 180764110 t fired, 689668 attempts, .
84 EF STEQ 1552/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1566 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1557/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 181364117 t fired, 691923 attempts, .
84 EF STEQ 1557/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1571 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1562/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 181964423 t fired, 694186 attempts, .
84 EF STEQ 1562/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1576 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1567/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 182565178 t fired, 696511 attempts, .
84 EF STEQ 1567/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1581 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1572/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 183164565 t fired, 698777 attempts, .
84 EF STEQ 1572/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1586 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1577/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 183764887 t fired, 701157 attempts, .
84 EF STEQ 1577/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1591 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1582/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 184365513 t fired, 703375 attempts, .
84 EF STEQ 1582/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1596 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1587/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 184963877 t fired, 705613 attempts, .
84 EF STEQ 1587/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1601 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1592/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 185561124 t fired, 707969 attempts, .
84 EF STEQ 1592/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1606 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1597/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 186161496 t fired, 710236 attempts, .
84 EF STEQ 1597/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1611 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1602/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 186759181 t fired, 712475 attempts, .
84 EF STEQ 1602/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1616 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1607/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 187371545 t fired, 714863 attempts, .
84 EF STEQ 1607/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1621 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1612/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 187995731 t fired, 717230 attempts, .
84 EF STEQ 1612/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1626 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1617/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 188623247 t fired, 719580 attempts, .
84 EF STEQ 1617/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1631 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1622/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 189252007 t fired, 722064 attempts, .
84 EF STEQ 1622/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1636 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1627/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 189874462 t fired, 724421 attempts, .
84 EF STEQ 1627/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1641 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1632/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 190474467 t fired, 726652 attempts, .
84 EF STEQ 1632/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1646 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1637/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 191074516 t fired, 728948 attempts, .
84 EF STEQ 1637/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1651 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1642/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 191674468 t fired, 731289 attempts, .
84 EF STEQ 1642/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1656 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1647/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 192274501 t fired, 733527 attempts, .
84 EF STEQ 1647/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1661 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1652/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 192875059 t fired, 735792 attempts, .
84 EF STEQ 1652/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1666 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1657/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 193475121 t fired, 738089 attempts, .
84 EF STEQ 1657/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1671 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1662/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 194073418 t fired, 740379 attempts, .
84 EF STEQ 1662/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1676 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1667/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 194673544 t fired, 742605 attempts, .
84 EF STEQ 1667/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1681 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1672/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 195277519 t fired, 744853 attempts, .
84 EF STEQ 1672/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1686 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1677/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 195900518 t fired, 747222 attempts, .
84 EF STEQ 1677/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1691 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1682/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 196524240 t fired, 749601 attempts, .
84 EF STEQ 1682/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1696 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1687/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 197148215 t fired, 751957 attempts, .
84 EF STEQ 1687/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1701 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1692/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 197775887 t fired, 754337 attempts, .
84 EF STEQ 1692/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1706 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1697/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 198378960 t fired, 756615 attempts, .
84 EF STEQ 1697/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1711 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1702/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 198978998 t fired, 758881 attempts, .
84 EF STEQ 1702/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1716 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1707/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 199578499 t fired, 761245 attempts, .
84 EF STEQ 1707/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1721 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1712/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 200178166 t fired, 763500 attempts, .
84 EF STEQ 1712/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1726 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1717/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 200777092 t fired, 765898 attempts, .
84 EF STEQ 1717/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1731 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1722/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 201377316 t fired, 768157 attempts, .
84 EF STEQ 1722/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1736 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1727/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 201977592 t fired, 770463 attempts, .
84 EF STEQ 1727/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1741 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1732/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 202578527 t fired, 772752 attempts, .
84 EF STEQ 1732/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1746 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1737/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 203178778 t fired, 775038 attempts, .
84 EF STEQ 1737/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1751 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1742/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 203780233 t fired, 777245 attempts, .
84 EF STEQ 1742/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1756 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1747/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 204381287 t fired, 779547 attempts, .
84 EF STEQ 1747/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1761 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1752/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 204990398 t fired, 781869 attempts, .
84 EF STEQ 1752/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1766 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1757/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 205612322 t fired, 784231 attempts, .
84 EF STEQ 1757/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1771 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1762/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 206209699 t fired, 786522 attempts, .
84 EF STEQ 1762/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1776 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1767/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 206809209 t fired, 788818 attempts, .
84 EF STEQ 1767/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1781 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1772/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 207407865 t fired, 791097 attempts, .
84 EF STEQ 1772/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1786 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1777/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 208006114 t fired, 793280 attempts, .
84 EF STEQ 1777/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1791 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1782/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 208605111 t fired, 795523 attempts, .
84 EF STEQ 1782/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1796 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1787/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 209204181 t fired, 797879 attempts, .
84 EF STEQ 1787/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1801 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1792/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 209804394 t fired, 800177 attempts, .
84 EF STEQ 1792/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1806 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1797/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 210405809 t fired, 802507 attempts, .
84 EF STEQ 1797/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1811 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1802/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 211005095 t fired, 804824 attempts, .
84 EF STEQ 1802/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1816 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1807/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 211606501 t fired, 807123 attempts, .
84 EF STEQ 1807/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1821 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1812/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 212204461 t fired, 809393 attempts, .
84 EF STEQ 1812/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1826 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1817/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 212805035 t fired, 811694 attempts, .
84 EF STEQ 1817/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1831 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1822/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 213403965 t fired, 814018 attempts, .
84 EF STEQ 1822/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1836 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1827/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 214003395 t fired, 816262 attempts, .
84 EF STEQ 1827/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1841 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1832/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 214605567 t fired, 818548 attempts, .
84 EF STEQ 1832/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1846 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1837/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 215205132 t fired, 820805 attempts, .
84 EF STEQ 1837/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1851 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1842/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 215829031 t fired, 823122 attempts, .
84 EF STEQ 1842/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1856 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1847/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 216451551 t fired, 825470 attempts, .
84 EF STEQ 1847/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1861 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1852/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 217080461 t fired, 827824 attempts, .
84 EF STEQ 1852/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1866 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1857/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 217709743 t fired, 830248 attempts, .
84 EF STEQ 1857/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1871 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1862/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 218338805 t fired, 832631 attempts, .
84 EF STEQ 1862/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1876 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1867/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 218967415 t fired, 835016 attempts, .
84 EF STEQ 1867/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1881 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1872/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 219596175 t fired, 837379 attempts, .
84 EF STEQ 1872/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1886 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1877/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 220224964 t fired, 839783 attempts, .
84 EF STEQ 1877/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1891 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1882/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 220853903 t fired, 842195 attempts, .
84 EF STEQ 1882/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1896 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1887/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 221470433 t fired, 844567 attempts, .
84 EF STEQ 1887/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1901 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1892/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 222096096 t fired, 846931 attempts, .
84 EF STEQ 1892/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1906 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1897/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 222724626 t fired, 849272 attempts, .
84 EF STEQ 1897/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1911 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1902/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 223354347 t fired, 851674 attempts, .
84 EF STEQ 1902/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1916 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1907/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 223982851 t fired, 854025 attempts, .
84 EF STEQ 1907/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1921 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1912/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 224602465 t fired, 856396 attempts, .
84 EF STEQ 1912/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1926 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1917/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 225232313 t fired, 858763 attempts, .
84 EF STEQ 1917/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1931 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1922/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 225861102 t fired, 861125 attempts, .
84 EF STEQ 1922/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1936 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1927/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 226491020 t fired, 863596 attempts, .
84 EF STEQ 1927/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1941 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1932/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 227121173 t fired, 865980 attempts, .
84 EF STEQ 1932/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1946 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1937/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 227750634 t fired, 868357 attempts, .
84 EF STEQ 1937/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1951 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1942/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 228380506 t fired, 870648 attempts, .
84 EF STEQ 1942/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1956 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1947/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 229010855 t fired, 873024 attempts, .
84 EF STEQ 1947/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1961 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1952/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 229641165 t fired, 875435 attempts, .
84 EF STEQ 1952/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1966 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1957/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 230270615 t fired, 877842 attempts, .
84 EF STEQ 1957/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1971 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1962/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 230899789 t fired, 880334 attempts, .
84 EF STEQ 1962/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1976 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1967/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 231529517 t fired, 882785 attempts, .
84 EF STEQ 1967/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1981 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1972/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 232143958 t fired, 885088 attempts, .
84 EF STEQ 1972/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1986 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1977/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 232748524 t fired, 887448 attempts, .
84 EF STEQ 1977/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1991 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1982/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 233353255 t fired, 889848 attempts, .
84 EF STEQ 1982/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 1996 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1987/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 233957624 t fired, 892232 attempts, .
84 EF STEQ 1987/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2001 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1992/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 234561532 t fired, 894520 attempts, .
84 EF STEQ 1992/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2006 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 1997/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 235177224 t fired, 896902 attempts, .
84 EF STEQ 1997/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2011 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2002/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 235804222 t fired, 899276 attempts, .
84 EF STEQ 2002/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2016 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2007/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 236432866 t fired, 901686 attempts, .
84 EF STEQ 2007/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2021 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2012/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 237062811 t fired, 904057 attempts, .
84 EF STEQ 2012/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2026 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2017/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 237685258 t fired, 906468 attempts, .
84 EF STEQ 2017/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2031 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2022/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 238301144 t fired, 908834 attempts, .
84 EF STEQ 2022/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2036 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2027/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 238930167 t fired, 911222 attempts, .
84 EF STEQ 2027/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2041 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2032/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 239560266 t fired, 913579 attempts, .
84 EF STEQ 2032/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2046 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2037/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 240186064 t fired, 915935 attempts, .
84 EF STEQ 2037/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2051 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2042/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 240814943 t fired, 918310 attempts, .
84 EF STEQ 2042/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2056 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2047/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 241443999 t fired, 920743 attempts, .
84 EF STEQ 2047/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2061 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2052/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 242069840 t fired, 923075 attempts, .
84 EF STEQ 2052/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2066 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2057/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 242673669 t fired, 925466 attempts, .
84 EF STEQ 2057/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2071 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2062/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 243277756 t fired, 927766 attempts, .
84 EF STEQ 2062/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2076 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2067/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 243881453 t fired, 930029 attempts, .
84 EF STEQ 2067/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2081 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2072/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 244492533 t fired, 932329 attempts, .
84 EF STEQ 2072/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2086 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2077/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 245112452 t fired, 934698 attempts, .
84 EF STEQ 2077/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2091 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2082/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 245738215 t fired, 937138 attempts, .
84 EF STEQ 2082/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2096 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2087/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 246363367 t fired, 939542 attempts, .
84 EF STEQ 2087/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2101 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2092/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 246989748 t fired, 941943 attempts, .
84 EF STEQ 2092/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2106 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2097/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 247616156 t fired, 944315 attempts, .
84 EF STEQ 2097/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2111 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2102/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 248242328 t fired, 946685 attempts, .
84 EF STEQ 2102/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2116 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2107/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 248864088 t fired, 949126 attempts, .
84 EF STEQ 2107/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2121 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2112/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 249462375 t fired, 951461 attempts, .
84 EF STEQ 2112/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2126 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2117/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 250064434 t fired, 953783 attempts, .
84 EF STEQ 2117/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2131 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2122/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 250665029 t fired, 956108 attempts, .
84 EF STEQ 2122/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2136 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2127/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 251265628 t fired, 958489 attempts, .
84 EF STEQ 2127/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2141 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2132/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 251890144 t fired, 960914 attempts, .
84 EF STEQ 2132/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2146 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2137/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 252516065 t fired, 963312 attempts, .
84 EF STEQ 2137/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2151 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2142/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 253144394 t fired, 965766 attempts, .
84 EF STEQ 2142/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2156 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2147/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 253773039 t fired, 968163 attempts, .
84 EF STEQ 2147/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2161 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2152/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 254390434 t fired, 970488 attempts, .
84 EF STEQ 2152/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2166 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2157/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 254990940 t fired, 972746 attempts, .
84 EF STEQ 2157/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2171 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2162/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 255609551 t fired, 975088 attempts, .
84 EF STEQ 2162/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2176 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2167/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 256234954 t fired, 977466 attempts, .
84 EF STEQ 2167/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2181 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2172/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 256862078 t fired, 979866 attempts, .
84 EF STEQ 2172/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2186 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2177/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 257489861 t fired, 982283 attempts, .
84 EF STEQ 2177/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2191 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2182/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 258116509 t fired, 984592 attempts, .
84 EF STEQ 2182/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2196 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2187/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 258744476 t fired, 986961 attempts, .
84 EF STEQ 2187/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2201 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2192/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 259371931 t fired, 989420 attempts, .
84 EF STEQ 2192/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2206 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2197/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 259997189 t fired, 991853 attempts, .
84 EF STEQ 2197/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2211 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-12: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-13: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-14: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-15: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DoubleLock-PT-p2s1-ReachabilityCardinality-01: AG 0 0 2 0 1 0 3 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 EF FNDP 2202/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 260622585 t fired, 994229 attempts, .
84 EF STEQ 2202/3586 0/5 DoubleLock-PT-p2s1-ReachabilityCardinality-01 sara is running.
Time elapsed: 2216 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DoubleLock-PT-p2s1-ReachabilityCardinality-00: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-02: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-03: INITIAL false preprocessing
DoubleLock-PT-p2s1-ReachabilityCardinality-04: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-05: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-06: AG false findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-07: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-08: EF true findpath
DoubleLock-PT-p2s1-ReachabilityCardinality-09: EF false state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-10: AG true state equation
DoubleLock-PT-p2s1-ReachabilityCardinality-11: INITIAL true preprocessing
========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DoubleLock-PT-p2s1"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is DoubleLock-PT-p2s1, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r134-smll-167819412900534"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DoubleLock-PT-p2s1.tgz
mv DoubleLock-PT-p2s1 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;