MCC'2023- Execution of r134-smll-167819411700042

About the Execution of LoLA for Dekker-PT-200

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
0.000	379771.00	0.00	0.00	[undef]	Cannot compute

Execution Chart

Sorry, for this execution, no execution chart could be reported.

Trace from the execution

Formatting '/data/fkordon/mcc2023-inpu
Waiting for the VM to be
................................
==========
Generated by BenchKit 2-5348
Executing tool lola
Input is Dekker-PT-200,
Time confinement is
Memory confinement
Number of cores is 4
Run identifier is r134-smll-
================================

--------------------
preparation of the directory
/home/mcc/execution
total 25M
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users

--------------------
content from stdout:

=== Data for post analysis

The expected result is
BOOL_VECTOR

here is the order used
FORMULA_NAME Dekker-PT-200-CTLFi
FORMULA_NAME Dekker-PT-200-CTLFi
FORMULA_NAME Dekker-PT-200-CTLFi
FORMULA_NAME Dekker-PT-200-CTLFi
FORMULA_NAME Dekker-PT-200-CTLFi
FORMULA_NAME Dekker-PT-200-CTLFi
FORMULA_NAME Dekker-PT-200-CTLFi
FORMULA_NAME Dekker-PT-200-CTLFi
FORMULA_NAME Dekker-PT-200-CTLFi
FORMULA_NAME Dekker-PT-200-CTLFi
FORMULA_NAME Dekker-PT-200-CTLFi
FORMULA_NAME Dekker-PT-200-CTLFi
FORMULA_NAME Dekker-PT-200-CTLFi
FORMULA_NAME Dekker-PT-200-CTLFi
FORMULA_NAME Dekker-PT-200-CTLFi
FORMULA_NAME Dekker-PT-200-CTLFi

=== Now, execution of the

BK_START 1678263807689

bash -c /home/mcc/BenchKit/BenchKit_head.sh
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/b
BK_TIME_CONFINEMENT=3600
BK_INPUT=Dekker-PT-200
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT Dekker-PT-200
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKi
current directory: /home/mcc/exe
CTLFireability

BK_STOP 1678264187460

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file
lola: reading net from
lola: reading pnml
lola: PNML file contains
lola: finished parsing
lola: closed net file
lola: Reading formula.
lola: Using XML format
lola: reading XML formula
lola: reading formula
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: RELEASE
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: RELEASE
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: RELEASE
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: RELEASE
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: RELEASE
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: RELEASE
lola: Created skeleton
lola: Created skeleton
lola: RELEASE
lola: Created skeleton
lola: Created skeleton
lola: Rule S: 0 transitions
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Dekker-PT-200-CTLFireability-00:
Dekker-PT-200-CTLFireability-01:
Dekker-PT-200-CTLFireability-02:
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TASK CATEGORY TYPE TIME/TLIMIT

Time elapsed: 74 secs.
# running tasks: 0 of 4
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: RELEASE
lola: Created skeleton
lola: RELEASE
lola: Created skeleton
lola: Created skeleton
lola: RELEASE
FINISHED FORMULA: CATEGORY

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Time elapsed: 79 secs.
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lola: Created skeleton
lola: Created skeleton
lola: RELEASE
lola: Created skeleton
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
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Time elapsed: 84 secs.
# running tasks: 0 of 4
lola: Created skeleton
lola: Created skeleton
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: LAUNCH task # 61
lola: time limit :
lola: memory limit: 5 pages
lola: LAUNCH task # 62
lola: time limit :
lola: memory limit: 5 pages
lola: LAUNCH task # 63
lola: time limit :
lola: memory limit: 5 pages
lola: LAUNCH task # 64
lola: time limit :
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/
lola: FINISHED task #
lola: result
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: CANCELED task #
lola: CANCELED task #
lola: CANCELED task #
lola: FINISHED task #
lola: result
lola: fired transitions :
lola: tried executions :
lola: time used :
lola: memory pages used :
sara: try reading problem
sara: place or transition

lola: FINISHED task #
lola: result
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Time elapsed: 89 secs.
# running tasks: 0 of 4
lola: Created skeleton
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: LAUNCH task # 66
lola: time limit :
lola: memory limit: 5 pages
lola: LAUNCH task # 67
lola: time limit :
lola: memory limit: 5 pages
lola: LAUNCH task # 68
lola: time limit :
lola: memory limit: 5 pages
lola: LAUNCH task # 69
lola: time limit :
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/
lola: FINISHED task #
lola: result
lola: fired transitions :
lola: tried executions :
lola: time used :
lola: memory pages used :
lola: CANCELED task #
lola: CANCELED task #
lola: CANCELED task #
lola: FINISHED task #
lola: result
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lola: time used :
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lola: FINISHED task #
lola: result
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
sara: try reading problem
sara: place or transition

lola: FINISHED task #
lola: result
lola: Created skeleton
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Time elapsed: 94 secs.
# running tasks: 0 of 4
lola: Created skeleton
lola: RELEASE
lola: Created skeleton
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=========================================================== examination is CTLFireability 3600 seconds is 16384 MBytes 167819411700042 ===================================== to be used: 8.1K Feb 26 04:41 CTLCardinality.txt 86K Feb 26 04:41 CTLCardinality.xml 6.9K Feb 26 02:49 CTLFireability.txt 53K Feb 26 02:49 CTLFireability.xml 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml 3.8K Feb 25 15:56 LTLCardinality.txt 25K Feb 25 15:56 LTLCardinality.xml 2.9K Feb 25 15:56 LTLFireability.txt 18K Feb 25 15:56 LTLFireability.xml 16K Feb 26 06:50 ReachabilityCardinality.txt 166K Feb 26 06:50 ReachabilityCardinality.xml 16K Feb 26 05:51 ReachabilityFireability.txt 110K Feb 26 05:51 ReachabilityFireability.xml 1.6K Feb 25 15:56 UpperBounds.txt 3.6K Feb 25 15:56 UpperBounds.xml 6 Mar 5 18:22 equiv_col 4 Mar 5 18:22 instance 6 Mar 5 18:22 iscolored 25M Mar 5 18:22 model.pnml generated by BenchKit (invocation template) a vector of booleans to build the result vector(from text file) reability-00 reability-01 reability-02 reability-03 reability-04 reability-05 reability-06 reability-07 reability-08 reability-09 reability-10 reability-11 reability-12 reability-13 reability-14 reability-15 tool begins 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N in/ t/bin//../lola/bin/ cution (--pnmlnet) /home/mcc/execution/model.pnml place/transition net /home/mcc/execution/model.pnml (--xmlformula) from /home/mcc/execution/CTLFireability.xml formula_rewrite.k:550 formula_rewrite.k:314 formula_rewrite.k:322 formula_rewrite.k:337 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:317 formula_rewrite.k:322 formula_rewrite.k:334 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:334 formula_rewrite.k:296 formula_rewrite.k:250 formula_rewrite.k:547 formula_rewrite.k:475 formula_rewrite.k:317 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:337 formula_rewrite.k:322 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:544 formula_rewrite.k:475 formula_rewrite.k:445 formula_rewrite.k:317 formula_rewrite.k:314 formula_rewrite.k:322 formula_rewrite.k:328 formula_rewrite.k:325 formula_rewrite.k:334 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:328 formula_rewrite.k:325 formula_rewrite.k:334 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:337 formula_rewrite.k:317 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:337 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:334 formula_rewrite.k:325 formula_rewrite.k:328 formula_rewrite.k:322 formula_rewrite.k:340 formula_rewrite.k:299 formula_rewrite.k:299 formula_rewrite.k:253 formula_rewrite.k:253 formula_rewrite.k:317 formula_rewrite.k:296 formula_rewrite.k:317 formula_rewrite.k:296 formula_rewrite.k:317 formula_rewrite.k:325 formula_rewrite.k:337 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:314 formula_rewrite.k:322 formula_rewrite.k:334 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:314 formula_rewrite.k:322 formula_rewrite.k:334 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:250 formula_rewrite.k:325 formula_rewrite.k:328 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:314 formula_rewrite.k:325 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:317 formula_rewrite.k:322 formula_rewrite.k:337 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:478 formula_rewrite.k:553 formula_rewrite.k:250 formula_rewrite.k:322 formula_rewrite.k:331 formula_rewrite.k:322 formula_rewrite.k:328 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:337 formula_rewrite.k:322 formula_rewrite.k:337 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:328 formula_rewrite.k:325 formula_rewrite.k:331 formula_rewrite.k:299 formula_rewrite.k:317 formula_rewrite.k:314 formula_rewrite.k:322 formula_rewrite.k:328 formula_rewrite.k:317 formula_rewrite.k:325 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:331 formula_rewrite.k:325 formula_rewrite.k:334 formula_rewrite.k:296 formula_rewrite.k:314 formula_rewrite.k:317 formula_rewrite.k:296 formula_rewrite.k:314 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:337 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:317 formula_rewrite.k:325 formula_rewrite.k:337 formula_rewrite.k:325 formula_rewrite.k:328 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:460 formula_rewrite.k:322 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:337 formula_rewrite.k:296 formula_rewrite.k:296 in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. removed,0 places removed VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 1 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 EF 0 0 0 0 0 0 0 0 EF 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 0 Visible: 16 in 0.000000 secs. in 1.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 1.000000 secs. VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 EF 0 0 0 0 0 0 0 0 EF 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 0 Visible: 16 in 3.000000 secs. in 1.000000 secs. in 1.000000 secs. VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 0 0 0 0 EF 0 0 0 0 0 0 0 0 EF 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 0 Visible: 16 in 1.000000 secs. in 1.000000 secs. formula_rewrite.k:711 formula_rewrite.k:711 formula_rewrite.k:711 (type SKEL/FNDP) for 45 Dekker-PT-200-CTLFireability-11 32000000 sec (type SKEL/EQUN) for 45 Dekker-PT-200-CTLFireability-11 32000000 sec (type SKEL/SRCH) for 45 Dekker-PT-200-CTLFireability-11 32000000 sec (type SKEL/SRCH) for 45 Dekker-PT-200-CTLFireability-11 32000000 sec formula_rewrite.k:711 64 (type SKEL/SRCH) for Dekker-PT-200-CTLFireability-11 : true 3 2 0.000000 1 61 (type FNDP) for Dekker-PT-200-CTLFireability-11 (obsolete) 62 (type EQUN) for Dekker-PT-200-CTLFireability-11 (obsolete) 63 (type SRCH) for Dekker-PT-200-CTLFireability-11 (obsolete) 61 (type SKEL/FNDP) for Dekker-PT-200-CTLFireability-11 : true 1 1 0.000000 0 file /home/mcc/execution/CTLFireability-62.sara. ordering is non-deterministic 62 (type SKEL/EQUN) for Dekker-PT-200-CTLFireability-11 : true VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 0 0 0 0 EF 0 0 0 0 3 0 0 1 EF 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 1 Visible: 16 in 7.000000 secs. formula_rewrite.k:711 formula_rewrite.k:711 formula_rewrite.k:711 (type SKEL/FNDP) for 48 Dekker-PT-200-CTLFireability-12 32000000 sec (type SKEL/EQUN) for 48 Dekker-PT-200-CTLFireability-12 32000000 sec (type SKEL/SRCH) for 48 Dekker-PT-200-CTLFireability-12 32000000 sec (type SKEL/SRCH) for 48 Dekker-PT-200-CTLFireability-12 32000000 sec formula_rewrite.k:711 66 (type SKEL/FNDP) for Dekker-PT-200-CTLFireability-12 : true 1 1 0.000000 0 67 (type EQUN) for Dekker-PT-200-CTLFireability-12 (obsolete) 68 (type SRCH) for Dekker-PT-200-CTLFireability-12 (obsolete) 69 (type SRCH) for Dekker-PT-200-CTLFireability-12 (obsolete) 68 (type SKEL/SRCH) for Dekker-PT-200-CTLFireability-12 : true 3 2 0.000000 1 69 (type SKEL/SRCH) for Dekker-PT-200-CTLFireability-12 : true 3 2 0.000000 1 file /home/mcc/execution/CTLFireability-67.sara. ordering is non-deterministic 67 (type SKEL/EQUN) for Dekker-PT-200-CTLFireability-12 : true in 1.000000 secs. VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 EF 0 0 0 0 3 0 0 1 EF 0 0 0 0 4 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 2 Visible: 16 in 0.000000 secs. in 1.000000 secs. VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 EF 0 0 0 0 3 0 0 1 EF 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 2 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 EF 0 0 0 0 3 0 0 1 EF 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 2 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 EF 0 0 0 0 3 0 0 1 EF 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 2 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 EF 0 0 0 0 3 0 0 1 EF 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 2 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 EF 0 0 0 0 3 0 0 1 EF 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 2 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 EF 0 0 0 0 3 0 0 1 EF 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 2 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 EF 0 0 0 0 3 0 0 1 EF 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 2 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 EF 0 0 0 0 3 0 0 1 EF 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 2 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 EF 0 0 0 0 3 0 0 1 EF 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 2 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 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1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 2 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 1 0 0 0 1 0 0 0 EF 0 0 0 0 3 0 0 1 EF 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 2 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CONJ 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 1 0 0 0 1 0 0 0 EF 0 0 0 0 3 0 0 1 EF 0 0 0 0 4 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 2 Visible: 16 bin//../BenchKit_head.sh: line 63: 371 Killed lola --conf=$BIN_DIR/configfiles/ctlfireabilityconf --formula=$DIR/CTLFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Dekker-PT-200"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is Dekker-PT-200, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r134-smll-167819411700042"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Dekker-PT-200.tgz
mv Dekker-PT-200 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;