Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r107-tall-167814484500694.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool smartxred
Input is DLCround-PT-07b, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r107-tall-167814484500694
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.4M
-rw-r--r-- 1 mcc users 7.4K Feb 25 18:21 CTLCardinality.txt
-rw-r--r-- 1 mcc users 83K Feb 25 18:21 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.9K Feb 25 18:20 CTLFireability.txt
-rw-r--r-- 1 mcc users 42K Feb 25 18:20 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:53 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 15:53 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:53 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 15:53 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.3K Feb 25 18:22 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 93K Feb 25 18:22 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.2K Feb 25 18:21 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 68K Feb 25 18:21 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 963K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-07b-ReachabilityCardinality-00
FORMULA_NAME DLCround-PT-07b-ReachabilityCardinality-01
FORMULA_NAME DLCround-PT-07b-ReachabilityCardinality-02
FORMULA_NAME DLCround-PT-07b-ReachabilityCardinality-03
FORMULA_NAME DLCround-PT-07b-ReachabilityCardinality-04
FORMULA_NAME DLCround-PT-07b-ReachabilityCardinality-05
FORMULA_NAME DLCround-PT-07b-ReachabilityCardinality-06
FORMULA_NAME DLCround-PT-07b-ReachabilityCardinality-07
FORMULA_NAME DLCround-PT-07b-ReachabilityCardinality-08
FORMULA_NAME DLCround-PT-07b-ReachabilityCardinality-09
FORMULA_NAME DLCround-PT-07b-ReachabilityCardinality-10
FORMULA_NAME DLCround-PT-07b-ReachabilityCardinality-11
FORMULA_NAME DLCround-PT-07b-ReachabilityCardinality-12
FORMULA_NAME DLCround-PT-07b-ReachabilityCardinality-13
FORMULA_NAME DLCround-PT-07b-ReachabilityCardinality-14
FORMULA_NAME DLCround-PT-07b-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678412293078

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=smartxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-07b
Applying reductions before tool smart
Invoking reducer
Running Version 202303021504
[2023-03-10 01:38:14] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-10 01:38:14] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 01:38:14] [INFO ] Load time of PNML (sax parser for PT used): 154 ms
[2023-03-10 01:38:14] [INFO ] Transformed 2703 places.
[2023-03-10 01:38:14] [INFO ] Transformed 4071 transitions.
[2023-03-10 01:38:14] [INFO ] Found NUPN structural information;
[2023-03-10 01:38:14] [INFO ] Parsed PT model containing 2703 places and 4071 transitions and 11073 arcs in 270 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 14 ms.
Working with output stream class java.io.PrintStream
FORMULA DLCround-PT-07b-ReachabilityCardinality-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 412 ms. (steps per millisecond=24 ) properties (out of 15) seen :5
FORMULA DLCround-PT-07b-ReachabilityCardinality-15 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-07b-ReachabilityCardinality-12 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-07b-ReachabilityCardinality-07 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-07b-ReachabilityCardinality-04 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-07b-ReachabilityCardinality-03 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 59 ms. (steps per millisecond=169 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 10) seen :0
Running SMT prover for 10 properties.
// Phase 1: matrix 4071 rows 2703 cols
[2023-03-10 01:38:15] [INFO ] Computed 132 place invariants in 49 ms
[2023-03-10 01:38:16] [INFO ] After 997ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:10
[2023-03-10 01:38:17] [INFO ] [Nat]Absence check using 132 positive place invariants in 106 ms returned sat
[2023-03-10 01:38:20] [INFO ] After 2580ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :10
[2023-03-10 01:38:21] [INFO ] Deduced a trap composed of 107 places in 525 ms of which 5 ms to minimize.
[2023-03-10 01:38:22] [INFO ] Deduced a trap composed of 219 places in 629 ms of which 1 ms to minimize.
[2023-03-10 01:38:22] [INFO ] Deduced a trap composed of 151 places in 410 ms of which 2 ms to minimize.
[2023-03-10 01:38:23] [INFO ] Deduced a trap composed of 158 places in 397 ms of which 1 ms to minimize.
[2023-03-10 01:38:23] [INFO ] Deduced a trap composed of 173 places in 382 ms of which 2 ms to minimize.
[2023-03-10 01:38:24] [INFO ] Deduced a trap composed of 144 places in 361 ms of which 1 ms to minimize.
[2023-03-10 01:38:24] [INFO ] Deduced a trap composed of 222 places in 337 ms of which 0 ms to minimize.
[2023-03-10 01:38:24] [INFO ] Trap strengthening (SAT) tested/added 8/7 trap constraints in 3940 ms
[2023-03-10 01:38:25] [INFO ] Deduced a trap composed of 183 places in 338 ms of which 1 ms to minimize.
[2023-03-10 01:38:26] [INFO ] Deduced a trap composed of 168 places in 334 ms of which 1 ms to minimize.
[2023-03-10 01:38:26] [INFO ] Trap strengthening (SAT) tested/added 3/2 trap constraints in 1036 ms
[2023-03-10 01:38:27] [INFO ] After 9529ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :10
Attempting to minimize the solution found.
Minimization took 1202 ms.
[2023-03-10 01:38:28] [INFO ] After 11948ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :10
FORMULA DLCround-PT-07b-ReachabilityCardinality-06 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA DLCround-PT-07b-ReachabilityCardinality-08 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA DLCround-PT-07b-ReachabilityCardinality-09 FALSE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA DLCround-PT-07b-ReachabilityCardinality-11 FALSE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA DLCround-PT-07b-ReachabilityCardinality-13 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Parikh walk visited 5 properties in 438 ms.
Support contains 77 out of 2703 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 2703/2703 places, 4071/4071 transitions.
Graph (trivial) has 2391 edges and 2703 vertex of which 335 / 2703 are part of one of the 32 SCC in 11 ms
Free SCC test removed 303 places
Drop transitions removed 343 transitions
Reduce isomorphic transitions removed 343 transitions.
Drop transitions removed 1008 transitions
Trivial Post-agglo rules discarded 1008 transitions
Performed 1008 trivial Post agglomeration. Transition count delta: 1008
Iterating post reduction 0 with 1008 rules applied. Total rules applied 1009 place count 2400 transition count 2720
Reduce places removed 1008 places and 0 transitions.
Ensure Unique test removed 30 transitions
Reduce isomorphic transitions removed 30 transitions.
Drop transitions removed 25 transitions
Trivial Post-agglo rules discarded 25 transitions
Performed 25 trivial Post agglomeration. Transition count delta: 25
Iterating post reduction 1 with 1063 rules applied. Total rules applied 2072 place count 1392 transition count 2665
Reduce places removed 25 places and 0 transitions.
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 2 with 31 rules applied. Total rules applied 2103 place count 1367 transition count 2659
Reduce places removed 3 places and 0 transitions.
Performed 45 Post agglomeration using F-continuation condition.Transition count delta: 45
Iterating post reduction 3 with 48 rules applied. Total rules applied 2151 place count 1364 transition count 2614
Reduce places removed 45 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 4 with 46 rules applied. Total rules applied 2197 place count 1319 transition count 2613
Performed 29 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 29 Pre rules applied. Total rules applied 2197 place count 1319 transition count 2584
Deduced a syphon composed of 29 places in 19 ms
Reduce places removed 29 places and 0 transitions.
Iterating global reduction 5 with 58 rules applied. Total rules applied 2255 place count 1290 transition count 2584
Discarding 302 places :
Symmetric choice reduction at 5 with 302 rule applications. Total rules 2557 place count 988 transition count 2282
Iterating global reduction 5 with 302 rules applied. Total rules applied 2859 place count 988 transition count 2282
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 5 with 4 rules applied. Total rules applied 2863 place count 988 transition count 2278
Performed 118 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 6 with 118 Pre rules applied. Total rules applied 2863 place count 988 transition count 2160
Deduced a syphon composed of 118 places in 20 ms
Reduce places removed 118 places and 0 transitions.
Iterating global reduction 6 with 236 rules applied. Total rules applied 3099 place count 870 transition count 2160
Discarding 39 places :
Symmetric choice reduction at 6 with 39 rule applications. Total rules 3138 place count 831 transition count 1754
Iterating global reduction 6 with 39 rules applied. Total rules applied 3177 place count 831 transition count 1754
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 6 with 8 rules applied. Total rules applied 3185 place count 831 transition count 1746
Performed 212 Post agglomeration using F-continuation condition with reduction of 6 identical transitions.
Deduced a syphon composed of 212 places in 1 ms
Reduce places removed 212 places and 0 transitions.
Iterating global reduction 7 with 424 rules applied. Total rules applied 3609 place count 619 transition count 1528
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 7 with 2 rules applied. Total rules applied 3611 place count 619 transition count 1526
Discarding 7 places :
Symmetric choice reduction at 8 with 7 rule applications. Total rules 3618 place count 612 transition count 1449
Iterating global reduction 8 with 7 rules applied. Total rules applied 3625 place count 612 transition count 1449
Performed 77 Post agglomeration using F-continuation condition.Transition count delta: -657
Deduced a syphon composed of 77 places in 2 ms
Reduce places removed 77 places and 0 transitions.
Iterating global reduction 8 with 154 rules applied. Total rules applied 3779 place count 535 transition count 2106
Drop transitions removed 106 transitions
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 114 transitions.
Iterating post reduction 8 with 114 rules applied. Total rules applied 3893 place count 535 transition count 1992
Discarding 16 places :
Symmetric choice reduction at 9 with 16 rule applications. Total rules 3909 place count 519 transition count 1632
Iterating global reduction 9 with 16 rules applied. Total rules applied 3925 place count 519 transition count 1632
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 9 with 8 rules applied. Total rules applied 3933 place count 519 transition count 1624
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: -67
Deduced a syphon composed of 6 places in 1 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 10 with 12 rules applied. Total rules applied 3945 place count 513 transition count 1691
Drop transitions removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 10 with 6 rules applied. Total rules applied 3951 place count 513 transition count 1685
Drop transitions removed 134 transitions
Redundant transition composition rules discarded 134 transitions
Iterating global reduction 11 with 134 rules applied. Total rules applied 4085 place count 513 transition count 1551
Discarding 6 places :
Symmetric choice reduction at 11 with 6 rule applications. Total rules 4091 place count 507 transition count 1467
Iterating global reduction 11 with 6 rules applied. Total rules applied 4097 place count 507 transition count 1467
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 11 with 7 rules applied. Total rules applied 4104 place count 507 transition count 1460
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -25
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 12 with 4 rules applied. Total rules applied 4108 place count 505 transition count 1485
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 12 with 1 rules applied. Total rules applied 4109 place count 505 transition count 1484
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 13 with 2 rules applied. Total rules applied 4111 place count 505 transition count 1482
Free-agglomeration rule applied 175 times with reduction of 49 identical transitions.
Iterating global reduction 13 with 175 rules applied. Total rules applied 4286 place count 505 transition count 1258
Reduce places removed 175 places and 0 transitions.
Drop transitions removed 189 transitions
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 201 transitions.
Graph (complete) has 1141 edges and 330 vertex of which 329 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.2 ms
Discarding 1 places :
Also discarding 0 output transitions
Iterating post reduction 13 with 377 rules applied. Total rules applied 4663 place count 329 transition count 1057
Discarding 4 places :
Symmetric choice reduction at 14 with 4 rule applications. Total rules 4667 place count 325 transition count 1045
Iterating global reduction 14 with 4 rules applied. Total rules applied 4671 place count 325 transition count 1045
Drop transitions removed 76 transitions
Redundant transition composition rules discarded 76 transitions
Iterating global reduction 14 with 76 rules applied. Total rules applied 4747 place count 325 transition count 969
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 14 with 2 rules applied. Total rules applied 4749 place count 323 transition count 969
Discarding 6 places :
Symmetric choice reduction at 15 with 6 rule applications. Total rules 4755 place count 317 transition count 953
Iterating global reduction 15 with 6 rules applied. Total rules applied 4761 place count 317 transition count 953
Free-agglomeration rule applied 1 times.
Iterating global reduction 15 with 1 rules applied. Total rules applied 4762 place count 317 transition count 952
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 15 with 1 rules applied. Total rules applied 4763 place count 316 transition count 952
Free-agglomeration rule (complex) applied 1 times.
Iterating global reduction 16 with 1 rules applied. Total rules applied 4764 place count 316 transition count 967
Reduce places removed 1 places and 0 transitions.
Drop transitions removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 16 with 10 rules applied. Total rules applied 4774 place count 315 transition count 958
Drop transitions removed 6 transitions
Redundant transition composition rules discarded 6 transitions
Iterating global reduction 17 with 6 rules applied. Total rules applied 4780 place count 315 transition count 952
Partial Free-agglomeration rule applied 5 times.
Drop transitions removed 5 transitions
Iterating global reduction 17 with 5 rules applied. Total rules applied 4785 place count 315 transition count 952
Applied a total of 4785 rules in 809 ms. Remains 315 /2703 variables (removed 2388) and now considering 952/4071 (removed 3119) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 810 ms. Remains : 315/2703 places, 952/4071 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 94 ms. (steps per millisecond=106 ) properties (out of 5) seen :4
FORMULA DLCround-PT-07b-ReachabilityCardinality-10 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-07b-ReachabilityCardinality-02 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-07b-ReachabilityCardinality-01 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-07b-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Finished Best-First random walk after 9928 steps, including 2 resets, run visited all 1 properties in 35 ms. (steps per millisecond=283 )
FORMULA DLCround-PT-07b-ReachabilityCardinality-05 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
All properties solved without resorting to model-checking.
Total runtime 15746 ms.
======================================================
========== this is Smart for the MCC'2018 ============
======================================================
Running DLCround (PT), instance 07b
Examination ReachabilityCardinality
Parser /home/mcc/BenchKit/bin//../reducer/bin//../../smart/bin//parser/Cardinality.jar
Model checker /home/mcc/BenchKit/bin//../reducer/bin//../../smart/bin//rem_exec//smart

GOT IT HERE. BS
Petri model created: 2703 places, 4071 transitions, 11073 arcs.
Final Score: 883522.615
Took : 24 seconds
Reachability Cardinality file is: ReachabilityCardinality.xml
READY TO PARSE. BS
PROPERTY: DLCround-PT-07b-ReachabilityCardinality-00 (reachable & potential((! ( ( ( (! ( ( 1 ) <= (tk(P830)) )) & ( (! ( ( 1 ) <= (tk(P1493)) )) | ( ( 1 ) <= (tk(P261)) ) ) ) | ( (tk(P201)) <= ( 0 ) ) ) | ( ( ( (tk(P1635)) <= ( 0 ) ) | ( ( ( ( ( ( 1 ) <= (tk(P1063)) ) | ( ( 1 ) <= (tk(P350)) ) ) | ( ( (tk(P2222)) <= ( 1 ) ) & ( (tk(P394)) <= (tk(P2385)) ) ) ) & ( (tk(P2633)) <= (tk(P1960)) ) ) & ( ( ( (tk(P1115)) <= (tk(P1215)) ) | ( ( 1 ) <= (tk(P1234)) ) ) & ( ( ( (tk(P1809)) <= (tk(P2429)) ) | ( (tk(P1739)) <= ( 0 ) ) ) | (! ( ( 1 ) <= (tk(P270)) )) ) ) ) ) & (! ( ( (tk(P1476)) <= (tk(P1642)) ) & ( ( ( 1 ) <= (tk(P2109)) ) & ( (tk(P2408)) <= (tk(P644)) ) ) )) ) ))))
PROPERTY: DLCround-PT-07b-ReachabilityCardinality-01 (reachable &!potential( ( ( (tk(P2320)) <= ( 0 ) ) | ( (tk(P848)) <= (tk(P2380)) ) )))
PROPERTY: DLCround-PT-07b-ReachabilityCardinality-02 (reachable &!potential( (! ( ( (! ( ( ( ( ( (tk(P799)) <= (tk(P757)) ) & ( (tk(P1224)) <= (tk(P1650)) ) ) & ( (tk(P2164)) <= ( 1 ) ) ) | (! ( (tk(P611)) <= ( 1 ) )) ) | ( ( ( ( ( 1 ) <= (tk(P1470)) ) | ( (tk(P1257)) <= ( 1 ) ) ) | ( ( (tk(P565)) <= (tk(P932)) ) | ( ( 1 ) <= (tk(P102)) ) ) ) & ( ( 1 ) <= (tk(P2633)) ) ) )) & ( ( (! ( ( ( ( (tk(P52)) <= (tk(P1579)) ) & ( ( 1 ) <= (tk(P281)) ) ) & (! ( ( 1 ) <= (tk(P552)) )) ) | ( ( (tk(P348)) <= ( 1 ) ) & ( (tk(P1442)) <= (tk(P756)) ) ) )) | ( (tk(P1573)) <= ( 1 ) ) ) & ( ( ( (! ( ( ( 1 ) <= (tk(P637)) ) & ( ( 1 ) <= (tk(P360)) ) )) & (! ( ( 1 ) <= (tk(P2441)) )) ) | ( (! ( (tk(P2093)) <= ( 1 ) )) | (! ( ( (tk(P2371)) <= ( 1 ) ) & ( (tk(P1210)) <= ( 1 ) ) )) ) ) | ( ( ( ( (tk(P1487)) <= ( 0 ) ) | ( (tk(P1181)) <= ( 0 ) ) ) | ( (tk(P1363)) <= ( 0 ) ) ) & ( ( 1 ) <= (tk(P1864)) ) ) ) ) ) & ( (! ( (! ( ( ( ( 1 ) <= (tk(P87)) ) & ( ( 1 ) <= (tk(P2344)) ) ) | ( ( 1 ) <= (tk(P1914)) ) )) | ( ( 1 ) <= (tk(P2238)) ) )) & (! ( ( (tk(P1944)) <= (tk(P940)) ) & ( ( ( (tk(P2027)) <= (tk(P86)) ) | (! ( ( (tk(P1990)) <= ( 0 ) ) & ( (tk(P1701)) <= ( 0 ) ) )) ) & ( (tk(P1597)) <= (tk(P753)) ) ) )) ) ))))
PROPERTY: DLCround-PT-07b-ReachabilityCardinality-03 (reachable &!potential( (! ( ( 1 ) <= (tk(P2011)) ))))
PROPERTY: DLCround-PT-07b-ReachabilityCardinality-04 (reachable &!potential( ( ( (tk(P534)) <= ( 0 ) ) & ( (tk(P407)) <= ( 1 ) ) )))
PROPERTY: DLCround-PT-07b-ReachabilityCardinality-05 (reachable &!potential( (! ( ( ( (tk(P367)) <= (tk(P2364)) ) | ( ( ( (! ( ( (tk(P752)) <= ( 1 ) ) & ( (tk(P1965)) <= (tk(P614)) ) )) & ( ( ( ( 1 ) <= (tk(P370)) ) | ( (tk(P1617)) <= ( 0 ) ) ) & ( (tk(P1411)) <= (tk(P938)) ) ) ) | ( (! ( ( (tk(P485)) <= ( 1 ) ) | ( (tk(P2574)) <= (tk(P1521)) ) )) | ( (! ( (tk(P2086)) <= (tk(P1107)) )) | ( ( 1 ) <= (tk(P1148)) ) ) ) ) | (! ( ( 1 ) <= (tk(P185)) )) ) ) & ( (! ( (! ( (tk(P156)) <= (tk(P1876)) )) & ( (tk(P1944)) <= ( 0 ) ) )) & (! ( ( ( ( ( (tk(P2566)) <= (tk(P2258)) ) & ( ( 1 ) <= (tk(P639)) ) ) | ( ( (tk(P2095)) <= ( 1 ) ) | ( (tk(P1790)) <= ( 1 ) ) ) ) & ( ( ( (tk(P2048)) <= (tk(P1824)) ) | ( (tk(P2526)) <= ( 0 ) ) ) | ( ( (tk(P1131)) <= (tk(P1746)) ) & ( (tk(P1560)) <= ( 0 ) ) ) ) ) | ( ( (! ( ( 1 ) <= (tk(P896)) )) & ( ( (tk(P421)) <= (tk(P2434)) ) & ( (tk(P680)) <= (tk(P572)) ) ) ) & ( (tk(P1307)) <= (tk(P1638)) ) ) )) ) ))))
PROPERTY: DLCround-PT-07b-ReachabilityCardinality-06 (reachable & potential(( (! ( (tk(P2226)) <= (tk(P288)) )) & (! ( ( 1 ) <= (tk(P1160)) )) )))
PROPERTY: DLCround-PT-07b-ReachabilityCardinality-07 (reachable &!potential( ( ( ( 1 ) <= (tk(P2481)) ) | ( (tk(P1403)) <= (tk(P2284)) ) )))
PROPERTY: DLCround-PT-07b-ReachabilityCardinality-08 (reachable & potential((! ( ( (tk(P1506)) <= ( 0 ) ) | ( (tk(P1294)) <= ( 0 ) ) ))))
PROPERTY: DLCround-PT-07b-ReachabilityCardinality-09 (reachable &!potential( ( ( (! ( (tk(P1101)) <= ( 0 ) )) | ( (! ( ( ( ( 1 ) <= (tk(P1741)) ) | ( ( ( ( (tk(P1253)) <= (tk(P448)) ) | ( (tk(P1115)) <= (tk(P2461)) ) ) | ( ( 1 ) <= (tk(P2683)) ) ) | ( (tk(P1153)) <= ( 1 ) ) ) ) & ( (! ( ( ( ( 1 ) <= (tk(P380)) ) | ( (tk(P2364)) <= (tk(P1485)) ) ) & ( ( (tk(P166)) <= (tk(P2423)) ) | ( (tk(P1096)) <= (tk(P2023)) ) ) )) & (! ( (tk(P1537)) <= (tk(P2359)) )) ) )) | ( (tk(P1035)) <= ( 0 ) ) ) ) | (! ( (tk(P2091)) <= ( 0 ) )) )))
PROPERTY: DLCround-PT-07b-ReachabilityCardinality-10 (reachable & potential(( ( 1 ) <= (tk(P126)) )))
PROPERTY: DLCround-PT-07b-ReachabilityCardinality-11 (reachable &!potential( ( ( ( ( (! ( (tk(P931)) <= (tk(P1326)) )) | ( (! ( ( (! ( (tk(P525)) <= (tk(P378)) )) & ( ( (tk(P1814)) <= (tk(P1308)) ) & ( (tk(P1170)) <= ( 0 ) ) ) ) & ( ( 1 ) <= (tk(P2380)) ) )) & (! ( (tk(P2537)) <= ( 1 ) )) ) ) | ( ( ( ( (tk(P885)) <= (tk(P1548)) ) | (! ( (! ( (tk(P2684)) <= (tk(P1320)) )) & ( ( ( 1 ) <= (tk(P786)) ) & ( (tk(P1307)) <= ( 1 ) ) ) )) ) | (! ( ( ( ( (tk(P1647)) <= ( 1 ) ) & ( ( 1 ) <= (tk(P1089)) ) ) | (! ( (tk(P1747)) <= ( 1 ) )) ) & ( ( ( (tk(P59)) <= (tk(P928)) ) | ( (tk(P2242)) <= (tk(P504)) ) ) | ( ( 1 ) <= (tk(P1272)) ) ) )) ) & ( ( ( (! ( ( 1 ) <= (tk(P831)) )) & ( (tk(P1645)) <= ( 0 ) ) ) | ( ( (! ( ( 1 ) <= (tk(P1399)) )) & ( ( 1 ) <= (tk(P776)) ) ) & ( (tk(P77)) <= (tk(P2072)) ) ) ) | (! ( (tk(P1484)) <= (tk(P1103)) )) ) ) ) | ( ( 1 ) <= (tk(P401)) ) ) | ( (tk(P1674)) <= ( 0 ) ) )))
PROPERTY: DLCround-PT-07b-ReachabilityCardinality-12 (reachable & potential((! ( ( ( (tk(P483)) <= ( 0 ) ) & ( ( ( ( (! ( ( 1 ) <= (tk(P2242)) )) & (! ( ( (tk(P769)) <= ( 1 ) ) | ( (tk(P135)) <= (tk(P2152)) ) )) ) | ( (! ( (tk(P937)) <= (tk(P1893)) )) & ( ( ( ( 1 ) <= (tk(P2001)) ) | ( ( 1 ) <= (tk(P634)) ) ) & ( (tk(P1485)) <= (tk(P1329)) ) ) ) ) & ( (! ( (tk(P1376)) <= ( 1 ) )) & ( ( ( ( ( 1 ) <= (tk(P1593)) ) & ( ( 1 ) <= (tk(P2400)) ) ) | ( ( (tk(P2111)) <= ( 1 ) ) & ( (tk(P45)) <= (tk(P1862)) ) ) ) & ( ( ( 1 ) <= (tk(P1561)) ) & ( (tk(P658)) <= (tk(P2186)) ) ) ) ) ) | ( (tk(P1832)) <= ( 1 ) ) ) ) | ( ( ( (tk(P1177)) <= (tk(P677)) ) & ( ( 1 ) <= (tk(P2177)) ) ) & (! ( (! ( ( ( ( (tk(P227)) <= ( 0 ) ) | ( (tk(P2130)) <= (tk(P416)) ) ) & (! ( (tk(P1543)) <= ( 0 ) )) ) & ( (tk(P2578)) <= (tk(P2256)) ) )) & ( (tk(P259)) <= (tk(P1799)) ) )) ) ))))
PROPERTY: DLCround-PT-07b-ReachabilityCardinality-13 (reachable & potential(( ( ( 1 ) <= (tk(P246)) ) & (! ( (! ( ( ( 1 ) <= (tk(P1375)) ) | ( ( 1 ) <= (tk(P2180)) ) )) & (! ( ( 1 ) <= (tk(P2606)) )) )) )))
PROPERTY: DLCround-PT-07b-ReachabilityCardinality-14 (reachable &!potential( ( (! ( ( (! ( (tk(P893)) <= ( 1 ) )) | ( (! ( (tk(P392)) <= ( 1 ) )) & ( (! ( (tk(P1209)) <= (tk(P178)) )) | (! ( ( ( ( 1 ) <= (tk(P1575)) ) & ( (tk(P75)) <= (tk(P747)) ) ) & ( ( ( 1 ) <= (tk(P2138)) ) | ( (tk(P1887)) <= (tk(P2493)) ) ) )) ) ) ) & ( (! ( (! ( (tk(P2479)) <= (tk(P1298)) )) & ( ( (! ( (tk(P2296)) <= ( 0 ) )) & ( (tk(P2305)) <= ( 1 ) ) ) | ( ( ( (tk(P2459)) <= ( 1 ) ) | ( ( 1 ) <= (tk(P1792)) ) ) & ( ( (tk(P1815)) <= (tk(P360)) ) & ( ( 1 ) <= (tk(P2101)) ) ) ) ) )) & ( (! ( (! ( ( 1 ) <= (tk(P1713)) )) & (! ( ( (tk(P505)) <= (tk(P995)) ) & ( (tk(P205)) <= ( 0 ) ) )) )) | ( ( (tk(P537)) <= (tk(P1645)) ) & ( (tk(P2676)) <= ( 1 ) ) ) ) ) )) | ( (! ( ( ( ( ( (tk(P2106)) <= (tk(P2146)) ) & ( (tk(P993)) <= ( 1 ) ) ) & ( ( 1 ) <= (tk(P849)) ) ) & ( (tk(P766)) <= ( 0 ) ) ) & ( ( ( 1 ) <= (tk(P2685)) ) | ( ( (tk(P2400)) <= ( 1 ) ) | (! ( ( 1 ) <= (tk(P395)) )) ) ) )) & ( (tk(P1136)) <= (tk(P598)) ) ) )))
PROPERTY: DLCround-PT-07b-ReachabilityCardinality-15 (reachable &!potential( ( ( ( (tk(P2618)) <= (tk(P2303)) ) | ( ( ( 1 ) <= (tk(P314)) ) & ( (tk(P1407)) <= (tk(P624)) ) ) ) | ( ( 1 ) <= (tk(P194)) ) )))
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 14545304 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16104188 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
Caught signal 15, terminating.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-07b"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="smartxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool smartxred"
echo " Input is DLCround-PT-07b, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r107-tall-167814484500694"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-07b.tgz
mv DLCround-PT-07b execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;