About the Execution of Smart+red for DLCround-PT-06a
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
3533.703 | 626971.00 | 641026.00 | 2099.50 | FTTTTTTTTFFTTTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r107-tall-167814484500670.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool smartxred
Input is DLCround-PT-06a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r107-tall-167814484500670
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 796K
-rw-r--r-- 1 mcc users 6.8K Feb 25 18:46 CTLCardinality.txt
-rw-r--r-- 1 mcc users 72K Feb 25 18:46 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Feb 25 18:37 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 25 18:37 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 15:52 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 19:03 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 127K Feb 25 19:03 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.5K Feb 25 18:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 73K Feb 25 18:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:52 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:52 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 325K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-00
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-01
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-02
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-03
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-04
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-05
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-06
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-07
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-08
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-09
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-10
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-11
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-12
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-13
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-14
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1678408793093
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=smartxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-06a
Applying reductions before tool smart
Invoking reducer
Running Version 202303021504
[2023-03-10 00:39:54] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-10 00:39:54] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 00:39:54] [INFO ] Load time of PNML (sax parser for PT used): 102 ms
[2023-03-10 00:39:54] [INFO ] Transformed 197 places.
[2023-03-10 00:39:54] [INFO ] Transformed 1313 transitions.
[2023-03-10 00:39:54] [INFO ] Found NUPN structural information;
[2023-03-10 00:39:54] [INFO ] Parsed PT model containing 197 places and 1313 transitions and 5002 arcs in 169 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 14 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 2 formulas.
Ensure Unique test removed 135 transitions
Reduce redundant transitions removed 135 transitions.
FORMULA DLCround-PT-06a-ReachabilityCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-06a-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-06a-ReachabilityCardinality-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-06a-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-06a-ReachabilityCardinality-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-06a-ReachabilityCardinality-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-06a-ReachabilityCardinality-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 531 ms. (steps per millisecond=18 ) properties (out of 9) seen :2
FORMULA DLCround-PT-06a-ReachabilityCardinality-10 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-06a-ReachabilityCardinality-08 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 80 ms. (steps per millisecond=125 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
[2023-03-10 00:39:55] [INFO ] Flow matrix only has 154 transitions (discarded 1024 similar events)
// Phase 1: matrix 154 rows 197 cols
[2023-03-10 00:39:55] [INFO ] Computed 109 place invariants in 16 ms
[2023-03-10 00:39:55] [INFO ] [Real]Absence check using 109 positive place invariants in 18 ms returned sat
[2023-03-10 00:39:55] [INFO ] After 235ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:6
[2023-03-10 00:39:56] [INFO ] [Nat]Absence check using 109 positive place invariants in 26 ms returned sat
[2023-03-10 00:39:56] [INFO ] After 113ms SMT Verify possible using all constraints in natural domain returned unsat :7 sat :0
FORMULA DLCround-PT-06a-ReachabilityCardinality-14 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-06a-ReachabilityCardinality-12 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-06a-ReachabilityCardinality-11 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-06a-ReachabilityCardinality-05 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-06a-ReachabilityCardinality-02 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-06a-ReachabilityCardinality-01 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-06a-ReachabilityCardinality-00 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 7 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 1516 ms.
======================================================
========== this is Smart for the MCC'2018 ============
======================================================
Running DLCround (PT), instance 06a
Examination ReachabilityCardinality
Parser /home/mcc/BenchKit/bin//../reducer/bin//../../smart/bin//parser/Cardinality.jar
Model checker /home/mcc/BenchKit/bin//../reducer/bin//../../smart/bin//rem_exec//smart
GOT IT HERE. BS
Petri model created: 197 places, 1313 transitions, 5002 arcs.
Final Score: 6106.549
Took : 50 seconds
Reachability Cardinality file is: ReachabilityCardinality.xml
READY TO PARSE. BS
PROPERTY: DLCround-PT-06a-ReachabilityCardinality-00 (reachable & potential((! ( (tk(P169)) <= (tk(P120)) ))))
PROPERTY: DLCround-PT-06a-ReachabilityCardinality-01 (reachable &!potential( ( ( (! ( ( ( (tk(P135)) <= (tk(P57)) ) | (! ( ( ( ( ( 1 ) <= (tk(P97)) ) | ( (tk(P68)) <= (tk(P24)) ) ) | ( ( (tk(P129)) <= ( 0 ) ) | ( (tk(P4)) <= (tk(P79)) ) ) ) & ( ( ( (tk(P59)) <= (tk(P140)) ) | ( ( 1 ) <= (tk(P121)) ) ) & ( ( (tk(P93)) <= ( 1 ) ) & ( ( 1 ) <= (tk(P36)) ) ) ) )) ) | ( ( ( ( (! ( (tk(P159)) <= ( 0 ) )) & ( ( (tk(P45)) <= (tk(P120)) ) & ( ( 1 ) <= (tk(P137)) ) ) ) & ( (! ( (tk(P81)) <= (tk(P88)) )) & (! ( (tk(P87)) <= (tk(P157)) )) ) ) | (! ( (tk(P191)) <= ( 1 ) )) ) & ( (tk(P147)) <= (tk(P187)) ) ) )) | ( ( ( ( ( ( 1 ) <= (tk(P92)) ) & ( (tk(P65)) <= ( 0 ) ) ) & ( (tk(P42)) <= ( 1 ) ) ) | (! ( ( (tk(P85)) <= ( 1 ) ) | ( ( (! ( ( 1 ) <= (tk(P142)) )) & ( ( (tk(P114)) <= ( 0 ) ) | ( ( 1 ) <= (tk(P41)) ) ) ) | ( (! ( ( 1 ) <= (tk(P82)) )) & (! ( (tk(P140)) <= (tk(P48)) )) ) ) )) ) | ( ( (tk(P117)) <= (tk(P74)) ) | ( (! ( ( 1 ) <= (tk(P80)) )) & ( (! ( (! ( ( 1 ) <= (tk(P5)) )) & ( ( ( 1 ) <= (tk(P79)) ) | ( (tk(P15)) <= (tk(P187)) ) ) )) & ( (! ( (tk(P165)) <= (tk(P62)) )) & ( (! ( ( 1 ) <= (tk(P53)) )) & ( ( (tk(P196)) <= ( 0 ) ) & ( (tk(P96)) <= ( 0 ) ) ) ) ) ) ) ) ) ) | ( ( ( 1 ) <= (tk(P165)) ) | ( ( 1 ) <= (tk(P116)) ) ) )))
PROPERTY: DLCround-PT-06a-ReachabilityCardinality-02 (reachable &!potential( (! ( ( ( (tk(P163)) <= ( 0 ) ) & ( ( (! ( (tk(P39)) <= ( 0 ) )) & ( (! ( ( 1 ) <= (tk(P147)) )) & ( ( (tk(P35)) <= (tk(P72)) ) & ( (tk(P182)) <= ( 0 ) ) ) ) ) & ( ( ( 1 ) <= (tk(P153)) ) | (! ( ( (tk(P97)) <= ( 0 ) ) | ( ( 1 ) <= (tk(P112)) ) )) ) ) ) & ( ( 1 ) <= (tk(P115)) ) ))))
PROPERTY: DLCround-PT-06a-ReachabilityCardinality-03 (reachable &!potential( ( ( (tk(P189)) <= ( 0 ) ) | ( ( ( ( 1 ) <= (tk(P52)) ) | ( ( ( (tk(P54)) <= ( 1 ) ) | ( ( ( ( ( (tk(P35)) <= (tk(P87)) ) | ( (tk(P90)) <= ( 0 ) ) ) | ( ( (tk(P25)) <= ( 1 ) ) | ( (tk(P61)) <= ( 0 ) ) ) ) & ( (tk(P160)) <= ( 0 ) ) ) & (! ( (tk(P75)) <= (tk(P46)) )) ) ) | ( ( ( ( (tk(P17)) <= ( 1 ) ) & (! ( ( ( 1 ) <= (tk(P100)) ) | ( ( 1 ) <= (tk(P159)) ) )) ) | ( ( ( 1 ) <= (tk(P114)) ) & ( ( (tk(P29)) <= ( 1 ) ) | (! ( (tk(P136)) <= ( 1 ) )) ) ) ) | (! ( ( ( 1 ) <= (tk(P75)) ) | ( (tk(P71)) <= (tk(P156)) ) )) ) ) ) | ( (tk(P109)) <= ( 1 ) ) ) )))
PROPERTY: DLCround-PT-06a-ReachabilityCardinality-04 (reachable &!potential( ( ( (! ( (tk(P102)) <= ( 0 ) )) | (! ( ( ( (tk(P66)) <= ( 1 ) ) | ( ( (tk(P178)) <= (tk(P121)) ) & (! ( ( ( (tk(P183)) <= (tk(P142)) ) & ( (tk(P87)) <= ( 1 ) ) ) & (! ( ( 1 ) <= (tk(P44)) )) )) ) ) & ( (! ( ( ( ( (tk(P68)) <= ( 1 ) ) | ( ( 1 ) <= (tk(P56)) ) ) & (! ( (tk(P66)) <= ( 1 ) )) ) & (! ( ( 1 ) <= (tk(P185)) )) )) & (! ( (tk(P110)) <= ( 0 ) )) ) )) ) | (! ( ( (tk(P74)) <= ( 1 ) ) & ( ( ( ( (! ( (tk(P184)) <= (tk(P85)) )) & (! ( (tk(P95)) <= (tk(P183)) )) ) | ( ( 1 ) <= (tk(P183)) ) ) & ( (tk(P18)) <= ( 1 ) ) ) & (! ( ( ( (tk(P58)) <= ( 1 ) ) | ( ( (tk(P41)) <= (tk(P11)) ) | ( ( 1 ) <= (tk(P85)) ) ) ) | (! ( ( (tk(P3)) <= (tk(P91)) ) | ( (tk(P12)) <= (tk(P90)) ) )) )) ) )) )))
PROPERTY: DLCround-PT-06a-ReachabilityCardinality-05 (reachable &!potential( ( (tk(P35)) <= (tk(P155)) )))
PROPERTY: DLCround-PT-06a-ReachabilityCardinality-06 (reachable &!potential( ( ( (tk(P18)) <= ( 0 ) ) | ( ( ( ( (tk(P31)) <= (tk(P87)) ) | ( (tk(P85)) <= ( 1 ) ) ) | (! ( (tk(P194)) <= ( 0 ) )) ) | ( ( 1 ) <= (tk(P183)) ) ) )))
PROPERTY: DLCround-PT-06a-ReachabilityCardinality-07 (reachable &!potential( ( (tk(P33)) <= ( 1 ) )))
PROPERTY: DLCround-PT-06a-ReachabilityCardinality-08 (reachable & potential(( (! ( ( ( (! ( (tk(P140)) <= (tk(P81)) )) | (! ( ( 1 ) <= (tk(P186)) )) ) | ( ( 1 ) <= (tk(P85)) ) ) | ( ( ( (tk(P74)) <= (tk(P174)) ) & ( ( ( ( 1 ) <= (tk(P152)) ) | ( (tk(P124)) <= (tk(P19)) ) ) & (! ( ( 1 ) <= (tk(P2)) )) ) ) & (! ( ( 1 ) <= (tk(P119)) )) ) )) & ( ( 1 ) <= (tk(P76)) ) )))
PROPERTY: DLCround-PT-06a-ReachabilityCardinality-09 (reachable & potential(( ( ( ( (! ( ( ( (! ( ( 1 ) <= (tk(P20)) )) & ( ( (tk(P59)) <= ( 0 ) ) & ( (tk(P86)) <= ( 0 ) ) ) ) & ( (tk(P124)) <= ( 0 ) ) ) | ( ( 1 ) <= (tk(P128)) ) )) & ( ( (! ( (tk(P68)) <= ( 1 ) )) | ( ( ( ( (tk(P60)) <= (tk(P16)) ) | ( (tk(P144)) <= (tk(P194)) ) ) | ( ( ( 1 ) <= (tk(P87)) ) & ( ( 1 ) <= (tk(P178)) ) ) ) | ( ( ( (tk(P105)) <= ( 0 ) ) & ( ( 1 ) <= (tk(P78)) ) ) & ( (tk(P80)) <= ( 1 ) ) ) ) ) & ( ( ( (tk(P46)) <= (tk(P81)) ) & ( ( 1 ) <= (tk(P118)) ) ) | (! ( ( ( (tk(P23)) <= (tk(P21)) ) | ( ( 1 ) <= (tk(P173)) ) ) | (! ( ( 1 ) <= (tk(P161)) )) )) ) ) ) | (! ( (tk(P61)) <= ( 0 ) )) ) | (! ( ( (tk(P163)) <= (tk(P22)) ) & ( (! ( ( ( 1 ) <= (tk(P120)) ) | ( (tk(P98)) <= ( 1 ) ) )) | ( ( ( ( 1 ) <= (tk(P182)) ) & ( (tk(P30)) <= (tk(P193)) ) ) & (! ( (tk(P158)) <= (tk(P25)) )) ) ) )) ) & ( ( ( ( 1 ) <= (tk(P111)) ) & ( ( ( (tk(P76)) <= (tk(P84)) ) | ( ( 1 ) <= (tk(P139)) ) ) & ( (! ( (tk(P20)) <= ( 1 ) )) & ( ( ( ( ( 1 ) <= (tk(P55)) ) | ( ( ( 1 ) <= (tk(P26)) ) | ( (tk(P112)) <= (tk(P144)) ) ) ) & ( ( ( (tk(P118)) <= ( 0 ) ) | ( (tk(P61)) <= ( 0 ) ) ) & ( ( ( 1 ) <= (tk(P165)) ) & ( (tk(P176)) <= (tk(P15)) ) ) ) ) | ( ( 1 ) <= (tk(P8)) ) ) ) ) ) & (! ( ( (tk(P146)) <= (tk(P34)) ) | ( ( 1 ) <= (tk(P2)) ) )) ) )))
PROPERTY: DLCround-PT-06a-ReachabilityCardinality-10 (reachable &!potential( ( ( (! ( ( 1 ) <= (tk(P56)) )) | ( (! ( (tk(P97)) <= ( 0 ) )) & (! ( ( ( ( ( ( 1 ) <= (tk(P191)) ) & ( ( ( 1 ) <= (tk(P134)) ) | ( (tk(P76)) <= ( 1 ) ) ) ) & ( ( (tk(P58)) <= ( 1 ) ) | ( ( ( 1 ) <= (tk(P177)) ) | ( (tk(P170)) <= ( 1 ) ) ) ) ) & (! ( ( (tk(P79)) <= ( 0 ) ) | ( ( (tk(P40)) <= ( 0 ) ) | ( (tk(P196)) <= ( 0 ) ) ) )) ) | (! ( (tk(P140)) <= ( 1 ) )) )) ) ) | (! ( ( ( ( ( (tk(P108)) <= (tk(P42)) ) & ( ( 1 ) <= (tk(P63)) ) ) | ( ( ( (tk(P5)) <= ( 1 ) ) | ( ( 1 ) <= (tk(P132)) ) ) | ( ( ( (tk(P97)) <= ( 0 ) ) & (! ( (tk(P73)) <= (tk(P140)) )) ) & ( (tk(P126)) <= (tk(P62)) ) ) ) ) & ( (tk(P72)) <= (tk(P104)) ) ) | ( ( ( ( ( (tk(P155)) <= ( 0 ) ) | ( ( ( ( 1 ) <= (tk(P19)) ) & ( (tk(P154)) <= (tk(P4)) ) ) | ( ( ( 1 ) <= (tk(P9)) ) & ( (tk(P6)) <= ( 0 ) ) ) ) ) | ( (! ( ( 1 ) <= (tk(P66)) )) | ( ( ( (tk(P128)) <= (tk(P101)) ) & ( (tk(P100)) <= (tk(P42)) ) ) & (! ( (tk(P191)) <= ( 0 ) )) ) ) ) & ( (tk(P139)) <= ( 0 ) ) ) | (! ( ( ( ( 1 ) <= (tk(P45)) ) | ( ( (tk(P152)) <= (tk(P33)) ) | (! ( ( 1 ) <= (tk(P5)) )) ) ) & ( ( ( 1 ) <= (tk(P80)) ) | (! ( (tk(P124)) <= ( 0 ) )) ) )) ) )) )))
PROPERTY: DLCround-PT-06a-ReachabilityCardinality-11 (reachable &!potential( (! ( ( ( 1 ) <= (tk(P112)) ) & ( ( (! ( ( 1 ) <= (tk(P155)) )) & (! ( ( (! ( (tk(P150)) <= (tk(P51)) )) & ( ( ( (tk(P5)) <= ( 0 ) ) & ( (tk(P193)) <= ( 1 ) ) ) | (! ( (tk(P42)) <= ( 1 ) )) ) ) | ( (tk(P107)) <= (tk(P69)) ) )) ) & ( ( 1 ) <= (tk(P40)) ) ) ))))
PROPERTY: DLCround-PT-06a-ReachabilityCardinality-12 (reachable &!potential( ( (tk(P173)) <= (tk(P106)) )))
PROPERTY: DLCround-PT-06a-ReachabilityCardinality-13 (reachable & potential(( (tk(P33)) <= ( 1 ) )))
PROPERTY: DLCround-PT-06a-ReachabilityCardinality-14 (reachable & potential((! ( ( (! ( ( (! ( (tk(P195)) <= ( 1 ) )) | ( ( 1 ) <= (tk(P56)) ) ) | ( ( ( ( ( ( 1 ) <= (tk(P7)) ) | ( (tk(P43)) <= (tk(P4)) ) ) | ( ( 1 ) <= (tk(P95)) ) ) | ( ( ( (tk(P32)) <= ( 1 ) ) | ( (tk(P2)) <= (tk(P77)) ) ) | ( ( (tk(P142)) <= ( 0 ) ) & ( (tk(P150)) <= (tk(P123)) ) ) ) ) | ( ( 1 ) <= (tk(P142)) ) ) )) | (! ( ( ( 1 ) <= (tk(P34)) ) & (! ( (tk(P14)) <= (tk(P134)) )) )) ) | (! ( ( ( (! ( (tk(P42)) <= (tk(P96)) )) | (! ( ( (tk(P195)) <= ( 1 ) ) | ( ( 1 ) <= (tk(P41)) ) )) ) & ( ( (tk(P53)) <= ( 1 ) ) | ( ( ( (tk(P42)) <= ( 1 ) ) | ( (tk(P135)) <= (tk(P134)) ) ) & ( ( ( ( 1 ) <= (tk(P188)) ) & ( (tk(P132)) <= (tk(P135)) ) ) & ( ( ( 1 ) <= (tk(P50)) ) | ( ( 1 ) <= (tk(P126)) ) ) ) ) ) ) | ( ( (tk(P151)) <= ( 0 ) ) | ( ( ( (tk(P68)) <= ( 0 ) ) & ( (tk(P62)) <= ( 0 ) ) ) & ( (tk(P70)) <= (tk(P4)) ) ) ) )) ))))
PROPERTY: DLCround-PT-06a-ReachabilityCardinality-15 (reachable &!potential( ( ( ( ( (! ( ( ( 1 ) <= (tk(P187)) ) | (! ( (tk(P185)) <= ( 1 ) )) )) | (! ( (! ( ( 1 ) <= (tk(P6)) )) | ( ( (tk(P108)) <= ( 1 ) ) | ( ( 1 ) <= (tk(P76)) ) ) )) ) & ( ( ( (tk(P125)) <= (tk(P25)) ) & (! ( (tk(P113)) <= (tk(P87)) )) ) | (! ( ( (tk(P45)) <= ( 0 ) ) | ( ( (! ( (tk(P14)) <= (tk(P49)) )) | ( ( ( 1 ) <= (tk(P146)) ) & ( (tk(P170)) <= (tk(P84)) ) ) ) & ( ( ( ( 1 ) <= (tk(P168)) ) & ( (tk(P22)) <= ( 0 ) ) ) | (! ( ( 1 ) <= (tk(P58)) )) ) ) )) ) ) & ( ( 1 ) <= (tk(P47)) ) ) & ( ( ( (! ( ( ( ( ( 1 ) <= (tk(P19)) ) | ( (tk(P18)) <= ( 1 ) ) ) & ( ( ( 1 ) <= (tk(P82)) ) | ( (tk(P93)) <= (tk(P43)) ) ) ) | ( ( 1 ) <= (tk(P37)) ) )) | (! ( (! ( ( (tk(P114)) <= ( 1 ) ) | (! ( ( 1 ) <= (tk(P43)) )) )) & ( (tk(P155)) <= (tk(P68)) ) )) ) | (! ( (tk(P64)) <= ( 0 ) )) ) | ( (! ( (tk(P136)) <= ( 1 ) )) | ( ( ( ( ( ( ( (tk(P103)) <= (tk(P48)) ) | ( (tk(P58)) <= ( 1 ) ) ) & (! ( (tk(P24)) <= ( 1 ) )) ) | ( ( ( (tk(P63)) <= (tk(P98)) ) & ( (tk(P2)) <= ( 1 ) ) ) | ( ( 1 ) <= (tk(P11)) ) ) ) & ( ( (tk(P4)) <= ( 1 ) ) & ( (tk(P2)) <= ( 1 ) ) ) ) & (! ( ( ( ( ( 1 ) <= (tk(P186)) ) | ( ( 1 ) <= (tk(P119)) ) ) | ( ( (tk(P167)) <= ( 0 ) ) & ( ( 1 ) <= (tk(P193)) ) ) ) | (! ( (tk(P169)) <= ( 1 ) )) )) ) | ( ( (tk(P50)) <= ( 0 ) ) | ( ( ( ( (tk(P180)) <= ( 0 ) ) & (! ( (tk(P175)) <= (tk(P153)) )) ) | (! ( ( 1 ) <= (tk(P161)) )) ) & ( ( 1 ) <= (tk(P43)) ) ) ) ) ) ) )))
FORMULA DLCround-PT-06a-ReachabilityCardinality-00 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA DLCround-PT-06a-ReachabilityCardinality-01 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA DLCround-PT-06a-ReachabilityCardinality-02 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA DLCround-PT-06a-ReachabilityCardinality-03 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA DLCround-PT-06a-ReachabilityCardinality-04 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA DLCround-PT-06a-ReachabilityCardinality-05 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA DLCround-PT-06a-ReachabilityCardinality-06 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA DLCround-PT-06a-ReachabilityCardinality-07 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA DLCround-PT-06a-ReachabilityCardinality-08 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA DLCround-PT-06a-ReachabilityCardinality-09 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA DLCround-PT-06a-ReachabilityCardinality-10 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA DLCround-PT-06a-ReachabilityCardinality-11 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA DLCround-PT-06a-ReachabilityCardinality-12 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA DLCround-PT-06a-ReachabilityCardinality-13 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA DLCround-PT-06a-ReachabilityCardinality-14 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA DLCround-PT-06a-ReachabilityCardinality-15 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
BK_STOP 1678409420064
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-06a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="smartxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool smartxred"
echo " Input is DLCround-PT-06a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r107-tall-167814484500670"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-06a.tgz
mv DLCround-PT-06a execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;