Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478900914.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DNAwalker-PT-06track28RL, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478900914
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 556K
-rw-r--r-- 1 mcc users 6.3K Feb 25 13:02 CTLCardinality.txt
-rw-r--r-- 1 mcc users 68K Feb 25 13:02 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K Feb 25 13:01 CTLFireability.txt
-rw-r--r-- 1 mcc users 41K Feb 25 13:01 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:55 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 15:55 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 15:55 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:55 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 13:03 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 112K Feb 25 13:03 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 13:02 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 90K Feb 25 13:02 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:55 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:55 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 12 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 108K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DNAwalker-PT-06track28RL-CTLFireability-00
FORMULA_NAME DNAwalker-PT-06track28RL-CTLFireability-01
FORMULA_NAME DNAwalker-PT-06track28RL-CTLFireability-02
FORMULA_NAME DNAwalker-PT-06track28RL-CTLFireability-03
FORMULA_NAME DNAwalker-PT-06track28RL-CTLFireability-04
FORMULA_NAME DNAwalker-PT-06track28RL-CTLFireability-05
FORMULA_NAME DNAwalker-PT-06track28RL-CTLFireability-06
FORMULA_NAME DNAwalker-PT-06track28RL-CTLFireability-07
FORMULA_NAME DNAwalker-PT-06track28RL-CTLFireability-08
FORMULA_NAME DNAwalker-PT-06track28RL-CTLFireability-09
FORMULA_NAME DNAwalker-PT-06track28RL-CTLFireability-10
FORMULA_NAME DNAwalker-PT-06track28RL-CTLFireability-11
FORMULA_NAME DNAwalker-PT-06track28RL-CTLFireability-12
FORMULA_NAME DNAwalker-PT-06track28RL-CTLFireability-13
FORMULA_NAME DNAwalker-PT-06track28RL-CTLFireability-14
FORMULA_NAME DNAwalker-PT-06track28RL-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678288824888

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DNAwalker-PT-06track28RL
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 15:20:26] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-08 15:20:26] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 15:20:26] [INFO ] Load time of PNML (sax parser for PT used): 51 ms
[2023-03-08 15:20:26] [INFO ] Transformed 34 places.
[2023-03-08 15:20:26] [INFO ] Transformed 250 transitions.
[2023-03-08 15:20:26] [INFO ] Parsed PT model containing 34 places and 250 transitions and 728 arcs in 108 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 7 ms.
Support contains 31 out of 34 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 34/34 places, 250/250 transitions.
Applied a total of 0 rules in 12 ms. Remains 34 /34 variables (removed 0) and now considering 250/250 (removed 0) transitions.
[2023-03-08 15:20:26] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
// Phase 1: matrix 247 rows 34 cols
[2023-03-08 15:20:26] [INFO ] Computed 0 place invariants in 17 ms
[2023-03-08 15:20:26] [INFO ] Dead Transitions using invariants and state equation in 264 ms found 0 transitions.
[2023-03-08 15:20:26] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
[2023-03-08 15:20:26] [INFO ] Invariant cache hit.
[2023-03-08 15:20:26] [INFO ] Implicit Places using invariants in 21 ms returned []
[2023-03-08 15:20:26] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
[2023-03-08 15:20:26] [INFO ] Invariant cache hit.
[2023-03-08 15:20:26] [INFO ] State equation strengthened by 54 read => feed constraints.
[2023-03-08 15:20:26] [INFO ] Implicit Places using invariants and state equation in 142 ms returned []
Implicit Place search using SMT with State Equation took 169 ms to find 0 implicit places.
[2023-03-08 15:20:27] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
[2023-03-08 15:20:27] [INFO ] Invariant cache hit.
[2023-03-08 15:20:27] [INFO ] Dead Transitions using invariants and state equation in 102 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 571 ms. Remains : 34/34 places, 250/250 transitions.
Support contains 31 out of 34 places after structural reductions.
[2023-03-08 15:20:27] [INFO ] Flatten gal took : 40 ms
[2023-03-08 15:20:27] [INFO ] Flatten gal took : 15 ms
[2023-03-08 15:20:27] [INFO ] Input system was already deterministic with 250 transitions.
Incomplete random walk after 10000 steps, including 644 resets, run finished after 312 ms. (steps per millisecond=32 ) properties (out of 66) seen :63
Incomplete Best-First random walk after 10001 steps, including 63 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 63 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 59 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
[2023-03-08 15:20:27] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
[2023-03-08 15:20:27] [INFO ] Invariant cache hit.
[2023-03-08 15:20:27] [INFO ] After 143ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-08 15:20:33] [INFO ] After 5499ms SMT Verify possible using all constraints in natural domain returned unsat :3 sat :0
Fused 3 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 3 atomic propositions for a total of 16 simplifications.
[2023-03-08 15:20:33] [INFO ] Flatten gal took : 14 ms
[2023-03-08 15:20:33] [INFO ] Flatten gal took : 12 ms
[2023-03-08 15:20:33] [INFO ] Input system was already deterministic with 250 transitions.
Computed a total of 34 stabilizing places and 246 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 34/34 places, 250/250 transitions.
Applied a total of 0 rules in 3 ms. Remains 34 /34 variables (removed 0) and now considering 250/250 (removed 0) transitions.
[2023-03-08 15:20:33] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
[2023-03-08 15:20:33] [INFO ] Invariant cache hit.
[2023-03-08 15:20:33] [INFO ] Dead Transitions using invariants and state equation in 82 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 86 ms. Remains : 34/34 places, 250/250 transitions.
[2023-03-08 15:20:33] [INFO ] Flatten gal took : 10 ms
[2023-03-08 15:20:33] [INFO ] Flatten gal took : 10 ms
[2023-03-08 15:20:33] [INFO ] Input system was already deterministic with 250 transitions.
Starting structural reductions in LTL mode, iteration 0 : 34/34 places, 250/250 transitions.
Applied a total of 0 rules in 3 ms. Remains 34 /34 variables (removed 0) and now considering 250/250 (removed 0) transitions.
[2023-03-08 15:20:33] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
[2023-03-08 15:20:33] [INFO ] Invariant cache hit.
[2023-03-08 15:20:33] [INFO ] Dead Transitions using invariants and state equation in 73 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 77 ms. Remains : 34/34 places, 250/250 transitions.
[2023-03-08 15:20:33] [INFO ] Flatten gal took : 9 ms
[2023-03-08 15:20:33] [INFO ] Flatten gal took : 9 ms
[2023-03-08 15:20:33] [INFO ] Input system was already deterministic with 250 transitions.
Starting structural reductions in LTL mode, iteration 0 : 34/34 places, 250/250 transitions.
Applied a total of 0 rules in 3 ms. Remains 34 /34 variables (removed 0) and now considering 250/250 (removed 0) transitions.
[2023-03-08 15:20:33] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
[2023-03-08 15:20:33] [INFO ] Invariant cache hit.
[2023-03-08 15:20:33] [INFO ] Dead Transitions using invariants and state equation in 79 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 82 ms. Remains : 34/34 places, 250/250 transitions.
[2023-03-08 15:20:33] [INFO ] Flatten gal took : 9 ms
[2023-03-08 15:20:33] [INFO ] Flatten gal took : 9 ms
[2023-03-08 15:20:33] [INFO ] Input system was already deterministic with 250 transitions.
Starting structural reductions in LTL mode, iteration 0 : 34/34 places, 250/250 transitions.
Applied a total of 0 rules in 2 ms. Remains 34 /34 variables (removed 0) and now considering 250/250 (removed 0) transitions.
[2023-03-08 15:20:33] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
[2023-03-08 15:20:33] [INFO ] Invariant cache hit.
[2023-03-08 15:20:33] [INFO ] Dead Transitions using invariants and state equation in 83 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 86 ms. Remains : 34/34 places, 250/250 transitions.
[2023-03-08 15:20:34] [INFO ] Flatten gal took : 8 ms
[2023-03-08 15:20:34] [INFO ] Flatten gal took : 8 ms
[2023-03-08 15:20:34] [INFO ] Input system was already deterministic with 250 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 34/34 places, 250/250 transitions.
Applied a total of 0 rules in 11 ms. Remains 34 /34 variables (removed 0) and now considering 250/250 (removed 0) transitions.
[2023-03-08 15:20:34] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
[2023-03-08 15:20:34] [INFO ] Invariant cache hit.
[2023-03-08 15:20:34] [INFO ] Dead Transitions using invariants and state equation in 71 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 82 ms. Remains : 34/34 places, 250/250 transitions.
[2023-03-08 15:20:34] [INFO ] Flatten gal took : 8 ms
[2023-03-08 15:20:34] [INFO ] Flatten gal took : 8 ms
[2023-03-08 15:20:34] [INFO ] Input system was already deterministic with 250 transitions.
Starting structural reductions in LTL mode, iteration 0 : 34/34 places, 250/250 transitions.
Applied a total of 0 rules in 1 ms. Remains 34 /34 variables (removed 0) and now considering 250/250 (removed 0) transitions.
[2023-03-08 15:20:34] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
[2023-03-08 15:20:34] [INFO ] Invariant cache hit.
[2023-03-08 15:20:34] [INFO ] Dead Transitions using invariants and state equation in 73 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 76 ms. Remains : 34/34 places, 250/250 transitions.
[2023-03-08 15:20:34] [INFO ] Flatten gal took : 14 ms
[2023-03-08 15:20:34] [INFO ] Flatten gal took : 14 ms
[2023-03-08 15:20:34] [INFO ] Input system was already deterministic with 250 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 34/34 places, 250/250 transitions.
Applied a total of 0 rules in 5 ms. Remains 34 /34 variables (removed 0) and now considering 250/250 (removed 0) transitions.
[2023-03-08 15:20:34] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
[2023-03-08 15:20:34] [INFO ] Invariant cache hit.
[2023-03-08 15:20:34] [INFO ] Dead Transitions using invariants and state equation in 94 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 99 ms. Remains : 34/34 places, 250/250 transitions.
[2023-03-08 15:20:34] [INFO ] Flatten gal took : 6 ms
[2023-03-08 15:20:34] [INFO ] Flatten gal took : 6 ms
[2023-03-08 15:20:34] [INFO ] Input system was already deterministic with 250 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 34/34 places, 250/250 transitions.
Applied a total of 0 rules in 6 ms. Remains 34 /34 variables (removed 0) and now considering 250/250 (removed 0) transitions.
[2023-03-08 15:20:34] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
[2023-03-08 15:20:34] [INFO ] Invariant cache hit.
[2023-03-08 15:20:34] [INFO ] Dead Transitions using invariants and state equation in 98 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 104 ms. Remains : 34/34 places, 250/250 transitions.
[2023-03-08 15:20:34] [INFO ] Flatten gal took : 6 ms
[2023-03-08 15:20:34] [INFO ] Flatten gal took : 6 ms
[2023-03-08 15:20:34] [INFO ] Input system was already deterministic with 250 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 34/34 places, 250/250 transitions.
Applied a total of 0 rules in 5 ms. Remains 34 /34 variables (removed 0) and now considering 250/250 (removed 0) transitions.
[2023-03-08 15:20:34] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
[2023-03-08 15:20:34] [INFO ] Invariant cache hit.
[2023-03-08 15:20:34] [INFO ] Dead Transitions using invariants and state equation in 91 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 97 ms. Remains : 34/34 places, 250/250 transitions.
[2023-03-08 15:20:34] [INFO ] Flatten gal took : 6 ms
[2023-03-08 15:20:34] [INFO ] Flatten gal took : 6 ms
[2023-03-08 15:20:34] [INFO ] Input system was already deterministic with 250 transitions.
Starting structural reductions in LTL mode, iteration 0 : 34/34 places, 250/250 transitions.
Applied a total of 0 rules in 1 ms. Remains 34 /34 variables (removed 0) and now considering 250/250 (removed 0) transitions.
[2023-03-08 15:20:34] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
[2023-03-08 15:20:34] [INFO ] Invariant cache hit.
[2023-03-08 15:20:34] [INFO ] Dead Transitions using invariants and state equation in 82 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 83 ms. Remains : 34/34 places, 250/250 transitions.
[2023-03-08 15:20:34] [INFO ] Flatten gal took : 5 ms
[2023-03-08 15:20:34] [INFO ] Flatten gal took : 7 ms
[2023-03-08 15:20:34] [INFO ] Input system was already deterministic with 250 transitions.
Starting structural reductions in LTL mode, iteration 0 : 34/34 places, 250/250 transitions.
Applied a total of 0 rules in 1 ms. Remains 34 /34 variables (removed 0) and now considering 250/250 (removed 0) transitions.
[2023-03-08 15:20:34] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
[2023-03-08 15:20:34] [INFO ] Invariant cache hit.
[2023-03-08 15:20:34] [INFO ] Dead Transitions using invariants and state equation in 89 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 91 ms. Remains : 34/34 places, 250/250 transitions.
[2023-03-08 15:20:34] [INFO ] Flatten gal took : 5 ms
[2023-03-08 15:20:34] [INFO ] Flatten gal took : 7 ms
[2023-03-08 15:20:34] [INFO ] Input system was already deterministic with 250 transitions.
Starting structural reductions in LTL mode, iteration 0 : 34/34 places, 250/250 transitions.
Applied a total of 0 rules in 1 ms. Remains 34 /34 variables (removed 0) and now considering 250/250 (removed 0) transitions.
[2023-03-08 15:20:34] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
[2023-03-08 15:20:34] [INFO ] Invariant cache hit.
[2023-03-08 15:20:35] [INFO ] Dead Transitions using invariants and state equation in 156 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 158 ms. Remains : 34/34 places, 250/250 transitions.
[2023-03-08 15:20:35] [INFO ] Flatten gal took : 5 ms
[2023-03-08 15:20:35] [INFO ] Flatten gal took : 6 ms
[2023-03-08 15:20:35] [INFO ] Input system was already deterministic with 250 transitions.
Starting structural reductions in LTL mode, iteration 0 : 34/34 places, 250/250 transitions.
Applied a total of 0 rules in 1 ms. Remains 34 /34 variables (removed 0) and now considering 250/250 (removed 0) transitions.
[2023-03-08 15:20:35] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
[2023-03-08 15:20:35] [INFO ] Invariant cache hit.
[2023-03-08 15:20:35] [INFO ] Dead Transitions using invariants and state equation in 210 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 213 ms. Remains : 34/34 places, 250/250 transitions.
[2023-03-08 15:20:35] [INFO ] Flatten gal took : 5 ms
[2023-03-08 15:20:35] [INFO ] Flatten gal took : 6 ms
[2023-03-08 15:20:35] [INFO ] Input system was already deterministic with 250 transitions.
Starting structural reductions in LTL mode, iteration 0 : 34/34 places, 250/250 transitions.
Applied a total of 0 rules in 1 ms. Remains 34 /34 variables (removed 0) and now considering 250/250 (removed 0) transitions.
[2023-03-08 15:20:35] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
[2023-03-08 15:20:35] [INFO ] Invariant cache hit.
[2023-03-08 15:20:35] [INFO ] Dead Transitions using invariants and state equation in 104 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 117 ms. Remains : 34/34 places, 250/250 transitions.
[2023-03-08 15:20:35] [INFO ] Flatten gal took : 5 ms
[2023-03-08 15:20:35] [INFO ] Flatten gal took : 5 ms
[2023-03-08 15:20:35] [INFO ] Input system was already deterministic with 250 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 34/34 places, 250/250 transitions.
Applied a total of 0 rules in 5 ms. Remains 34 /34 variables (removed 0) and now considering 250/250 (removed 0) transitions.
[2023-03-08 15:20:35] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
[2023-03-08 15:20:35] [INFO ] Invariant cache hit.
[2023-03-08 15:20:35] [INFO ] Dead Transitions using invariants and state equation in 69 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 74 ms. Remains : 34/34 places, 250/250 transitions.
[2023-03-08 15:20:35] [INFO ] Flatten gal took : 7 ms
[2023-03-08 15:20:35] [INFO ] Flatten gal took : 5 ms
[2023-03-08 15:20:35] [INFO ] Input system was already deterministic with 250 transitions.
Starting structural reductions in LTL mode, iteration 0 : 34/34 places, 250/250 transitions.
Applied a total of 0 rules in 1 ms. Remains 34 /34 variables (removed 0) and now considering 250/250 (removed 0) transitions.
[2023-03-08 15:20:35] [INFO ] Flow matrix only has 247 transitions (discarded 3 similar events)
[2023-03-08 15:20:35] [INFO ] Invariant cache hit.
[2023-03-08 15:20:35] [INFO ] Dead Transitions using invariants and state equation in 74 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 76 ms. Remains : 34/34 places, 250/250 transitions.
[2023-03-08 15:20:35] [INFO ] Flatten gal took : 5 ms
[2023-03-08 15:20:35] [INFO ] Flatten gal took : 5 ms
[2023-03-08 15:20:35] [INFO ] Input system was already deterministic with 250 transitions.
[2023-03-08 15:20:35] [INFO ] Flatten gal took : 16 ms
[2023-03-08 15:20:35] [INFO ] Flatten gal took : 6 ms
[2023-03-08 15:20:35] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-08 15:20:35] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 34 places, 250 transitions and 728 arcs took 2 ms.
Total runtime 9339 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DNAwalker-PT-06track28RL
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA DNAwalker-PT-06track28RL-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DNAwalker-PT-06track28RL-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DNAwalker-PT-06track28RL-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DNAwalker-PT-06track28RL-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DNAwalker-PT-06track28RL-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DNAwalker-PT-06track28RL-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DNAwalker-PT-06track28RL-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DNAwalker-PT-06track28RL-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DNAwalker-PT-06track28RL-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DNAwalker-PT-06track28RL-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678289071939

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
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lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
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lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 1 (type EXCL) for 0 DNAwalker-PT-06track28RL-CTLFireability-00
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for DNAwalker-PT-06track28RL-CTLFireability-00
lola: result : true
lola: markings : 9
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: rewrite Frontend/Parser/formula_rewrite.k:808
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lola: rewrite Frontend/Parser/formula_rewrite.k:808
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lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 4 (type EXCL) for 3 DNAwalker-PT-06track28RL-CTLFireability-01
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
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lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DNAwalker-PT-06track28RL-CTLFireability-00: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DNAwalker-PT-06track28RL-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
DNAwalker-PT-06track28RL-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-06track28RL-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
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DNAwalker-PT-06track28RL-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-06track28RL-CTLFireability-07: AGAF 0 1 0 0 1 0 0 0
DNAwalker-PT-06track28RL-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-06track28RL-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-06track28RL-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-06track28RL-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-06track28RL-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-06track28RL-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-06track28RL-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-06track28RL-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/240 6/32 DNAwalker-PT-06track28RL-CTLFireability-01 1370676 m, 274135 m/sec, 5851313 t fired, .

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DNAwalker-PT-06track28RL-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-06track28RL-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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4 CTL EXCL 10/240 12/32 DNAwalker-PT-06track28RL-CTLFireability-01 2624037 m, 250672 m/sec, 12099856 t fired, .

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4 CTL EXCL 15/240 17/32 DNAwalker-PT-06track28RL-CTLFireability-01 3995381 m, 274268 m/sec, 18303422 t fired, .

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4 CTL EXCL 20/240 21/32 DNAwalker-PT-06track28RL-CTLFireability-01 4963084 m, 193540 m/sec, 23689234 t fired, .

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4 CTL EXCL 25/240 26/32 DNAwalker-PT-06track28RL-CTLFireability-01 6049010 m, 217185 m/sec, 29381371 t fired, .

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4 CTL EXCL 30/240 30/32 DNAwalker-PT-06track28RL-CTLFireability-01 7097936 m, 209785 m/sec, 35796857 t fired, .

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DNAwalker-PT-06track28RL-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-06track28RL-CTLFireability-07: AGAF 0 1 0 0 1 0 0 0
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DNAwalker-PT-06track28RL-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
DNAwalker-PT-06track28RL-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-06track28RL-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 45/393 32/32 DNAwalker-PT-06track28RL-CTLFireability-09 7553997 m, 152592 m/sec, 53030238 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DNAwalker-PT-06track28RL-CTLFireability-00: CTL true CTL model checker
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DNAwalker-PT-06track28RL-CTLFireability-12: CTL true CTL model checker
DNAwalker-PT-06track28RL-CTLFireability-13: CTL false CTL model checker
DNAwalker-PT-06track28RL-CTLFireability-15: CTL false CTL model checker

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DNAwalker-PT-06track28RL-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
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DNAwalker-PT-06track28RL-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-06track28RL-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-06track28RL-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DNAwalker-PT-06track28RL-CTLFireability-00: CTL true CTL model checker
DNAwalker-PT-06track28RL-CTLFireability-02: CTL true CTL model checker
DNAwalker-PT-06track28RL-CTLFireability-03: CTL false CTL model checker
DNAwalker-PT-06track28RL-CTLFireability-05: CTL false CTL model checker
DNAwalker-PT-06track28RL-CTLFireability-10: CTL true CTL model checker
DNAwalker-PT-06track28RL-CTLFireability-12: CTL true CTL model checker
DNAwalker-PT-06track28RL-CTLFireability-13: CTL false CTL model checker
DNAwalker-PT-06track28RL-CTLFireability-15: CTL false CTL model checker

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DNAwalker-PT-06track28RL-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-06track28RL-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DNAwalker-PT-06track28RL-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
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DNAwalker-PT-06track28RL-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-06track28RL-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 EFEG EXCL 5/698 4/32 DNAwalker-PT-06track28RL-CTLFireability-07 994996 m, 198999 m/sec, 2386939 t fired, .

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DNAwalker-PT-06track28RL-CTLFireability-15: CTL false CTL model checker

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DNAwalker-PT-06track28RL-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
DNAwalker-PT-06track28RL-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 EFEG EXCL 10/698 8/32 DNAwalker-PT-06track28RL-CTLFireability-07 1877022 m, 176405 m/sec, 4757562 t fired, .

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DNAwalker-PT-06track28RL-CTLFireability-12: CTL true CTL model checker
DNAwalker-PT-06track28RL-CTLFireability-13: CTL false CTL model checker
DNAwalker-PT-06track28RL-CTLFireability-15: CTL false CTL model checker

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DNAwalker-PT-06track28RL-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

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48 EFEG EXCL 15/698 10/32 DNAwalker-PT-06track28RL-CTLFireability-07 2579497 m, 140495 m/sec, 7367256 t fired, .

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DNAwalker-PT-06track28RL-CTLFireability-12: CTL true CTL model checker
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DNAwalker-PT-06track28RL-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

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48 EFEG EXCL 20/698 14/32 DNAwalker-PT-06track28RL-CTLFireability-07 3535565 m, 191213 m/sec, 9654899 t fired, .

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DNAwalker-PT-06track28RL-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

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48 EFEG EXCL 25/698 17/32 DNAwalker-PT-06track28RL-CTLFireability-07 4374094 m, 167705 m/sec, 12029961 t fired, .

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48 EFEG EXCL 30/698 21/32 DNAwalker-PT-06track28RL-CTLFireability-07 5308087 m, 186798 m/sec, 14398280 t fired, .

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48 EFEG EXCL 35/698 24/32 DNAwalker-PT-06track28RL-CTLFireability-07 6279282 m, 194239 m/sec, 16798991 t fired, .

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48 EFEG EXCL 40/698 28/32 DNAwalker-PT-06track28RL-CTLFireability-07 7240833 m, 192310 m/sec, 19214045 t fired, .

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48 EFEG EXCL 45/698 32/32 DNAwalker-PT-06track28RL-CTLFireability-07 8202339 m, 192301 m/sec, 21686140 t fired, .

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19 CTL EXCL 5/1146 4/32 DNAwalker-PT-06track28RL-CTLFireability-06 893761 m, 178752 m/sec, 7342130 t fired, .

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19 CTL EXCL 10/1146 8/32 DNAwalker-PT-06track28RL-CTLFireability-06 1706767 m, 162601 m/sec, 14470307 t fired, .

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FINAL RESULTS
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DNAwalker-PT-06track28RL-CTLFireability-00: CTL true CTL model checker
DNAwalker-PT-06track28RL-CTLFireability-01: CTL unknown AGGR
DNAwalker-PT-06track28RL-CTLFireability-02: CTL true CTL model checker
DNAwalker-PT-06track28RL-CTLFireability-03: CTL false CTL model checker
DNAwalker-PT-06track28RL-CTLFireability-04: CTL unknown AGGR
DNAwalker-PT-06track28RL-CTLFireability-05: CTL false CTL model checker
DNAwalker-PT-06track28RL-CTLFireability-06: CTL unknown AGGR
DNAwalker-PT-06track28RL-CTLFireability-07: AGAF unknown AGGR
DNAwalker-PT-06track28RL-CTLFireability-08: CTL false CTL model checker
DNAwalker-PT-06track28RL-CTLFireability-09: CTL unknown AGGR
DNAwalker-PT-06track28RL-CTLFireability-10: CTL true CTL model checker
DNAwalker-PT-06track28RL-CTLFireability-11: CTL unknown AGGR
DNAwalker-PT-06track28RL-CTLFireability-12: CTL true CTL model checker
DNAwalker-PT-06track28RL-CTLFireability-13: CTL false CTL model checker
DNAwalker-PT-06track28RL-CTLFireability-14: CTL true CTL model checker
DNAwalker-PT-06track28RL-CTLFireability-15: CTL false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DNAwalker-PT-06track28RL"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DNAwalker-PT-06track28RL, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r103-tall-167814478900914"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DNAwalker-PT-06track28RL.tgz
mv DNAwalker-PT-06track28RL execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;