About the Execution of LoLa+red for DLCround-PT-12b
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 1541.600 | 73529.00 | 93779.00 | 1861.10 | TFTTTTTTTFTTFFTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478700774.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DLCround-PT-12b, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478700774
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.3M
-rw-r--r-- 1 mcc users 5.9K Feb 25 18:19 CTLCardinality.txt
-rw-r--r-- 1 mcc users 60K Feb 25 18:19 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.6K Feb 25 18:19 CTLFireability.txt
-rw-r--r-- 1 mcc users 77K Feb 25 18:19 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.0K Feb 25 15:53 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 15:53 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:53 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:53 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.6K Feb 25 18:20 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 85K Feb 25 18:20 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.8K Feb 25 18:20 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 42K Feb 25 18:20 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 1.9M Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-12b-ReachabilityCardinality-00
FORMULA_NAME DLCround-PT-12b-ReachabilityCardinality-01
FORMULA_NAME DLCround-PT-12b-ReachabilityCardinality-02
FORMULA_NAME DLCround-PT-12b-ReachabilityCardinality-03
FORMULA_NAME DLCround-PT-12b-ReachabilityCardinality-04
FORMULA_NAME DLCround-PT-12b-ReachabilityCardinality-05
FORMULA_NAME DLCround-PT-12b-ReachabilityCardinality-06
FORMULA_NAME DLCround-PT-12b-ReachabilityCardinality-07
FORMULA_NAME DLCround-PT-12b-ReachabilityCardinality-08
FORMULA_NAME DLCround-PT-12b-ReachabilityCardinality-09
FORMULA_NAME DLCround-PT-12b-ReachabilityCardinality-10
FORMULA_NAME DLCround-PT-12b-ReachabilityCardinality-11
FORMULA_NAME DLCround-PT-12b-ReachabilityCardinality-12
FORMULA_NAME DLCround-PT-12b-ReachabilityCardinality-13
FORMULA_NAME DLCround-PT-12b-ReachabilityCardinality-14
FORMULA_NAME DLCround-PT-12b-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1678279180484
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-12b
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 12:39:43] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-08 12:39:43] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 12:39:43] [INFO ] Load time of PNML (sax parser for PT used): 223 ms
[2023-03-08 12:39:44] [INFO ] Transformed 4848 places.
[2023-03-08 12:39:44] [INFO ] Transformed 7836 transitions.
[2023-03-08 12:39:44] [INFO ] Found NUPN structural information;
[2023-03-08 12:39:44] [INFO ] Parsed PT model containing 4848 places and 7836 transitions and 22188 arcs in 964 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 14 ms.
Working with output stream class java.io.PrintStream
Incomplete random walk after 10000 steps, including 2 resets, run finished after 469 ms. (steps per millisecond=21 ) properties (out of 16) seen :10
FORMULA DLCround-PT-12b-ReachabilityCardinality-15 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-12b-ReachabilityCardinality-14 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-12b-ReachabilityCardinality-12 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-12b-ReachabilityCardinality-10 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-12b-ReachabilityCardinality-09 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-12b-ReachabilityCardinality-08 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-12b-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-12b-ReachabilityCardinality-03 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-12b-ReachabilityCardinality-02 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-12b-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 6) seen :0
Running SMT prover for 6 properties.
// Phase 1: matrix 7836 rows 4848 cols
[2023-03-08 12:39:45] [INFO ] Computed 277 place invariants in 67 ms
[2023-03-08 12:39:47] [INFO ] After 1366ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:6
[2023-03-08 12:39:48] [INFO ] [Nat]Absence check using 277 positive place invariants in 264 ms returned sat
[2023-03-08 12:39:53] [INFO ] After 5217ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :6
[2023-03-08 12:39:55] [INFO ] Deduced a trap composed of 252 places in 1633 ms of which 6 ms to minimize.
[2023-03-08 12:39:56] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 2273 ms
[2023-03-08 12:39:59] [INFO ] After 10612ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :6
Attempting to minimize the solution found.
Minimization took 1349 ms.
[2023-03-08 12:40:00] [INFO ] After 13632ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :6
Fused 6 Parikh solutions to 5 different solutions.
FORMULA DLCround-PT-12b-ReachabilityCardinality-13 FALSE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA DLCround-PT-12b-ReachabilityCardinality-11 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA DLCround-PT-12b-ReachabilityCardinality-05 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA DLCround-PT-12b-ReachabilityCardinality-06 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Parikh walk visited 4 properties in 392 ms.
Support contains 34 out of 4848 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 4848/4848 places, 7836/7836 transitions.
Graph (trivial) has 4387 edges and 4848 vertex of which 734 / 4848 are part of one of the 54 SCC in 17 ms
Free SCC test removed 680 places
Drop transitions removed 760 transitions
Reduce isomorphic transitions removed 760 transitions.
Drop transitions removed 1722 transitions
Trivial Post-agglo rules discarded 1722 transitions
Performed 1722 trivial Post agglomeration. Transition count delta: 1722
Iterating post reduction 0 with 1722 rules applied. Total rules applied 1723 place count 4168 transition count 5354
Reduce places removed 1722 places and 0 transitions.
Ensure Unique test removed 47 transitions
Reduce isomorphic transitions removed 47 transitions.
Drop transitions removed 36 transitions
Trivial Post-agglo rules discarded 36 transitions
Performed 36 trivial Post agglomeration. Transition count delta: 36
Iterating post reduction 1 with 1805 rules applied. Total rules applied 3528 place count 2446 transition count 5271
Reduce places removed 36 places and 0 transitions.
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 2 with 44 rules applied. Total rules applied 3572 place count 2410 transition count 5263
Reduce places removed 4 places and 0 transitions.
Performed 16 Post agglomeration using F-continuation condition.Transition count delta: 16
Iterating post reduction 3 with 20 rules applied. Total rules applied 3592 place count 2406 transition count 5247
Reduce places removed 16 places and 0 transitions.
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 4 with 18 rules applied. Total rules applied 3610 place count 2390 transition count 5245
Performed 9 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 9 Pre rules applied. Total rules applied 3610 place count 2390 transition count 5236
Deduced a syphon composed of 9 places in 94 ms
Reduce places removed 9 places and 0 transitions.
Iterating global reduction 5 with 18 rules applied. Total rules applied 3628 place count 2381 transition count 5236
Discarding 651 places :
Symmetric choice reduction at 5 with 651 rule applications. Total rules 4279 place count 1730 transition count 4585
Iterating global reduction 5 with 651 rules applied. Total rules applied 4930 place count 1730 transition count 4585
Performed 284 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 284 Pre rules applied. Total rules applied 4930 place count 1730 transition count 4301
Deduced a syphon composed of 284 places in 33 ms
Reduce places removed 284 places and 0 transitions.
Iterating global reduction 5 with 568 rules applied. Total rules applied 5498 place count 1446 transition count 4301
Discarding 89 places :
Symmetric choice reduction at 5 with 89 rule applications. Total rules 5587 place count 1357 transition count 2898
Iterating global reduction 5 with 89 rules applied. Total rules applied 5676 place count 1357 transition count 2898
Ensure Unique test removed 28 transitions
Reduce isomorphic transitions removed 28 transitions.
Iterating post reduction 5 with 28 rules applied. Total rules applied 5704 place count 1357 transition count 2870
Performed 357 Post agglomeration using F-continuation condition with reduction of 11 identical transitions.
Deduced a syphon composed of 357 places in 2 ms
Reduce places removed 357 places and 0 transitions.
Iterating global reduction 6 with 714 rules applied. Total rules applied 6418 place count 1000 transition count 2502
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 12 transitions.
Iterating post reduction 6 with 12 rules applied. Total rules applied 6430 place count 1000 transition count 2490
Discarding 1 places :
Symmetric choice reduction at 7 with 1 rule applications. Total rules 6431 place count 999 transition count 2474
Iterating global reduction 7 with 1 rules applied. Total rules applied 6432 place count 999 transition count 2474
Performed 27 Post agglomeration using F-continuation condition.Transition count delta: -235
Deduced a syphon composed of 27 places in 1 ms
Reduce places removed 27 places and 0 transitions.
Iterating global reduction 7 with 54 rules applied. Total rules applied 6486 place count 972 transition count 2709
Drop transitions removed 21 transitions
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 25 transitions.
Iterating post reduction 7 with 25 rules applied. Total rules applied 6511 place count 972 transition count 2684
Discarding 4 places :
Symmetric choice reduction at 8 with 4 rule applications. Total rules 6515 place count 968 transition count 2578
Iterating global reduction 8 with 4 rules applied. Total rules applied 6519 place count 968 transition count 2578
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 8 with 3 rules applied. Total rules applied 6522 place count 968 transition count 2575
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: -34
Deduced a syphon composed of 3 places in 1 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 9 with 6 rules applied. Total rules applied 6528 place count 965 transition count 2609
Drop transitions removed 60 transitions
Redundant transition composition rules discarded 60 transitions
Iterating global reduction 9 with 60 rules applied. Total rules applied 6588 place count 965 transition count 2549
Discarding 21 places :
Symmetric choice reduction at 9 with 21 rule applications. Total rules 6609 place count 944 transition count 2528
Iterating global reduction 9 with 21 rules applied. Total rules applied 6630 place count 944 transition count 2528
Discarding 21 places :
Symmetric choice reduction at 9 with 21 rule applications. Total rules 6651 place count 923 transition count 2170
Iterating global reduction 9 with 21 rules applied. Total rules applied 6672 place count 923 transition count 2170
Ensure Unique test removed 21 transitions
Reduce isomorphic transitions removed 21 transitions.
Iterating post reduction 9 with 21 rules applied. Total rules applied 6693 place count 923 transition count 2149
Performed 14 Post agglomeration using F-continuation condition.Transition count delta: 14
Deduced a syphon composed of 14 places in 1 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 10 with 28 rules applied. Total rules applied 6721 place count 909 transition count 2135
Discarding 13 places :
Symmetric choice reduction at 10 with 13 rule applications. Total rules 6734 place count 896 transition count 1914
Iterating global reduction 10 with 13 rules applied. Total rules applied 6747 place count 896 transition count 1914
Ensure Unique test removed 13 transitions
Reduce isomorphic transitions removed 13 transitions.
Iterating post reduction 10 with 13 rules applied. Total rules applied 6760 place count 896 transition count 1901
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: -11
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 11 with 2 rules applied. Total rules applied 6762 place count 895 transition count 1912
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 11 with 1 rules applied. Total rules applied 6763 place count 895 transition count 1911
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 12 with 1 rules applied. Total rules applied 6764 place count 895 transition count 1910
Free-agglomeration rule applied 532 times with reduction of 253 identical transitions.
Iterating global reduction 12 with 532 rules applied. Total rules applied 7296 place count 895 transition count 1125
Reduce places removed 532 places and 0 transitions.
Drop transitions removed 549 transitions
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 553 transitions.
Graph (complete) has 861 edges and 363 vertex of which 285 are kept as prefixes of interest. Removing 78 places using SCC suffix rule.2 ms
Discarding 78 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Iterating post reduction 12 with 1086 rules applied. Total rules applied 8382 place count 285 transition count 571
Drop transitions removed 9 transitions
Ensure Unique test removed 15 transitions
Reduce isomorphic transitions removed 24 transitions.
Iterating post reduction 13 with 24 rules applied. Total rules applied 8406 place count 285 transition count 547
Discarding 110 places :
Symmetric choice reduction at 14 with 110 rule applications. Total rules 8516 place count 175 transition count 372
Iterating global reduction 14 with 110 rules applied. Total rules applied 8626 place count 175 transition count 372
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 14 with 1 rules applied. Total rules applied 8627 place count 175 transition count 371
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 15 with 2 rules applied. Total rules applied 8629 place count 174 transition count 370
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: -39
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 15 with 6 rules applied. Total rules applied 8635 place count 171 transition count 409
Drop transitions removed 28 transitions
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 31 transitions.
Iterating post reduction 15 with 31 rules applied. Total rules applied 8666 place count 171 transition count 378
Drop transitions removed 75 transitions
Redundant transition composition rules discarded 75 transitions
Iterating global reduction 16 with 75 rules applied. Total rules applied 8741 place count 171 transition count 303
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 16 with 2 rules applied. Total rules applied 8743 place count 169 transition count 303
Discarding 11 places :
Symmetric choice reduction at 17 with 11 rule applications. Total rules 8754 place count 158 transition count 288
Iterating global reduction 17 with 11 rules applied. Total rules applied 8765 place count 158 transition count 288
Free-agglomeration rule applied 1 times.
Iterating global reduction 17 with 1 rules applied. Total rules applied 8766 place count 158 transition count 287
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 17 with 1 rules applied. Total rules applied 8767 place count 157 transition count 287
Drop transitions removed 8 transitions
Redundant transition composition rules discarded 8 transitions
Iterating global reduction 18 with 8 rules applied. Total rules applied 8775 place count 157 transition count 279
Partial Free-agglomeration rule applied 3 times.
Drop transitions removed 3 transitions
Iterating global reduction 18 with 3 rules applied. Total rules applied 8778 place count 157 transition count 279
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 18 with 1 rules applied. Total rules applied 8779 place count 157 transition count 278
Applied a total of 8779 rules in 1596 ms. Remains 157 /4848 variables (removed 4691) and now considering 278/7836 (removed 7558) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1597 ms. Remains : 157/4848 places, 278/7836 transitions.
Finished random walk after 830 steps, including 0 resets, run visited all 2 properties in 9 ms. (steps per millisecond=92 )
FORMULA DLCround-PT-12b-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-12b-ReachabilityCardinality-01 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
All properties solved without resorting to model-checking.
Total runtime 19148 ms.
starting LoLA
BK_INPUT DLCround-PT-12b
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA DLCround-PT-12b-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12b-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12b-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12b-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12b-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12b-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12b-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12b-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12b-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12b-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12b-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12b-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12b-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12b-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12b-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12b-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678279254013
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 1.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-12b-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
DLCround-PT-12b-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
DLCround-PT-12b-ReachabilityCardinality-02: EF 0 0 0 0 0 0 0 0
DLCround-PT-12b-ReachabilityCardinality-03: EF 0 0 0 0 1 0 0 0
DLCround-PT-12b-ReachabilityCardinality-04: EF 0 0 0 0 1 0 0 0
DLCround-PT-12b-ReachabilityCardinality-05: EF 0 0 0 0 1 0 0 0
DLCround-PT-12b-ReachabilityCardinality-06: EF 0 0 0 0 0 0 0 0
DLCround-PT-12b-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
DLCround-PT-12b-ReachabilityCardinality-08: EF 0 0 0 0 1 0 0 0
DLCround-PT-12b-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
DLCround-PT-12b-ReachabilityCardinality-10: EF 0 0 0 0 1 0 0 0
DLCround-PT-12b-ReachabilityCardinality-11: EF 0 0 0 0 1 0 0 0
DLCround-PT-12b-ReachabilityCardinality-12: AG 0 0 0 0 1 0 0 0
DLCround-PT-12b-ReachabilityCardinality-13: AG 0 0 0 0 1 0 0 0
DLCround-PT-12b-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
DLCround-PT-12b-ReachabilityCardinality-15: EF 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type EXCL) for 3 DLCround-PT-12b-ReachabilityCardinality-01
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 52 (type SRCH) for DLCround-PT-12b-ReachabilityCardinality-01
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 61 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-00
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lola: FINISHED task # 49 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-01
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lola: FINISHED task # 80 (type SRCH) for DLCround-PT-12b-ReachabilityCardinality-14
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lola: CANCELED task # 76 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-14 (obsolete)
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lola: FINISHED task # 76 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-14
lola: result : true
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 59 (type EXCL) for DLCround-PT-12b-ReachabilityCardinality-04
lola: result : true
lola: markings : 2sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-62.sara.
sara: place or transition ordering is non-deterministic
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lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 72 (type EXCL) for 27 DLCround-PT-12b-ReachabilityCardinality-09
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lola: FINISHED task # 82 (type SRCH) for DLCround-PT-12b-ReachabilityCardinality-15
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lola: CANCELED task # 74 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-15 (obsolete)
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sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-78.sara.
sara: place or transition ordering is non-deterministic
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sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-75.sara.
sara: place or transition ordering is non-deterministic
lola: LAUNCH task # 95 (type SRCH) for 24 DLCround-PT-12b-ReachabilityCardinality-08
lola: time limit : 32000000 sec
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 62 (type EQUN) for DLCround-PT-12b-ReachabilityCardinality-00
lola: result : true
lola: FINISHED task # 74 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-15
lola: result : unknown
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lola: FINISHED task # 75 (type EQUN) for DLCround-PT-12b-ReachabilityCardinality-15
lola: result : true
lola: FINISHED task # 78 (type EQUN) for DLCround-PT-12b-ReachabilityCardinality-14
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
lola: FINISHED task # 92 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-08
lola: result : true
lola: tried executions : 1
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lola: CANCELED task # 93 (type EQUN) for DLCround-PT-12b-ReachabilityCardinality-08 (obsolete)
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lola: LAUNCH task # 89 (type SRCH) for 15 DLCround-PT-12b-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 89 (type SRCH) for DLCround-PT-12b-ReachabilityCardinality-05
lola: result : true
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 84 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-05 (obsolete)
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lola: LAUNCH task # 68 (type FNDP) for 27 DLCround-PT-12b-ReachabilityCardinality-09
lola: time limit : 32000000 sec
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lola: LAUNCH task # 71 (type SRCH) for 27 DLCround-PT-12b-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-93.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-86.sara.
lola: FINISHED task # 84 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 68 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-09
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 69 (type EQUN) for DLCround-PT-12b-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 71 (type SRCH) for DLCround-PT-12b-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 72 (type EXCL) for DLCround-PT-12b-ReachabilityCardinality-09 (obsolete)
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lola: time limit : 32000000 sec
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lola: FINISHED task # 102 (type EXCL) for DLCround-PT-12b-ReachabilityCardinality-10
lola: result : true
lola: markings : 2
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lola: CANCELED task # 98 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-10 (obsolete)
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lola: FINISHED task # 98 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-10
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 109 (type EXCL) for 39 DLCround-PT-12b-ReachabilityCardinality-13
lola: time limit : 507 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 105 (type FNDP) for 39 DLCround-PT-12b-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 106 (type EQUN) for 39 DLCround-PT-12b-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 108 (type SRCH) for 39 DLCround-PT-12b-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 105 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-13
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 109 (type EXCL) for DLCround-PT-12b-ReachabilityCardinality-13
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 106 (type EQUN) for DLCround-PT-12b-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 108 (type SRCH) for DLCround-PT-12b-ReachabilityCardinality-13 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-99.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 99 (type EQUN) for DLCround-PT-12b-ReachabilityCardinality-10
lola: result : true
lola: FINISHED task # 106 (type EQUN) for DLCround-PT-12b-ReachabilityCardinality-13
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 115 (type EXCL) for 6 DLCround-PT-12b-ReachabilityCardinality-02
lola: time limit : 591 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 111 (type FNDP) for 6 DLCround-PT-12b-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 112 (type EQUN) for 6 DLCround-PT-12b-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 114 (type SRCH) for 6 DLCround-PT-12b-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-69.sara.
lola: FINISHED task # 115 (type EXCL) for DLCround-PT-12b-ReachabilityCardinality-02
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 111 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 112 (type EQUN) for DLCround-PT-12b-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 114 (type SRCH) for DLCround-PT-12b-ReachabilityCardinality-02 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 111 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-02
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-112.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 112 (type EQUN) for DLCround-PT-12b-ReachabilityCardinality-02
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 121 (type EXCL) for 18 DLCround-PT-12b-ReachabilityCardinality-06
lola: time limit : 710 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 117 (type FNDP) for 18 DLCround-PT-12b-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 118 (type EQUN) for 18 DLCround-PT-12b-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 120 (type SRCH) for 18 DLCround-PT-12b-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 121 (type EXCL) for DLCround-PT-12b-ReachabilityCardinality-06
lola: result : true
lola: markings : 56
lola: fired transitions : 70
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 117 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 118 (type EQUN) for DLCround-PT-12b-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 120 (type SRCH) for DLCround-PT-12b-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 127 (type EXCL) for 33 DLCround-PT-12b-ReachabilityCardinality-11
lola: time limit : 887 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 123 (type FNDP) for 33 DLCround-PT-12b-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 124 (type EQUN) for 33 DLCround-PT-12b-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 126 (type SRCH) for 33 DLCround-PT-12b-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 117 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-06
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-118.sara.
lola: FINISHED task # 126 (type SRCH) for DLCround-PT-12b-ReachabilityCardinality-11
lola: result : true
lola: markings : 6
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 123 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 124 (type EQUN) for DLCround-PT-12b-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 127 (type EXCL) for DLCround-PT-12b-ReachabilityCardinality-11 (obsolete)
lola: FINISHED task # 123 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 8
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-124.sara.
lola: FINISHED task # 118 (type EQUN) for DLCround-PT-12b-ReachabilityCardinality-06
lola: result : true
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 134 (type EXCL) for 36 DLCround-PT-12b-ReachabilityCardinality-12
lola: time limit : 1183 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 130 (type FNDP) for 36 DLCround-PT-12b-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 131 (type EQUN) for 36 DLCround-PT-12b-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 133 (type SRCH) for 36 DLCround-PT-12b-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 130 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-12
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 131 (type EQUN) for DLCround-PT-12b-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 133 (type SRCH) for DLCround-PT-12b-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 134 (type EXCL) for DLCround-PT-12b-ReachabilityCardinality-12 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 124 (type EQUN) for DLCround-PT-12b-ReachabilityCardinality-11
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-131.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 140 (type EXCL) for 9 DLCround-PT-12b-ReachabilityCardinality-03
lola: time limit : 1775 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 136 (type FNDP) for 9 DLCround-PT-12b-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 137 (type EQUN) for 9 DLCround-PT-12b-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 139 (type SRCH) for 9 DLCround-PT-12b-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 131 (type EQUN) for DLCround-PT-12b-ReachabilityCardinality-12
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 139 (type SRCH) for DLCround-PT-12b-ReachabilityCardinality-03
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 136 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 137 (type EQUN) for DLCround-PT-12b-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 140 (type EXCL) for DLCround-PT-12b-ReachabilityCardinality-03 (obsolete)
lola: FINISHED task # 136 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-03
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 146 (type EXCL) for 21 DLCround-PT-12b-ReachabilityCardinality-07
lola: time limit : 3551 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 142 (type FNDP) for 21 DLCround-PT-12b-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 143 (type EQUN) for 21 DLCround-PT-12b-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 145 (type SRCH) for 21 DLCround-PT-12b-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 142 (type FNDP) for DLCround-PT-12b-ReachabilityCardinality-07
lola: result : true
lola: fired transitions : 13
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 143 (type EQUN) for DLCround-PT-12b-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 145 (type SRCH) for DLCround-PT-12b-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 146 (type EXCL) for DLCround-PT-12b-ReachabilityCardinality-07 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-12b-ReachabilityCardinality-00: EF true findpath
DLCround-PT-12b-ReachabilityCardinality-01: AG false tandem / insertion
DLCround-PT-12b-ReachabilityCardinality-02: EF true tandem / relaxed
DLCround-PT-12b-ReachabilityCardinality-03: EF true tandem / insertion
DLCround-PT-12b-ReachabilityCardinality-04: EF true tandem / relaxed
DLCround-PT-12b-ReachabilityCardinality-05: EF true tandem / insertion
DLCround-PT-12b-ReachabilityCardinality-06: EF true tandem / relaxed
DLCround-PT-12b-ReachabilityCardinality-07: EF true findpath
DLCround-PT-12b-ReachabilityCardinality-08: EF true findpath
DLCround-PT-12b-ReachabilityCardinality-09: AG false findpath
DLCround-PT-12b-ReachabilityCardinality-10: EF true tandem / relaxed
DLCround-PT-12b-ReachabilityCardinality-11: EF true tandem / insertion
DLCround-PT-12b-ReachabilityCardinality-12: AG false findpath
DLCround-PT-12b-ReachabilityCardinality-13: AG false findpath
DLCround-PT-12b-ReachabilityCardinality-14: EF true tandem / insertion
DLCround-PT-12b-ReachabilityCardinality-15: EF true tandem / insertion
Time elapsed: 49 secs. Pages in use: 3
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-12b"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DLCround-PT-12b, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r103-tall-167814478700774"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-12b.tgz
mv DLCround-PT-12b execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;