fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r103-tall-167814478700762
Last Updated
May 14, 2023

About the Execution of LoLa+red for DLCround-PT-12a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
12832.344 566788.00 553827.00 2677.60 ???F?T?FT?FTT??? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478700762.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DLCround-PT-12a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478700762
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.3M
-rw-r--r-- 1 mcc users 6.9K Feb 25 19:40 CTLCardinality.txt
-rw-r--r-- 1 mcc users 76K Feb 25 19:40 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K Feb 25 19:04 CTLFireability.txt
-rw-r--r-- 1 mcc users 61K Feb 25 19:04 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.2K Feb 25 15:53 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 15:53 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:53 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:53 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.3K Feb 25 20:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 98K Feb 25 20:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.4K Feb 25 20:18 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 70K Feb 25 20:18 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 871K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-12a-CTLFireability-00
FORMULA_NAME DLCround-PT-12a-CTLFireability-01
FORMULA_NAME DLCround-PT-12a-CTLFireability-02
FORMULA_NAME DLCround-PT-12a-CTLFireability-03
FORMULA_NAME DLCround-PT-12a-CTLFireability-04
FORMULA_NAME DLCround-PT-12a-CTLFireability-05
FORMULA_NAME DLCround-PT-12a-CTLFireability-06
FORMULA_NAME DLCround-PT-12a-CTLFireability-07
FORMULA_NAME DLCround-PT-12a-CTLFireability-08
FORMULA_NAME DLCround-PT-12a-CTLFireability-09
FORMULA_NAME DLCround-PT-12a-CTLFireability-10
FORMULA_NAME DLCround-PT-12a-CTLFireability-11
FORMULA_NAME DLCround-PT-12a-CTLFireability-12
FORMULA_NAME DLCround-PT-12a-CTLFireability-13
FORMULA_NAME DLCround-PT-12a-CTLFireability-14
FORMULA_NAME DLCround-PT-12a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678278582905

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-12a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 12:29:44] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-08 12:29:44] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 12:29:44] [INFO ] Load time of PNML (sax parser for PT used): 132 ms
[2023-03-08 12:29:44] [INFO ] Transformed 419 places.
[2023-03-08 12:29:44] [INFO ] Transformed 3407 transitions.
[2023-03-08 12:29:44] [INFO ] Found NUPN structural information;
[2023-03-08 12:29:44] [INFO ] Parsed PT model containing 419 places and 3407 transitions and 13330 arcs in 207 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 17 ms.
Ensure Unique test removed 315 transitions
Reduce redundant transitions removed 315 transitions.
Support contains 187 out of 419 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 419/419 places, 3092/3092 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 412 transition count 2986
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 412 transition count 2986
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 16 place count 412 transition count 2984
Drop transitions removed 1112 transitions
Redundant transition composition rules discarded 1112 transitions
Iterating global reduction 1 with 1112 rules applied. Total rules applied 1128 place count 412 transition count 1872
Applied a total of 1128 rules in 120 ms. Remains 412 /419 variables (removed 7) and now considering 1872/3092 (removed 1220) transitions.
[2023-03-08 12:29:44] [INFO ] Flow matrix only has 241 transitions (discarded 1631 similar events)
// Phase 1: matrix 241 rows 412 cols
[2023-03-08 12:29:44] [INFO ] Computed 277 place invariants in 8 ms
[2023-03-08 12:29:45] [INFO ] Implicit Places using invariants in 1103 ms returned [152, 153, 155, 156, 157, 162, 164, 166, 167, 168, 169, 170, 172, 173, 175, 176, 177, 178, 180, 184, 185, 186, 187, 189, 191, 192, 193, 194, 196, 198, 199, 200, 201, 203, 206, 207, 208, 209, 211, 212, 214, 215, 216, 217, 218, 220, 222, 223, 225, 226, 227, 228, 229, 231, 232, 233, 234, 236, 237, 241, 242, 243, 244, 245, 246, 247, 248, 250, 252, 255, 256, 257, 260, 267, 269, 270, 274, 275, 276, 277, 279, 280, 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, 293, 294, 295, 296, 297, 301, 304, 307, 309, 310, 311, 313, 319, 321, 324, 325, 326, 328, 330, 331, 332, 333, 334, 337, 339, 341, 342, 344, 346, 348, 350, 351, 352, 355, 358, 359, 360, 361, 367, 368, 369, 370, 372, 373, 376, 377, 378, 379, 380, 382, 384, 385, 386, 387, 392, 393, 394, 397, 398, 399, 402, 403, 405, 407, 409, 410]
Discarding 158 places :
Ensure Unique test removed 874 transitions
Reduce isomorphic transitions removed 874 transitions.
Implicit Place search using SMT only with invariants took 1156 ms to find 158 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 254/419 places, 998/3092 transitions.
Drop transitions removed 671 transitions
Redundant transition composition rules discarded 671 transitions
Iterating global reduction 0 with 671 rules applied. Total rules applied 671 place count 254 transition count 327
Applied a total of 671 rules in 16 ms. Remains 254 /254 variables (removed 0) and now considering 327/998 (removed 671) transitions.
[2023-03-08 12:29:45] [INFO ] Flow matrix only has 241 transitions (discarded 86 similar events)
// Phase 1: matrix 241 rows 254 cols
[2023-03-08 12:29:45] [INFO ] Computed 119 place invariants in 5 ms
[2023-03-08 12:29:45] [INFO ] Implicit Places using invariants in 80 ms returned []
[2023-03-08 12:29:45] [INFO ] Flow matrix only has 241 transitions (discarded 86 similar events)
[2023-03-08 12:29:45] [INFO ] Invariant cache hit.
[2023-03-08 12:29:46] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-08 12:29:46] [INFO ] Implicit Places using invariants and state equation in 123 ms returned []
Implicit Place search using SMT with State Equation took 205 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 254/419 places, 327/3092 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 1497 ms. Remains : 254/419 places, 327/3092 transitions.
Support contains 187 out of 254 places after structural reductions.
[2023-03-08 12:29:46] [INFO ] Flatten gal took : 47 ms
[2023-03-08 12:29:46] [INFO ] Flatten gal took : 25 ms
[2023-03-08 12:29:46] [INFO ] Input system was already deterministic with 327 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 241 ms. (steps per millisecond=41 ) properties (out of 108) seen :107
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-08 12:29:46] [INFO ] Flow matrix only has 241 transitions (discarded 86 similar events)
[2023-03-08 12:29:46] [INFO ] Invariant cache hit.
[2023-03-08 12:29:46] [INFO ] [Real]Absence check using 119 positive place invariants in 22 ms returned sat
[2023-03-08 12:29:46] [INFO ] After 92ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
[2023-03-08 12:29:46] [INFO ] Flatten gal took : 15 ms
[2023-03-08 12:29:46] [INFO ] Flatten gal took : 15 ms
[2023-03-08 12:29:46] [INFO ] Input system was already deterministic with 327 transitions.
Support contains 183 out of 254 places (down from 184) after GAL structural reductions.
Computed a total of 103 stabilizing places and 1 stable transitions
Graph (complete) has 445 edges and 254 vertex of which 152 are kept as prefixes of interest. Removing 102 places using SCC suffix rule.12 ms
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 327/327 transitions.
Reduce places removed 98 places and 0 transitions.
Iterating post reduction 0 with 98 rules applied. Total rules applied 98 place count 156 transition count 327
Discarding 25 places :
Symmetric choice reduction at 1 with 25 rule applications. Total rules 123 place count 131 transition count 277
Iterating global reduction 1 with 25 rules applied. Total rules applied 148 place count 131 transition count 277
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 150 place count 131 transition count 275
Applied a total of 150 rules in 7 ms. Remains 131 /254 variables (removed 123) and now considering 275/327 (removed 52) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 131/254 places, 275/327 transitions.
[2023-03-08 12:29:46] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:29:46] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:29:46] [INFO ] Input system was already deterministic with 275 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 327/327 transitions.
Reduce places removed 93 places and 0 transitions.
Iterating post reduction 0 with 93 rules applied. Total rules applied 93 place count 161 transition count 327
Discarding 25 places :
Symmetric choice reduction at 1 with 25 rule applications. Total rules 118 place count 136 transition count 277
Iterating global reduction 1 with 25 rules applied. Total rules applied 143 place count 136 transition count 277
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 145 place count 136 transition count 275
Applied a total of 145 rules in 6 ms. Remains 136 /254 variables (removed 118) and now considering 275/327 (removed 52) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 136/254 places, 275/327 transitions.
[2023-03-08 12:29:46] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:29:46] [INFO ] Flatten gal took : 8 ms
[2023-03-08 12:29:46] [INFO ] Input system was already deterministic with 275 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 327/327 transitions.
Reduce places removed 96 places and 0 transitions.
Iterating post reduction 0 with 96 rules applied. Total rules applied 96 place count 158 transition count 327
Discarding 25 places :
Symmetric choice reduction at 1 with 25 rule applications. Total rules 121 place count 133 transition count 277
Iterating global reduction 1 with 25 rules applied. Total rules applied 146 place count 133 transition count 277
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 148 place count 133 transition count 275
Applied a total of 148 rules in 5 ms. Remains 133 /254 variables (removed 121) and now considering 275/327 (removed 52) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 133/254 places, 275/327 transitions.
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:29:47] [INFO ] Input system was already deterministic with 275 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 327/327 transitions.
Reduce places removed 100 places and 0 transitions.
Iterating post reduction 0 with 100 rules applied. Total rules applied 100 place count 154 transition count 327
Discarding 27 places :
Symmetric choice reduction at 1 with 27 rule applications. Total rules 127 place count 127 transition count 273
Iterating global reduction 1 with 27 rules applied. Total rules applied 154 place count 127 transition count 273
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 156 place count 127 transition count 271
Applied a total of 156 rules in 5 ms. Remains 127 /254 variables (removed 127) and now considering 271/327 (removed 56) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 127/254 places, 271/327 transitions.
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:29:47] [INFO ] Input system was already deterministic with 271 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 327/327 transitions.
Reduce places removed 81 places and 0 transitions.
Iterating post reduction 0 with 81 rules applied. Total rules applied 81 place count 173 transition count 327
Discarding 19 places :
Symmetric choice reduction at 1 with 19 rule applications. Total rules 100 place count 154 transition count 289
Iterating global reduction 1 with 19 rules applied. Total rules applied 119 place count 154 transition count 289
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 121 place count 154 transition count 287
Applied a total of 121 rules in 5 ms. Remains 154 /254 variables (removed 100) and now considering 287/327 (removed 40) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 154/254 places, 287/327 transitions.
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 8 ms
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:29:47] [INFO ] Input system was already deterministic with 287 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 327/327 transitions.
Reduce places removed 94 places and 0 transitions.
Iterating post reduction 0 with 94 rules applied. Total rules applied 94 place count 160 transition count 327
Discarding 25 places :
Symmetric choice reduction at 1 with 25 rule applications. Total rules 119 place count 135 transition count 277
Iterating global reduction 1 with 25 rules applied. Total rules applied 144 place count 135 transition count 277
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 146 place count 135 transition count 275
Applied a total of 146 rules in 4 ms. Remains 135 /254 variables (removed 119) and now considering 275/327 (removed 52) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 135/254 places, 275/327 transitions.
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:29:47] [INFO ] Input system was already deterministic with 275 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 327/327 transitions.
Reduce places removed 87 places and 0 transitions.
Iterating post reduction 0 with 87 rules applied. Total rules applied 87 place count 167 transition count 327
Discarding 21 places :
Symmetric choice reduction at 1 with 21 rule applications. Total rules 108 place count 146 transition count 285
Iterating global reduction 1 with 21 rules applied. Total rules applied 129 place count 146 transition count 285
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 130 place count 146 transition count 284
Applied a total of 130 rules in 5 ms. Remains 146 /254 variables (removed 108) and now considering 284/327 (removed 43) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 146/254 places, 284/327 transitions.
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:29:47] [INFO ] Input system was already deterministic with 284 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 254/254 places, 327/327 transitions.
Graph (trivial) has 310 edges and 254 vertex of which 140 / 254 are part of one of the 17 SCC in 3 ms
Free SCC test removed 123 places
Ensure Unique test removed 283 transitions
Reduce isomorphic transitions removed 283 transitions.
Graph (complete) has 162 edges and 131 vertex of which 32 are kept as prefixes of interest. Removing 99 places using SCC suffix rule.1 ms
Discarding 99 places :
Also discarding 0 output transitions
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 32 transition count 43
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 4 place count 31 transition count 43
Discarding 14 places :
Symmetric choice reduction at 2 with 14 rule applications. Total rules 18 place count 17 transition count 28
Iterating global reduction 2 with 14 rules applied. Total rules applied 32 place count 17 transition count 28
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 33 place count 17 transition count 27
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 34 place count 17 transition count 27
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 35 place count 16 transition count 26
Iterating global reduction 2 with 1 rules applied. Total rules applied 36 place count 16 transition count 26
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 37 place count 16 transition count 25
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 38 place count 16 transition count 24
Applied a total of 38 rules in 17 ms. Remains 16 /254 variables (removed 238) and now considering 24/327 (removed 303) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 16/254 places, 24/327 transitions.
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 1 ms
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 0 ms
[2023-03-08 12:29:47] [INFO ] Input system was already deterministic with 24 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 254/254 places, 327/327 transitions.
Graph (trivial) has 307 edges and 254 vertex of which 136 / 254 are part of one of the 17 SCC in 1 ms
Free SCC test removed 119 places
Ensure Unique test removed 275 transitions
Reduce isomorphic transitions removed 275 transitions.
Graph (complete) has 170 edges and 135 vertex of which 37 are kept as prefixes of interest. Removing 98 places using SCC suffix rule.1 ms
Discarding 98 places :
Also discarding 0 output transitions
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 37 transition count 51
Reduce places removed 1 places and 0 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 1 with 3 rules applied. Total rules applied 6 place count 36 transition count 49
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 8 place count 34 transition count 49
Discarding 13 places :
Symmetric choice reduction at 3 with 13 rule applications. Total rules 21 place count 21 transition count 35
Iterating global reduction 3 with 13 rules applied. Total rules applied 34 place count 21 transition count 35
Drop transitions removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 3 with 3 rules applied. Total rules applied 37 place count 21 transition count 32
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 38 place count 21 transition count 32
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 39 place count 20 transition count 31
Iterating global reduction 3 with 1 rules applied. Total rules applied 40 place count 20 transition count 31
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 41 place count 20 transition count 30
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 4 with 1 rules applied. Total rules applied 42 place count 20 transition count 29
Applied a total of 42 rules in 12 ms. Remains 20 /254 variables (removed 234) and now considering 29/327 (removed 298) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 20/254 places, 29/327 transitions.
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 1 ms
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 0 ms
[2023-03-08 12:29:47] [INFO ] Input system was already deterministic with 29 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 327/327 transitions.
Reduce places removed 90 places and 0 transitions.
Iterating post reduction 0 with 90 rules applied. Total rules applied 90 place count 164 transition count 327
Discarding 22 places :
Symmetric choice reduction at 1 with 22 rule applications. Total rules 112 place count 142 transition count 283
Iterating global reduction 1 with 22 rules applied. Total rules applied 134 place count 142 transition count 283
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 136 place count 142 transition count 281
Applied a total of 136 rules in 5 ms. Remains 142 /254 variables (removed 112) and now considering 281/327 (removed 46) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 142/254 places, 281/327 transitions.
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:29:47] [INFO ] Input system was already deterministic with 281 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 327/327 transitions.
Reduce places removed 91 places and 0 transitions.
Iterating post reduction 0 with 91 rules applied. Total rules applied 91 place count 163 transition count 327
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 111 place count 143 transition count 287
Iterating global reduction 1 with 20 rules applied. Total rules applied 131 place count 143 transition count 287
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 133 place count 143 transition count 285
Applied a total of 133 rules in 11 ms. Remains 143 /254 variables (removed 111) and now considering 285/327 (removed 42) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 143/254 places, 285/327 transitions.
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:29:47] [INFO ] Input system was already deterministic with 285 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 254/254 places, 327/327 transitions.
Graph (trivial) has 320 edges and 254 vertex of which 149 / 254 are part of one of the 17 SCC in 0 ms
Free SCC test removed 132 places
Ensure Unique test removed 303 transitions
Reduce isomorphic transitions removed 303 transitions.
Graph (complete) has 142 edges and 122 vertex of which 22 are kept as prefixes of interest. Removing 100 places using SCC suffix rule.1 ms
Discarding 100 places :
Also discarding 0 output transitions
Discarding 14 places :
Symmetric choice reduction at 0 with 14 rule applications. Total rules 16 place count 8 transition count 10
Iterating global reduction 0 with 14 rules applied. Total rules applied 30 place count 8 transition count 10
Applied a total of 30 rules in 4 ms. Remains 8 /254 variables (removed 246) and now considering 10/327 (removed 317) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 8/254 places, 10/327 transitions.
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 1 ms
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 0 ms
[2023-03-08 12:29:47] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 254/254 places, 327/327 transitions.
Graph (trivial) has 295 edges and 254 vertex of which 127 / 254 are part of one of the 17 SCC in 1 ms
Free SCC test removed 110 places
Ensure Unique test removed 255 transitions
Reduce isomorphic transitions removed 255 transitions.
Graph (complete) has 190 edges and 144 vertex of which 48 are kept as prefixes of interest. Removing 96 places using SCC suffix rule.0 ms
Discarding 96 places :
Also discarding 0 output transitions
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 48 transition count 70
Reduce places removed 2 places and 0 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 1 with 4 rules applied. Total rules applied 8 place count 46 transition count 68
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 10 place count 44 transition count 68
Discarding 12 places :
Symmetric choice reduction at 3 with 12 rule applications. Total rules 22 place count 32 transition count 54
Iterating global reduction 3 with 12 rules applied. Total rules applied 34 place count 32 transition count 54
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 3 with 2 rules applied. Total rules applied 36 place count 32 transition count 52
Reduce places removed 1 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 4 with 2 rules applied. Total rules applied 38 place count 31 transition count 51
Drop transitions removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 5 with 3 rules applied. Total rules applied 41 place count 31 transition count 48
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 5 with 1 rules applied. Total rules applied 42 place count 31 transition count 48
Discarding 1 places :
Symmetric choice reduction at 5 with 1 rule applications. Total rules 43 place count 30 transition count 47
Iterating global reduction 5 with 1 rules applied. Total rules applied 44 place count 30 transition count 47
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 45 place count 30 transition count 46
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 6 with 1 rules applied. Total rules applied 46 place count 30 transition count 45
Applied a total of 46 rules in 15 ms. Remains 30 /254 variables (removed 224) and now considering 45/327 (removed 282) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 15 ms. Remains : 30/254 places, 45/327 transitions.
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 1 ms
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 1 ms
[2023-03-08 12:29:47] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 327/327 transitions.
Reduce places removed 91 places and 0 transitions.
Iterating post reduction 0 with 91 rules applied. Total rules applied 91 place count 163 transition count 327
Discarding 27 places :
Symmetric choice reduction at 1 with 27 rule applications. Total rules 118 place count 136 transition count 273
Iterating global reduction 1 with 27 rules applied. Total rules applied 145 place count 136 transition count 273
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 147 place count 136 transition count 271
Applied a total of 147 rules in 4 ms. Remains 136 /254 variables (removed 118) and now considering 271/327 (removed 56) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 136/254 places, 271/327 transitions.
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 5 ms
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:29:47] [INFO ] Input system was already deterministic with 271 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 327/327 transitions.
Reduce places removed 92 places and 0 transitions.
Iterating post reduction 0 with 92 rules applied. Total rules applied 92 place count 162 transition count 327
Discarding 21 places :
Symmetric choice reduction at 1 with 21 rule applications. Total rules 113 place count 141 transition count 285
Iterating global reduction 1 with 21 rules applied. Total rules applied 134 place count 141 transition count 285
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 135 place count 141 transition count 284
Applied a total of 135 rules in 4 ms. Remains 141 /254 variables (removed 113) and now considering 284/327 (removed 43) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 141/254 places, 284/327 transitions.
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:29:47] [INFO ] Input system was already deterministic with 284 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 327/327 transitions.
Reduce places removed 101 places and 0 transitions.
Iterating post reduction 0 with 101 rules applied. Total rules applied 101 place count 153 transition count 327
Discarding 27 places :
Symmetric choice reduction at 1 with 27 rule applications. Total rules 128 place count 126 transition count 273
Iterating global reduction 1 with 27 rules applied. Total rules applied 155 place count 126 transition count 273
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 157 place count 126 transition count 271
Applied a total of 157 rules in 5 ms. Remains 126 /254 variables (removed 128) and now considering 271/327 (removed 56) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 126/254 places, 271/327 transitions.
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 5 ms
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 5 ms
[2023-03-08 12:29:47] [INFO ] Input system was already deterministic with 271 transitions.
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 9 ms
[2023-03-08 12:29:47] [INFO ] Flatten gal took : 9 ms
[2023-03-08 12:29:47] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-03-08 12:29:47] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 254 places, 327 transitions and 772 arcs took 1 ms.
Total runtime 3168 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DLCround-PT-12a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA DLCround-PT-12a-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-12a-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678279149693

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 56 (type SKEL/SRCH) for 9 DLCround-PT-12a-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 56 (type SKEL/SRCH) for DLCround-PT-12a-CTLFireability-03
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 57 (type EXCL) for 9 DLCround-PT-12a-CTLFireability-03
lola: time limit : 133 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 57 (type EXCL) for DLCround-PT-12a-CTLFireability-03
lola: result : true
lola: markings : 8
lola: fired transitions : 113
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 DLCround-PT-12a-CTLFireability-02
lola: time limit : 144 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 59 (type FNDP) for 37 DLCround-PT-12a-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type EQUN) for 37 DLCround-PT-12a-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type SRCH) for 37 DLCround-PT-12a-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 62 (type SRCH) for DLCround-PT-12a-CTLFireability-11
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 59 (type FNDP) for DLCround-PT-12a-CTLFireability-11
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 60 (type EQUN) for DLCround-PT-12a-CTLFireability-11 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 60 (type EQUN) for DLCround-PT-12a-CTLFireability-11
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-12a-CTLFireability-03: CONJ false tscc_search

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-12a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
DLCround-PT-12a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-CTLFireability-11: DISJ 0 1 0 0 4 0 0 5
DLCround-PT-12a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/240 4/32 DLCround-PT-12a-CTLFireability-02 740819 m, 148163 m/sec, 3872081 t fired, .

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54 CTL EXCL 35/253 20/32 DLCround-PT-12a-CTLFireability-15 4248389 m, 106476 m/sec, 26048433 t fired, .

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54 CTL EXCL 40/253 22/32 DLCround-PT-12a-CTLFireability-15 4867067 m, 123735 m/sec, 29661050 t fired, .

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54 CTL EXCL 50/253 28/32 DLCround-PT-12a-CTLFireability-15 6098636 m, 123285 m/sec, 36695547 t fired, .

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54 CTL EXCL 55/253 30/32 DLCround-PT-12a-CTLFireability-15 6680327 m, 116338 m/sec, 40595297 t fired, .

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32 CTL EXCL 20/339 10/32 DLCround-PT-12a-CTLFireability-09 2091316 m, 101025 m/sec, 10682209 t fired, .

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32 CTL EXCL 40/339 18/32 DLCround-PT-12a-CTLFireability-09 4019491 m, 98987 m/sec, 20919093 t fired, .

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32 CTL EXCL 50/339 22/32 DLCround-PT-12a-CTLFireability-09 4984112 m, 88905 m/sec, 25844601 t fired, .

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lola: FINISHED task # 29 (type EXCL) for DLCround-PT-12a-CTLFireability-08
lola: result : true
lola: markings : 145
lola: fired transitions : 4917
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 45 (type EXCL) for 44 DLCround-PT-12a-CTLFireability-12
lola: time limit : 3039 sec
lola: memory limit: 32 pages
lola: FINISHED task # 45 (type EXCL) for DLCround-PT-12a-CTLFireability-12
lola: result : true
lola: markings : 3601
lola: fired transitions : 91952
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-12a-CTLFireability-00: CTL unknown AGGR
DLCround-PT-12a-CTLFireability-01: CTL unknown AGGR
DLCround-PT-12a-CTLFireability-02: CTL unknown AGGR
DLCround-PT-12a-CTLFireability-03: CONJ false tscc_search
DLCround-PT-12a-CTLFireability-04: CTL unknown AGGR
DLCround-PT-12a-CTLFireability-05: CTL true CTL model checker
DLCround-PT-12a-CTLFireability-06: CTL unknown AGGR
DLCround-PT-12a-CTLFireability-07: CTL false CTL model checker
DLCround-PT-12a-CTLFireability-08: CTL true CTL model checker
DLCround-PT-12a-CTLFireability-09: CTL unknown AGGR
DLCround-PT-12a-CTLFireability-10: CTL false CTL model checker
DLCround-PT-12a-CTLFireability-11: DISJ true tscc_search
DLCround-PT-12a-CTLFireability-12: CTL true CTL model checker
DLCround-PT-12a-CTLFireability-13: CTL unknown AGGR
DLCround-PT-12a-CTLFireability-14: CTL unknown AGGR
DLCround-PT-12a-CTLFireability-15: CTL unknown AGGR


Time elapsed: 561 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-12a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DLCround-PT-12a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r103-tall-167814478700762"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-12a.tgz
mv DLCround-PT-12a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;