Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478700737.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DLCround-PT-10b, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478700737
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.9M
-rw-r--r-- 1 mcc users 5.4K Feb 25 18:52 CTLCardinality.txt
-rw-r--r-- 1 mcc users 52K Feb 25 18:52 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 25 18:52 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Feb 25 18:52 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 15:53 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 25 15:53 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:53 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 15:53 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.9K Feb 25 18:53 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 103K Feb 25 18:53 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.3K Feb 25 18:53 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 80K Feb 25 18:53 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 1.5M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-10b-CTLCardinality-00
FORMULA_NAME DLCround-PT-10b-CTLCardinality-01
FORMULA_NAME DLCround-PT-10b-CTLCardinality-02
FORMULA_NAME DLCround-PT-10b-CTLCardinality-03
FORMULA_NAME DLCround-PT-10b-CTLCardinality-04
FORMULA_NAME DLCround-PT-10b-CTLCardinality-05
FORMULA_NAME DLCround-PT-10b-CTLCardinality-06
FORMULA_NAME DLCround-PT-10b-CTLCardinality-07
FORMULA_NAME DLCround-PT-10b-CTLCardinality-08
FORMULA_NAME DLCround-PT-10b-CTLCardinality-09
FORMULA_NAME DLCround-PT-10b-CTLCardinality-10
FORMULA_NAME DLCround-PT-10b-CTLCardinality-11
FORMULA_NAME DLCround-PT-10b-CTLCardinality-12
FORMULA_NAME DLCround-PT-10b-CTLCardinality-13
FORMULA_NAME DLCround-PT-10b-CTLCardinality-14
FORMULA_NAME DLCround-PT-10b-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678277609812

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-10b
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 12:13:31] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-08 12:13:31] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 12:13:31] [INFO ] Load time of PNML (sax parser for PT used): 193 ms
[2023-03-08 12:13:31] [INFO ] Transformed 3924 places.
[2023-03-08 12:13:31] [INFO ] Transformed 6192 transitions.
[2023-03-08 12:13:31] [INFO ] Found NUPN structural information;
[2023-03-08 12:13:31] [INFO ] Parsed PT model containing 3924 places and 6192 transitions and 17304 arcs in 336 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 11 ms.
Support contains 85 out of 3924 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 3924/3924 places, 6192/6192 transitions.
Discarding 673 places :
Symmetric choice reduction at 0 with 673 rule applications. Total rules 673 place count 3251 transition count 5519
Iterating global reduction 0 with 673 rules applied. Total rules applied 1346 place count 3251 transition count 5519
Discarding 534 places :
Symmetric choice reduction at 0 with 534 rule applications. Total rules 1880 place count 2717 transition count 4985
Iterating global reduction 0 with 534 rules applied. Total rules applied 2414 place count 2717 transition count 4985
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 0 with 11 rules applied. Total rules applied 2425 place count 2717 transition count 4974
Discarding 58 places :
Symmetric choice reduction at 1 with 58 rule applications. Total rules 2483 place count 2659 transition count 4822
Iterating global reduction 1 with 58 rules applied. Total rules applied 2541 place count 2659 transition count 4822
Discarding 32 places :
Symmetric choice reduction at 1 with 32 rule applications. Total rules 2573 place count 2627 transition count 4790
Iterating global reduction 1 with 32 rules applied. Total rules applied 2605 place count 2627 transition count 4790
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 2608 place count 2627 transition count 4787
Discarding 16 places :
Symmetric choice reduction at 2 with 16 rule applications. Total rules 2624 place count 2611 transition count 4771
Iterating global reduction 2 with 16 rules applied. Total rules applied 2640 place count 2611 transition count 4771
Discarding 16 places :
Symmetric choice reduction at 2 with 16 rule applications. Total rules 2656 place count 2595 transition count 4755
Iterating global reduction 2 with 16 rules applied. Total rules applied 2672 place count 2595 transition count 4755
Discarding 15 places :
Symmetric choice reduction at 2 with 15 rule applications. Total rules 2687 place count 2580 transition count 4740
Iterating global reduction 2 with 15 rules applied. Total rules applied 2702 place count 2580 transition count 4740
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 2709 place count 2573 transition count 4733
Iterating global reduction 2 with 7 rules applied. Total rules applied 2716 place count 2573 transition count 4733
Discarding 5 places :
Symmetric choice reduction at 2 with 5 rule applications. Total rules 2721 place count 2568 transition count 4728
Iterating global reduction 2 with 5 rules applied. Total rules applied 2726 place count 2568 transition count 4728
Discarding 5 places :
Symmetric choice reduction at 2 with 5 rule applications. Total rules 2731 place count 2563 transition count 4723
Iterating global reduction 2 with 5 rules applied. Total rules applied 2736 place count 2563 transition count 4723
Applied a total of 2736 rules in 1855 ms. Remains 2563 /3924 variables (removed 1361) and now considering 4723/6192 (removed 1469) transitions.
// Phase 1: matrix 4723 rows 2563 cols
[2023-03-08 12:13:33] [INFO ] Computed 213 place invariants in 40 ms
[2023-03-08 12:13:34] [INFO ] Implicit Places using invariants in 940 ms returned []
[2023-03-08 12:13:34] [INFO ] Invariant cache hit.
[2023-03-08 12:13:35] [INFO ] Implicit Places using invariants and state equation in 1204 ms returned []
Implicit Place search using SMT with State Equation took 2169 ms to find 0 implicit places.
[2023-03-08 12:13:35] [INFO ] Invariant cache hit.
[2023-03-08 12:13:37] [INFO ] Dead Transitions using invariants and state equation in 2102 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 2563/3924 places, 4723/6192 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6131 ms. Remains : 2563/3924 places, 4723/6192 transitions.
Support contains 85 out of 2563 places after structural reductions.
[2023-03-08 12:13:38] [INFO ] Flatten gal took : 244 ms
[2023-03-08 12:13:38] [INFO ] Flatten gal took : 152 ms
[2023-03-08 12:13:38] [INFO ] Input system was already deterministic with 4723 transitions.
FORMULA DLCround-PT-10b-CTLCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 449 ms. (steps per millisecond=22 ) properties (out of 44) seen :33
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 11) seen :0
Running SMT prover for 11 properties.
[2023-03-08 12:13:39] [INFO ] Invariant cache hit.
[2023-03-08 12:13:40] [INFO ] After 682ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:11
[2023-03-08 12:13:41] [INFO ] [Nat]Absence check using 213 positive place invariants in 162 ms returned sat
[2023-03-08 12:13:44] [INFO ] After 2633ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :11
[2023-03-08 12:13:46] [INFO ] Deduced a trap composed of 97 places in 734 ms of which 7 ms to minimize.
[2023-03-08 12:13:47] [INFO ] Deduced a trap composed of 97 places in 739 ms of which 2 ms to minimize.
[2023-03-08 12:13:47] [INFO ] Deduced a trap composed of 148 places in 622 ms of which 1 ms to minimize.
[2023-03-08 12:13:48] [INFO ] Trap strengthening (SAT) tested/added 4/3 trap constraints in 2561 ms
[2023-03-08 12:13:49] [INFO ] After 7615ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :11
Attempting to minimize the solution found.
Minimization took 1213 ms.
[2023-03-08 12:13:50] [INFO ] After 10006ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :11
Fused 11 Parikh solutions to 10 different solutions.
Parikh walk visited 10 properties in 272 ms.
Support contains 2 out of 2563 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 2563/2563 places, 4723/4723 transitions.
Graph (trivial) has 2252 edges and 2563 vertex of which 592 / 2563 are part of one of the 48 SCC in 8 ms
Free SCC test removed 544 places
Drop transitions removed 618 transitions
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 632 transitions.
Drop transitions removed 426 transitions
Trivial Post-agglo rules discarded 426 transitions
Performed 426 trivial Post agglomeration. Transition count delta: 426
Iterating post reduction 0 with 426 rules applied. Total rules applied 427 place count 2019 transition count 3665
Reduce places removed 426 places and 0 transitions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Drop transitions removed 31 transitions
Trivial Post-agglo rules discarded 31 transitions
Performed 31 trivial Post agglomeration. Transition count delta: 31
Iterating post reduction 1 with 473 rules applied. Total rules applied 900 place count 1593 transition count 3618
Reduce places removed 31 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 33 rules applied. Total rules applied 933 place count 1562 transition count 3616
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 934 place count 1561 transition count 3616
Performed 199 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 199 Pre rules applied. Total rules applied 934 place count 1561 transition count 3417
Deduced a syphon composed of 199 places in 14 ms
Reduce places removed 199 places and 0 transitions.
Iterating global reduction 4 with 398 rules applied. Total rules applied 1332 place count 1362 transition count 3417
Discarding 106 places :
Symmetric choice reduction at 4 with 106 rule applications. Total rules 1438 place count 1256 transition count 2725
Iterating global reduction 4 with 106 rules applied. Total rules applied 1544 place count 1256 transition count 2725
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 4 with 4 rules applied. Total rules applied 1548 place count 1256 transition count 2721
Performed 26 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 26 Pre rules applied. Total rules applied 1548 place count 1256 transition count 2695
Deduced a syphon composed of 26 places in 13 ms
Reduce places removed 26 places and 0 transitions.
Iterating global reduction 5 with 52 rules applied. Total rules applied 1600 place count 1230 transition count 2695
Discarding 2 places :
Symmetric choice reduction at 5 with 2 rule applications. Total rules 1602 place count 1228 transition count 2670
Iterating global reduction 5 with 2 rules applied. Total rules applied 1604 place count 1228 transition count 2670
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 1605 place count 1228 transition count 2669
Performed 463 Post agglomeration using F-continuation condition with reduction of 9 identical transitions.
Deduced a syphon composed of 463 places in 1 ms
Reduce places removed 463 places and 0 transitions.
Iterating global reduction 6 with 926 rules applied. Total rules applied 2531 place count 765 transition count 2197
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 6 with 11 rules applied. Total rules applied 2542 place count 765 transition count 2186
Renaming transitions due to excessive name length > 1024 char.
Discarding 29 places :
Symmetric choice reduction at 7 with 29 rule applications. Total rules 2571 place count 736 transition count 1789
Iterating global reduction 7 with 29 rules applied. Total rules applied 2600 place count 736 transition count 1789
Ensure Unique test removed 27 transitions
Reduce isomorphic transitions removed 27 transitions.
Iterating post reduction 7 with 27 rules applied. Total rules applied 2627 place count 736 transition count 1762
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 8 with 2 rules applied. Total rules applied 2629 place count 735 transition count 1761
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 2630 place count 734 transition count 1747
Iterating global reduction 8 with 1 rules applied. Total rules applied 2631 place count 734 transition count 1747
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 8 with 1 rules applied. Total rules applied 2632 place count 734 transition count 1746
Performed 50 Post agglomeration using F-continuation condition.Transition count delta: -559
Deduced a syphon composed of 50 places in 0 ms
Reduce places removed 50 places and 0 transitions.
Iterating global reduction 9 with 100 rules applied. Total rules applied 2732 place count 684 transition count 2305
Drop transitions removed 30 transitions
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 34 transitions.
Iterating post reduction 9 with 34 rules applied. Total rules applied 2766 place count 684 transition count 2271
Discarding 26 places :
Symmetric choice reduction at 10 with 26 rule applications. Total rules 2792 place count 658 transition count 1554
Iterating global reduction 10 with 26 rules applied. Total rules applied 2818 place count 658 transition count 1554
Ensure Unique test removed 26 transitions
Reduce isomorphic transitions removed 26 transitions.
Iterating post reduction 10 with 26 rules applied. Total rules applied 2844 place count 658 transition count 1528
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -37
Deduced a syphon composed of 4 places in 1 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 11 with 8 rules applied. Total rules applied 2852 place count 654 transition count 1565
Drop transitions removed 179 transitions
Redundant transition composition rules discarded 179 transitions
Iterating global reduction 11 with 179 rules applied. Total rules applied 3031 place count 654 transition count 1386
Discarding 11 places :
Symmetric choice reduction at 11 with 11 rule applications. Total rules 3042 place count 643 transition count 1227
Iterating global reduction 11 with 11 rules applied. Total rules applied 3053 place count 643 transition count 1227
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 11 with 11 rules applied. Total rules applied 3064 place count 643 transition count 1216
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -19
Deduced a syphon composed of 4 places in 1 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 12 with 8 rules applied. Total rules applied 3072 place count 639 transition count 1235
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 12 with 4 rules applied. Total rules applied 3076 place count 639 transition count 1231
Drop transitions removed 19 transitions
Redundant transition composition rules discarded 19 transitions
Iterating global reduction 13 with 19 rules applied. Total rules applied 3095 place count 639 transition count 1212
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -19
Deduced a syphon composed of 4 places in 1 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 13 with 8 rules applied. Total rules applied 3103 place count 635 transition count 1231
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 13 with 4 rules applied. Total rules applied 3107 place count 635 transition count 1227
Drop transitions removed 19 transitions
Redundant transition composition rules discarded 19 transitions
Iterating global reduction 14 with 19 rules applied. Total rules applied 3126 place count 635 transition count 1208
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -19
Deduced a syphon composed of 4 places in 1 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 14 with 8 rules applied. Total rules applied 3134 place count 631 transition count 1227
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 14 with 4 rules applied. Total rules applied 3138 place count 631 transition count 1223
Drop transitions removed 19 transitions
Redundant transition composition rules discarded 19 transitions
Iterating global reduction 15 with 19 rules applied. Total rules applied 3157 place count 631 transition count 1204
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -19
Deduced a syphon composed of 4 places in 1 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 15 with 8 rules applied. Total rules applied 3165 place count 627 transition count 1223
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 15 with 4 rules applied. Total rules applied 3169 place count 627 transition count 1219
Drop transitions removed 19 transitions
Redundant transition composition rules discarded 19 transitions
Iterating global reduction 16 with 19 rules applied. Total rules applied 3188 place count 627 transition count 1200
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -19
Deduced a syphon composed of 4 places in 1 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 16 with 8 rules applied. Total rules applied 3196 place count 623 transition count 1219
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 16 with 4 rules applied. Total rules applied 3200 place count 623 transition count 1215
Drop transitions removed 19 transitions
Redundant transition composition rules discarded 19 transitions
Iterating global reduction 17 with 19 rules applied. Total rules applied 3219 place count 623 transition count 1196
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -19
Deduced a syphon composed of 4 places in 1 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 17 with 8 rules applied. Total rules applied 3227 place count 619 transition count 1215
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 17 with 4 rules applied. Total rules applied 3231 place count 619 transition count 1211
Drop transitions removed 19 transitions
Redundant transition composition rules discarded 19 transitions
Iterating global reduction 18 with 19 rules applied. Total rules applied 3250 place count 619 transition count 1192
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -19
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 18 with 8 rules applied. Total rules applied 3258 place count 615 transition count 1211
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 18 with 4 rules applied. Total rules applied 3262 place count 615 transition count 1207
Drop transitions removed 19 transitions
Redundant transition composition rules discarded 19 transitions
Iterating global reduction 19 with 19 rules applied. Total rules applied 3281 place count 615 transition count 1188
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -19
Deduced a syphon composed of 4 places in 1 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 19 with 8 rules applied. Total rules applied 3289 place count 611 transition count 1207
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 19 with 4 rules applied. Total rules applied 3293 place count 611 transition count 1203
Drop transitions removed 19 transitions
Redundant transition composition rules discarded 19 transitions
Iterating global reduction 20 with 19 rules applied. Total rules applied 3312 place count 611 transition count 1184
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -19
Deduced a syphon composed of 4 places in 1 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 20 with 8 rules applied. Total rules applied 3320 place count 607 transition count 1203
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 20 with 4 rules applied. Total rules applied 3324 place count 607 transition count 1199
Drop transitions removed 19 transitions
Redundant transition composition rules discarded 19 transitions
Iterating global reduction 21 with 19 rules applied. Total rules applied 3343 place count 607 transition count 1180
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -19
Deduced a syphon composed of 4 places in 1 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 21 with 8 rules applied. Total rules applied 3351 place count 603 transition count 1199
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 21 with 4 rules applied. Total rules applied 3355 place count 603 transition count 1195
Drop transitions removed 16 transitions
Redundant transition composition rules discarded 16 transitions
Iterating global reduction 22 with 16 rules applied. Total rules applied 3371 place count 603 transition count 1179
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -14
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 22 with 4 rules applied. Total rules applied 3375 place count 601 transition count 1193
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 22 with 2 rules applied. Total rules applied 3377 place count 601 transition count 1191
Drop transitions removed 14 transitions
Redundant transition composition rules discarded 14 transitions
Iterating global reduction 23 with 14 rules applied. Total rules applied 3391 place count 601 transition count 1177
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -14
Deduced a syphon composed of 2 places in 19 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 23 with 4 rules applied. Total rules applied 3395 place count 599 transition count 1191
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 23 with 2 rules applied. Total rules applied 3397 place count 599 transition count 1189
Drop transitions removed 14 transitions
Redundant transition composition rules discarded 14 transitions
Iterating global reduction 24 with 14 rules applied. Total rules applied 3411 place count 599 transition count 1175
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -14
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 24 with 4 rules applied. Total rules applied 3415 place count 597 transition count 1189
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 24 with 2 rules applied. Total rules applied 3417 place count 597 transition count 1187
Drop transitions removed 14 transitions
Redundant transition composition rules discarded 14 transitions
Iterating global reduction 25 with 14 rules applied. Total rules applied 3431 place count 597 transition count 1173
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -14
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 25 with 4 rules applied. Total rules applied 3435 place count 595 transition count 1187
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 25 with 2 rules applied. Total rules applied 3437 place count 595 transition count 1185
Drop transitions removed 14 transitions
Redundant transition composition rules discarded 14 transitions
Iterating global reduction 26 with 14 rules applied. Total rules applied 3451 place count 595 transition count 1171
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -14
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 26 with 4 rules applied. Total rules applied 3455 place count 593 transition count 1185
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 26 with 2 rules applied. Total rules applied 3457 place count 593 transition count 1183
Drop transitions removed 14 transitions
Redundant transition composition rules discarded 14 transitions
Iterating global reduction 27 with 14 rules applied. Total rules applied 3471 place count 593 transition count 1169
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -14
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 27 with 4 rules applied. Total rules applied 3475 place count 591 transition count 1183
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 27 with 2 rules applied. Total rules applied 3477 place count 591 transition count 1181
Drop transitions removed 14 transitions
Redundant transition composition rules discarded 14 transitions
Iterating global reduction 28 with 14 rules applied. Total rules applied 3491 place count 591 transition count 1167
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -14
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 28 with 4 rules applied. Total rules applied 3495 place count 589 transition count 1181
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 28 with 2 rules applied. Total rules applied 3497 place count 589 transition count 1179
Drop transitions removed 14 transitions
Redundant transition composition rules discarded 14 transitions
Iterating global reduction 29 with 14 rules applied. Total rules applied 3511 place count 589 transition count 1165
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -14
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 29 with 4 rules applied. Total rules applied 3515 place count 587 transition count 1179
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 29 with 2 rules applied. Total rules applied 3517 place count 587 transition count 1177
Drop transitions removed 14 transitions
Redundant transition composition rules discarded 14 transitions
Iterating global reduction 30 with 14 rules applied. Total rules applied 3531 place count 587 transition count 1163
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -14
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 30 with 4 rules applied. Total rules applied 3535 place count 585 transition count 1177
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 30 with 2 rules applied. Total rules applied 3537 place count 585 transition count 1175
Drop transitions removed 14 transitions
Redundant transition composition rules discarded 14 transitions
Iterating global reduction 31 with 14 rules applied. Total rules applied 3551 place count 585 transition count 1161
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -14
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 31 with 4 rules applied. Total rules applied 3555 place count 583 transition count 1175
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 31 with 2 rules applied. Total rules applied 3557 place count 583 transition count 1173
Drop transitions removed 14 transitions
Redundant transition composition rules discarded 14 transitions
Iterating global reduction 32 with 14 rules applied. Total rules applied 3571 place count 583 transition count 1159
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -14
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 32 with 4 rules applied. Total rules applied 3575 place count 581 transition count 1173
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 32 with 2 rules applied. Total rules applied 3577 place count 581 transition count 1171
Drop transitions removed 14 transitions
Redundant transition composition rules discarded 14 transitions
Iterating global reduction 33 with 14 rules applied. Total rules applied 3591 place count 581 transition count 1157
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -14
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 33 with 4 rules applied. Total rules applied 3595 place count 579 transition count 1171
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 33 with 2 rules applied. Total rules applied 3597 place count 579 transition count 1169
Drop transitions removed 14 transitions
Redundant transition composition rules discarded 14 transitions
Iterating global reduction 34 with 14 rules applied. Total rules applied 3611 place count 579 transition count 1155
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -14
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 34 with 4 rules applied. Total rules applied 3615 place count 577 transition count 1169
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 34 with 2 rules applied. Total rules applied 3617 place count 577 transition count 1167
Drop transitions removed 14 transitions
Redundant transition composition rules discarded 14 transitions
Iterating global reduction 35 with 14 rules applied. Total rules applied 3631 place count 577 transition count 1153
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -14
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 35 with 4 rules applied. Total rules applied 3635 place count 575 transition count 1167
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 35 with 2 rules applied. Total rules applied 3637 place count 575 transition count 1165
Drop transitions removed 14 transitions
Redundant transition composition rules discarded 14 transitions
Iterating global reduction 36 with 14 rules applied. Total rules applied 3651 place count 575 transition count 1151
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: -5
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 36 with 2 rules applied. Total rules applied 3653 place count 574 transition count 1156
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 36 with 1 rules applied. Total rules applied 3654 place count 574 transition count 1155
Drop transitions removed 5 transitions
Redundant transition composition rules discarded 5 transitions
Iterating global reduction 37 with 5 rules applied. Total rules applied 3659 place count 574 transition count 1150
Free-agglomeration rule applied 274 times with reduction of 163 identical transitions.
Iterating global reduction 37 with 274 rules applied. Total rules applied 3933 place count 574 transition count 713
Reduce places removed 274 places and 0 transitions.
Drop transitions removed 437 transitions
Reduce isomorphic transitions removed 437 transitions.
Graph (complete) has 637 edges and 300 vertex of which 9 are kept as prefixes of interest. Removing 291 places using SCC suffix rule.1 ms
Discarding 291 places :
Also discarding 218 output transitions
Drop transitions removed 218 transitions
Iterating post reduction 37 with 712 rules applied. Total rules applied 4645 place count 9 transition count 58
Drop transitions removed 31 transitions
Ensure Unique test removed 19 transitions
Reduce isomorphic transitions removed 50 transitions.
Iterating post reduction 38 with 50 rules applied. Total rules applied 4695 place count 9 transition count 8
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 39 with 1 rules applied. Total rules applied 4696 place count 8 transition count 7
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 39 with 2 rules applied. Total rules applied 4698 place count 6 transition count 7
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 40 with 1 Pre rules applied. Total rules applied 4698 place count 6 transition count 6
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 40 with 2 rules applied. Total rules applied 4700 place count 5 transition count 6
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 40 with 2 rules applied. Total rules applied 4702 place count 4 transition count 5
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 40 with 1 rules applied. Total rules applied 4703 place count 4 transition count 4
Applied a total of 4703 rules in 2182 ms. Remains 4 /2563 variables (removed 2559) and now considering 4/4723 (removed 4719) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 2182 ms. Remains : 4/2563 places, 4/4723 transitions.
Finished random walk after 3 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=3 )
[2023-03-08 12:13:52] [INFO ] Flatten gal took : 109 ms
[2023-03-08 12:13:52] [INFO ] Flatten gal took : 112 ms
[2023-03-08 12:13:53] [INFO ] Input system was already deterministic with 4723 transitions.
Computed a total of 456 stabilizing places and 456 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 2563/2563 places, 4723/4723 transitions.
Discarding 50 places :
Symmetric choice reduction at 0 with 50 rule applications. Total rules 50 place count 2513 transition count 4647
Iterating global reduction 0 with 50 rules applied. Total rules applied 100 place count 2513 transition count 4647
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 128 place count 2485 transition count 4592
Iterating global reduction 0 with 28 rules applied. Total rules applied 156 place count 2485 transition count 4592
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 166 place count 2475 transition count 4582
Iterating global reduction 0 with 10 rules applied. Total rules applied 176 place count 2475 transition count 4582
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 177 place count 2475 transition count 4581
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 183 place count 2469 transition count 4575
Iterating global reduction 1 with 6 rules applied. Total rules applied 189 place count 2469 transition count 4575
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 195 place count 2463 transition count 4569
Iterating global reduction 1 with 6 rules applied. Total rules applied 201 place count 2463 transition count 4569
Discarding 4 places :
Symmetric choice reduction at 1 with 4 rule applications. Total rules 205 place count 2459 transition count 4565
Iterating global reduction 1 with 4 rules applied. Total rules applied 209 place count 2459 transition count 4565
Discarding 4 places :
Symmetric choice reduction at 1 with 4 rule applications. Total rules 213 place count 2455 transition count 4561
Iterating global reduction 1 with 4 rules applied. Total rules applied 217 place count 2455 transition count 4561
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 220 place count 2452 transition count 4558
Iterating global reduction 1 with 3 rules applied. Total rules applied 223 place count 2452 transition count 4558
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 226 place count 2449 transition count 4555
Iterating global reduction 1 with 3 rules applied. Total rules applied 229 place count 2449 transition count 4555
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 232 place count 2446 transition count 4552
Iterating global reduction 1 with 3 rules applied. Total rules applied 235 place count 2446 transition count 4552
Applied a total of 235 rules in 1029 ms. Remains 2446 /2563 variables (removed 117) and now considering 4552/4723 (removed 171) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1030 ms. Remains : 2446/2563 places, 4552/4723 transitions.
[2023-03-08 12:13:54] [INFO ] Flatten gal took : 93 ms
[2023-03-08 12:13:54] [INFO ] Flatten gal took : 102 ms
[2023-03-08 12:13:54] [INFO ] Input system was already deterministic with 4552 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2563/2563 places, 4723/4723 transitions.
Graph (trivial) has 2242 edges and 2563 vertex of which 578 / 2563 are part of one of the 49 SCC in 2 ms
Free SCC test removed 529 places
Ensure Unique test removed 566 transitions
Reduce isomorphic transitions removed 566 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 427 transitions
Trivial Post-agglo rules discarded 427 transitions
Performed 427 trivial Post agglomeration. Transition count delta: 427
Iterating post reduction 0 with 427 rules applied. Total rules applied 428 place count 2033 transition count 3729
Reduce places removed 427 places and 0 transitions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Drop transitions removed 31 transitions
Trivial Post-agglo rules discarded 31 transitions
Performed 31 trivial Post agglomeration. Transition count delta: 31
Iterating post reduction 1 with 474 rules applied. Total rules applied 902 place count 1606 transition count 3682
Reduce places removed 31 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 33 rules applied. Total rules applied 935 place count 1575 transition count 3680
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 3 with 2 rules applied. Total rules applied 937 place count 1574 transition count 3679
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 938 place count 1573 transition count 3679
Performed 202 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 202 Pre rules applied. Total rules applied 938 place count 1573 transition count 3477
Deduced a syphon composed of 202 places in 16 ms
Reduce places removed 202 places and 0 transitions.
Iterating global reduction 5 with 404 rules applied. Total rules applied 1342 place count 1371 transition count 3477
Discarding 99 places :
Symmetric choice reduction at 5 with 99 rule applications. Total rules 1441 place count 1272 transition count 2805
Iterating global reduction 5 with 99 rules applied. Total rules applied 1540 place count 1272 transition count 2805
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 5 with 4 rules applied. Total rules applied 1544 place count 1272 transition count 2801
Performed 23 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 6 with 23 Pre rules applied. Total rules applied 1544 place count 1272 transition count 2778
Deduced a syphon composed of 23 places in 13 ms
Reduce places removed 23 places and 0 transitions.
Iterating global reduction 6 with 46 rules applied. Total rules applied 1590 place count 1249 transition count 2778
Discarding 2 places :
Symmetric choice reduction at 6 with 2 rule applications. Total rules 1592 place count 1247 transition count 2753
Iterating global reduction 6 with 2 rules applied. Total rules applied 1594 place count 1247 transition count 2753
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 6 with 1 rules applied. Total rules applied 1595 place count 1247 transition count 2752
Performed 436 Post agglomeration using F-continuation condition.Transition count delta: 436
Deduced a syphon composed of 436 places in 0 ms
Reduce places removed 436 places and 0 transitions.
Iterating global reduction 7 with 872 rules applied. Total rules applied 2467 place count 811 transition count 2316
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 7 with 2 rules applied. Total rules applied 2469 place count 811 transition count 2314
Renaming transitions due to excessive name length > 1024 char.
Discarding 26 places :
Symmetric choice reduction at 8 with 26 rule applications. Total rules 2495 place count 785 transition count 1959
Iterating global reduction 8 with 26 rules applied. Total rules applied 2521 place count 785 transition count 1959
Ensure Unique test removed 22 transitions
Reduce isomorphic transitions removed 22 transitions.
Iterating post reduction 8 with 22 rules applied. Total rules applied 2543 place count 785 transition count 1937
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 9 with 4 rules applied. Total rules applied 2547 place count 783 transition count 1935
Discarding 1 places :
Symmetric choice reduction at 9 with 1 rule applications. Total rules 2548 place count 782 transition count 1921
Iterating global reduction 9 with 1 rules applied. Total rules applied 2549 place count 782 transition count 1921
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 9 with 1 rules applied. Total rules applied 2550 place count 782 transition count 1920
Drop transitions removed 20 transitions
Redundant transition composition rules discarded 20 transitions
Iterating global reduction 10 with 20 rules applied. Total rules applied 2570 place count 782 transition count 1900
Drop transitions removed 9 transitions
Trivial Post-agglo rules discarded 9 transitions
Performed 9 trivial Post agglomeration. Transition count delta: 9
Iterating post reduction 10 with 9 rules applied. Total rules applied 2579 place count 782 transition count 1891
Reduce places removed 9 places and 0 transitions.
Iterating post reduction 11 with 9 rules applied. Total rules applied 2588 place count 773 transition count 1891
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 12 with 1 rules applied. Total rules applied 2589 place count 773 transition count 1891
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 12 with 2 rules applied. Total rules applied 2591 place count 771 transition count 1889
Applied a total of 2591 rules in 521 ms. Remains 771 /2563 variables (removed 1792) and now considering 1889/4723 (removed 2834) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 521 ms. Remains : 771/2563 places, 1889/4723 transitions.
[2023-03-08 12:13:55] [INFO ] Flatten gal took : 49 ms
[2023-03-08 12:13:55] [INFO ] Flatten gal took : 56 ms
[2023-03-08 12:13:55] [INFO ] Input system was already deterministic with 1889 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2563/2563 places, 4723/4723 transitions.
Graph (trivial) has 2252 edges and 2563 vertex of which 586 / 2563 are part of one of the 47 SCC in 1 ms
Free SCC test removed 539 places
Ensure Unique test removed 579 transitions
Reduce isomorphic transitions removed 579 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 428 transitions
Trivial Post-agglo rules discarded 428 transitions
Performed 428 trivial Post agglomeration. Transition count delta: 428
Iterating post reduction 0 with 428 rules applied. Total rules applied 429 place count 2023 transition count 3715
Reduce places removed 428 places and 0 transitions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Drop transitions removed 31 transitions
Trivial Post-agglo rules discarded 31 transitions
Performed 31 trivial Post agglomeration. Transition count delta: 31
Iterating post reduction 1 with 475 rules applied. Total rules applied 904 place count 1595 transition count 3668
Reduce places removed 31 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 33 rules applied. Total rules applied 937 place count 1564 transition count 3666
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 938 place count 1563 transition count 3666
Performed 200 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 200 Pre rules applied. Total rules applied 938 place count 1563 transition count 3466
Deduced a syphon composed of 200 places in 16 ms
Reduce places removed 200 places and 0 transitions.
Iterating global reduction 4 with 400 rules applied. Total rules applied 1338 place count 1363 transition count 3466
Discarding 106 places :
Symmetric choice reduction at 4 with 106 rule applications. Total rules 1444 place count 1257 transition count 2787
Iterating global reduction 4 with 106 rules applied. Total rules applied 1550 place count 1257 transition count 2787
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 4 with 4 rules applied. Total rules applied 1554 place count 1257 transition count 2783
Performed 27 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 27 Pre rules applied. Total rules applied 1554 place count 1257 transition count 2756
Deduced a syphon composed of 27 places in 12 ms
Reduce places removed 27 places and 0 transitions.
Iterating global reduction 5 with 54 rules applied. Total rules applied 1608 place count 1230 transition count 2756
Discarding 2 places :
Symmetric choice reduction at 5 with 2 rule applications. Total rules 1610 place count 1228 transition count 2731
Iterating global reduction 5 with 2 rules applied. Total rules applied 1612 place count 1228 transition count 2731
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 1613 place count 1228 transition count 2730
Performed 430 Post agglomeration using F-continuation condition.Transition count delta: 430
Deduced a syphon composed of 430 places in 0 ms
Reduce places removed 430 places and 0 transitions.
Iterating global reduction 6 with 860 rules applied. Total rules applied 2473 place count 798 transition count 2300
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 6 with 1 rules applied. Total rules applied 2474 place count 798 transition count 2299
Renaming transitions due to excessive name length > 1024 char.
Discarding 30 places :
Symmetric choice reduction at 7 with 30 rule applications. Total rules 2504 place count 768 transition count 1888
Iterating global reduction 7 with 30 rules applied. Total rules applied 2534 place count 768 transition count 1888
Ensure Unique test removed 24 transitions
Reduce isomorphic transitions removed 24 transitions.
Iterating post reduction 7 with 24 rules applied. Total rules applied 2558 place count 768 transition count 1864
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 8 with 2 rules applied. Total rules applied 2560 place count 767 transition count 1863
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 2561 place count 766 transition count 1849
Iterating global reduction 8 with 1 rules applied. Total rules applied 2562 place count 766 transition count 1849
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 8 with 1 rules applied. Total rules applied 2563 place count 766 transition count 1848
Drop transitions removed 22 transitions
Redundant transition composition rules discarded 22 transitions
Iterating global reduction 9 with 22 rules applied. Total rules applied 2585 place count 766 transition count 1826
Drop transitions removed 11 transitions
Trivial Post-agglo rules discarded 11 transitions
Performed 11 trivial Post agglomeration. Transition count delta: 11
Iterating post reduction 9 with 11 rules applied. Total rules applied 2596 place count 766 transition count 1815
Reduce places removed 11 places and 0 transitions.
Iterating post reduction 10 with 11 rules applied. Total rules applied 2607 place count 755 transition count 1815
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 11 with 2 rules applied. Total rules applied 2609 place count 753 transition count 1813
Applied a total of 2609 rules in 399 ms. Remains 753 /2563 variables (removed 1810) and now considering 1813/4723 (removed 2910) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 400 ms. Remains : 753/2563 places, 1813/4723 transitions.
[2023-03-08 12:13:56] [INFO ] Flatten gal took : 39 ms
[2023-03-08 12:13:56] [INFO ] Flatten gal took : 43 ms
[2023-03-08 12:13:56] [INFO ] Input system was already deterministic with 1813 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2563/2563 places, 4723/4723 transitions.
Graph (trivial) has 2243 edges and 2563 vertex of which 552 / 2563 are part of one of the 50 SCC in 1 ms
Free SCC test removed 502 places
Ensure Unique test removed 536 transitions
Reduce isomorphic transitions removed 536 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 440 transitions
Trivial Post-agglo rules discarded 440 transitions
Performed 440 trivial Post agglomeration. Transition count delta: 440
Iterating post reduction 0 with 440 rules applied. Total rules applied 441 place count 2060 transition count 3746
Reduce places removed 440 places and 0 transitions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Drop transitions removed 31 transitions
Trivial Post-agglo rules discarded 31 transitions
Performed 31 trivial Post agglomeration. Transition count delta: 31
Iterating post reduction 1 with 487 rules applied. Total rules applied 928 place count 1620 transition count 3699
Reduce places removed 31 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 33 rules applied. Total rules applied 961 place count 1589 transition count 3697
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 962 place count 1588 transition count 3697
Performed 207 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 207 Pre rules applied. Total rules applied 962 place count 1588 transition count 3490
Deduced a syphon composed of 207 places in 16 ms
Reduce places removed 207 places and 0 transitions.
Iterating global reduction 4 with 414 rules applied. Total rules applied 1376 place count 1381 transition count 3490
Discarding 98 places :
Symmetric choice reduction at 4 with 98 rule applications. Total rules 1474 place count 1283 transition count 2832
Iterating global reduction 4 with 98 rules applied. Total rules applied 1572 place count 1283 transition count 2832
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 4 with 4 rules applied. Total rules applied 1576 place count 1283 transition count 2828
Performed 24 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 24 Pre rules applied. Total rules applied 1576 place count 1283 transition count 2804
Deduced a syphon composed of 24 places in 13 ms
Reduce places removed 24 places and 0 transitions.
Iterating global reduction 5 with 48 rules applied. Total rules applied 1624 place count 1259 transition count 2804
Discarding 3 places :
Symmetric choice reduction at 5 with 3 rule applications. Total rules 1627 place count 1256 transition count 2765
Iterating global reduction 5 with 3 rules applied. Total rules applied 1630 place count 1256 transition count 2765
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 1631 place count 1256 transition count 2764
Performed 438 Post agglomeration using F-continuation condition.Transition count delta: 438
Deduced a syphon composed of 438 places in 1 ms
Reduce places removed 438 places and 0 transitions.
Iterating global reduction 6 with 876 rules applied. Total rules applied 2507 place count 818 transition count 2326
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 6 with 3 rules applied. Total rules applied 2510 place count 818 transition count 2323
Renaming transitions due to excessive name length > 1024 char.
Discarding 26 places :
Symmetric choice reduction at 7 with 26 rule applications. Total rules 2536 place count 792 transition count 1968
Iterating global reduction 7 with 26 rules applied. Total rules applied 2562 place count 792 transition count 1968
Ensure Unique test removed 20 transitions
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 7 with 20 rules applied. Total rules applied 2582 place count 792 transition count 1948
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 8 with 6 rules applied. Total rules applied 2588 place count 789 transition count 1945
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 2589 place count 788 transition count 1931
Iterating global reduction 8 with 1 rules applied. Total rules applied 2590 place count 788 transition count 1931
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 8 with 1 rules applied. Total rules applied 2591 place count 788 transition count 1930
Drop transitions removed 22 transitions
Redundant transition composition rules discarded 22 transitions
Iterating global reduction 9 with 22 rules applied. Total rules applied 2613 place count 788 transition count 1908
Drop transitions removed 11 transitions
Trivial Post-agglo rules discarded 11 transitions
Performed 11 trivial Post agglomeration. Transition count delta: 11
Iterating post reduction 9 with 11 rules applied. Total rules applied 2624 place count 788 transition count 1897
Reduce places removed 11 places and 0 transitions.
Iterating post reduction 10 with 11 rules applied. Total rules applied 2635 place count 777 transition count 1897
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 11 with 2 rules applied. Total rules applied 2637 place count 775 transition count 1895
Applied a total of 2637 rules in 392 ms. Remains 775 /2563 variables (removed 1788) and now considering 1895/4723 (removed 2828) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 393 ms. Remains : 775/2563 places, 1895/4723 transitions.
[2023-03-08 12:13:56] [INFO ] Flatten gal took : 45 ms
[2023-03-08 12:13:56] [INFO ] Flatten gal took : 46 ms
[2023-03-08 12:13:56] [INFO ] Input system was already deterministic with 1895 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2563/2563 places, 4723/4723 transitions.
Discarding 48 places :
Symmetric choice reduction at 0 with 48 rule applications. Total rules 48 place count 2515 transition count 4649
Iterating global reduction 0 with 48 rules applied. Total rules applied 96 place count 2515 transition count 4649
Discarding 26 places :
Symmetric choice reduction at 0 with 26 rule applications. Total rules 122 place count 2489 transition count 4596
Iterating global reduction 0 with 26 rules applied. Total rules applied 148 place count 2489 transition count 4596
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 158 place count 2479 transition count 4586
Iterating global reduction 0 with 10 rules applied. Total rules applied 168 place count 2479 transition count 4586
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 169 place count 2479 transition count 4585
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 175 place count 2473 transition count 4579
Iterating global reduction 1 with 6 rules applied. Total rules applied 181 place count 2473 transition count 4579
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 187 place count 2467 transition count 4573
Iterating global reduction 1 with 6 rules applied. Total rules applied 193 place count 2467 transition count 4573
Discarding 4 places :
Symmetric choice reduction at 1 with 4 rule applications. Total rules 197 place count 2463 transition count 4569
Iterating global reduction 1 with 4 rules applied. Total rules applied 201 place count 2463 transition count 4569
Discarding 4 places :
Symmetric choice reduction at 1 with 4 rule applications. Total rules 205 place count 2459 transition count 4565
Iterating global reduction 1 with 4 rules applied. Total rules applied 209 place count 2459 transition count 4565
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 212 place count 2456 transition count 4562
Iterating global reduction 1 with 3 rules applied. Total rules applied 215 place count 2456 transition count 4562
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 218 place count 2453 transition count 4559
Iterating global reduction 1 with 3 rules applied. Total rules applied 221 place count 2453 transition count 4559
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 224 place count 2450 transition count 4556
Iterating global reduction 1 with 3 rules applied. Total rules applied 227 place count 2450 transition count 4556
Applied a total of 227 rules in 1183 ms. Remains 2450 /2563 variables (removed 113) and now considering 4556/4723 (removed 167) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1185 ms. Remains : 2450/2563 places, 4556/4723 transitions.
[2023-03-08 12:13:58] [INFO ] Flatten gal took : 86 ms
[2023-03-08 12:13:58] [INFO ] Flatten gal took : 90 ms
[2023-03-08 12:13:58] [INFO ] Input system was already deterministic with 4556 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2563/2563 places, 4723/4723 transitions.
Discarding 38 places :
Symmetric choice reduction at 0 with 38 rule applications. Total rules 38 place count 2525 transition count 4659
Iterating global reduction 0 with 38 rules applied. Total rules applied 76 place count 2525 transition count 4659
Discarding 20 places :
Symmetric choice reduction at 0 with 20 rule applications. Total rules 96 place count 2505 transition count 4612
Iterating global reduction 0 with 20 rules applied. Total rules applied 116 place count 2505 transition count 4612
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 123 place count 2498 transition count 4605
Iterating global reduction 0 with 7 rules applied. Total rules applied 130 place count 2498 transition count 4605
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 131 place count 2498 transition count 4604
Discarding 5 places :
Symmetric choice reduction at 1 with 5 rule applications. Total rules 136 place count 2493 transition count 4599
Iterating global reduction 1 with 5 rules applied. Total rules applied 141 place count 2493 transition count 4599
Discarding 5 places :
Symmetric choice reduction at 1 with 5 rule applications. Total rules 146 place count 2488 transition count 4594
Iterating global reduction 1 with 5 rules applied. Total rules applied 151 place count 2488 transition count 4594
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 154 place count 2485 transition count 4591
Iterating global reduction 1 with 3 rules applied. Total rules applied 157 place count 2485 transition count 4591
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 160 place count 2482 transition count 4588
Iterating global reduction 1 with 3 rules applied. Total rules applied 163 place count 2482 transition count 4588
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 165 place count 2480 transition count 4586
Iterating global reduction 1 with 2 rules applied. Total rules applied 167 place count 2480 transition count 4586
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 169 place count 2478 transition count 4584
Iterating global reduction 1 with 2 rules applied. Total rules applied 171 place count 2478 transition count 4584
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 173 place count 2476 transition count 4582
Iterating global reduction 1 with 2 rules applied. Total rules applied 175 place count 2476 transition count 4582
Applied a total of 175 rules in 1129 ms. Remains 2476 /2563 variables (removed 87) and now considering 4582/4723 (removed 141) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1130 ms. Remains : 2476/2563 places, 4582/4723 transitions.
[2023-03-08 12:13:59] [INFO ] Flatten gal took : 74 ms
[2023-03-08 12:13:59] [INFO ] Flatten gal took : 82 ms
[2023-03-08 12:13:59] [INFO ] Input system was already deterministic with 4582 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2563/2563 places, 4723/4723 transitions.
Discarding 48 places :
Symmetric choice reduction at 0 with 48 rule applications. Total rules 48 place count 2515 transition count 4649
Iterating global reduction 0 with 48 rules applied. Total rules applied 96 place count 2515 transition count 4649
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 124 place count 2487 transition count 4594
Iterating global reduction 0 with 28 rules applied. Total rules applied 152 place count 2487 transition count 4594
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 162 place count 2477 transition count 4584
Iterating global reduction 0 with 10 rules applied. Total rules applied 172 place count 2477 transition count 4584
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 173 place count 2477 transition count 4583
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 179 place count 2471 transition count 4577
Iterating global reduction 1 with 6 rules applied. Total rules applied 185 place count 2471 transition count 4577
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 191 place count 2465 transition count 4571
Iterating global reduction 1 with 6 rules applied. Total rules applied 197 place count 2465 transition count 4571
Discarding 4 places :
Symmetric choice reduction at 1 with 4 rule applications. Total rules 201 place count 2461 transition count 4567
Iterating global reduction 1 with 4 rules applied. Total rules applied 205 place count 2461 transition count 4567
Discarding 4 places :
Symmetric choice reduction at 1 with 4 rule applications. Total rules 209 place count 2457 transition count 4563
Iterating global reduction 1 with 4 rules applied. Total rules applied 213 place count 2457 transition count 4563
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 216 place count 2454 transition count 4560
Iterating global reduction 1 with 3 rules applied. Total rules applied 219 place count 2454 transition count 4560
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 222 place count 2451 transition count 4557
Iterating global reduction 1 with 3 rules applied. Total rules applied 225 place count 2451 transition count 4557
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 228 place count 2448 transition count 4554
Iterating global reduction 1 with 3 rules applied. Total rules applied 231 place count 2448 transition count 4554
Applied a total of 231 rules in 1124 ms. Remains 2448 /2563 variables (removed 115) and now considering 4554/4723 (removed 169) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1124 ms. Remains : 2448/2563 places, 4554/4723 transitions.
[2023-03-08 12:14:01] [INFO ] Flatten gal took : 77 ms
[2023-03-08 12:14:01] [INFO ] Flatten gal took : 79 ms
[2023-03-08 12:14:01] [INFO ] Input system was already deterministic with 4554 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2563/2563 places, 4723/4723 transitions.
Graph (trivial) has 2252 edges and 2563 vertex of which 592 / 2563 are part of one of the 48 SCC in 1 ms
Free SCC test removed 544 places
Ensure Unique test removed 584 transitions
Reduce isomorphic transitions removed 584 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 426 transitions
Trivial Post-agglo rules discarded 426 transitions
Performed 426 trivial Post agglomeration. Transition count delta: 426
Iterating post reduction 0 with 426 rules applied. Total rules applied 427 place count 2018 transition count 3712
Reduce places removed 426 places and 0 transitions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Drop transitions removed 31 transitions
Trivial Post-agglo rules discarded 31 transitions
Performed 31 trivial Post agglomeration. Transition count delta: 31
Iterating post reduction 1 with 473 rules applied. Total rules applied 900 place count 1592 transition count 3665
Reduce places removed 31 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 33 rules applied. Total rules applied 933 place count 1561 transition count 3663
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 934 place count 1560 transition count 3663
Performed 199 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 199 Pre rules applied. Total rules applied 934 place count 1560 transition count 3464
Deduced a syphon composed of 199 places in 16 ms
Reduce places removed 199 places and 0 transitions.
Iterating global reduction 4 with 398 rules applied. Total rules applied 1332 place count 1361 transition count 3464
Discarding 106 places :
Symmetric choice reduction at 4 with 106 rule applications. Total rules 1438 place count 1255 transition count 2772
Iterating global reduction 4 with 106 rules applied. Total rules applied 1544 place count 1255 transition count 2772
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 4 with 4 rules applied. Total rules applied 1548 place count 1255 transition count 2768
Performed 26 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 26 Pre rules applied. Total rules applied 1548 place count 1255 transition count 2742
Deduced a syphon composed of 26 places in 12 ms
Reduce places removed 26 places and 0 transitions.
Iterating global reduction 5 with 52 rules applied. Total rules applied 1600 place count 1229 transition count 2742
Discarding 2 places :
Symmetric choice reduction at 5 with 2 rule applications. Total rules 1602 place count 1227 transition count 2717
Iterating global reduction 5 with 2 rules applied. Total rules applied 1604 place count 1227 transition count 2717
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 1605 place count 1227 transition count 2716
Performed 428 Post agglomeration using F-continuation condition.Transition count delta: 428
Deduced a syphon composed of 428 places in 1 ms
Reduce places removed 428 places and 0 transitions.
Iterating global reduction 6 with 856 rules applied. Total rules applied 2461 place count 799 transition count 2288
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 6 with 1 rules applied. Total rules applied 2462 place count 799 transition count 2287
Renaming transitions due to excessive name length > 1024 char.
Discarding 29 places :
Symmetric choice reduction at 7 with 29 rule applications. Total rules 2491 place count 770 transition count 1890
Iterating global reduction 7 with 29 rules applied. Total rules applied 2520 place count 770 transition count 1890
Ensure Unique test removed 24 transitions
Reduce isomorphic transitions removed 24 transitions.
Iterating post reduction 7 with 24 rules applied. Total rules applied 2544 place count 770 transition count 1866
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 8 with 2 rules applied. Total rules applied 2546 place count 769 transition count 1865
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 2547 place count 768 transition count 1851
Iterating global reduction 8 with 1 rules applied. Total rules applied 2548 place count 768 transition count 1851
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 8 with 1 rules applied. Total rules applied 2549 place count 768 transition count 1850
Drop transitions removed 22 transitions
Redundant transition composition rules discarded 22 transitions
Iterating global reduction 9 with 22 rules applied. Total rules applied 2571 place count 768 transition count 1828
Drop transitions removed 11 transitions
Trivial Post-agglo rules discarded 11 transitions
Performed 11 trivial Post agglomeration. Transition count delta: 11
Iterating post reduction 9 with 11 rules applied. Total rules applied 2582 place count 768 transition count 1817
Reduce places removed 11 places and 0 transitions.
Iterating post reduction 10 with 11 rules applied. Total rules applied 2593 place count 757 transition count 1817
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 11 with 2 rules applied. Total rules applied 2595 place count 755 transition count 1815
Applied a total of 2595 rules in 367 ms. Remains 755 /2563 variables (removed 1808) and now considering 1815/4723 (removed 2908) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 368 ms. Remains : 755/2563 places, 1815/4723 transitions.
[2023-03-08 12:14:01] [INFO ] Flatten gal took : 37 ms
[2023-03-08 12:14:01] [INFO ] Flatten gal took : 40 ms
[2023-03-08 12:14:01] [INFO ] Input system was already deterministic with 1815 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2563/2563 places, 4723/4723 transitions.
Discarding 46 places :
Symmetric choice reduction at 0 with 46 rule applications. Total rules 46 place count 2517 transition count 4651
Iterating global reduction 0 with 46 rules applied. Total rules applied 92 place count 2517 transition count 4651
Discarding 25 places :
Symmetric choice reduction at 0 with 25 rule applications. Total rules 117 place count 2492 transition count 4599
Iterating global reduction 0 with 25 rules applied. Total rules applied 142 place count 2492 transition count 4599
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 149 place count 2485 transition count 4592
Iterating global reduction 0 with 7 rules applied. Total rules applied 156 place count 2485 transition count 4592
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 157 place count 2485 transition count 4591
Discarding 4 places :
Symmetric choice reduction at 1 with 4 rule applications. Total rules 161 place count 2481 transition count 4587
Iterating global reduction 1 with 4 rules applied. Total rules applied 165 place count 2481 transition count 4587
Discarding 4 places :
Symmetric choice reduction at 1 with 4 rule applications. Total rules 169 place count 2477 transition count 4583
Iterating global reduction 1 with 4 rules applied. Total rules applied 173 place count 2477 transition count 4583
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 176 place count 2474 transition count 4580
Iterating global reduction 1 with 3 rules applied. Total rules applied 179 place count 2474 transition count 4580
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 182 place count 2471 transition count 4577
Iterating global reduction 1 with 3 rules applied. Total rules applied 185 place count 2471 transition count 4577
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 187 place count 2469 transition count 4575
Iterating global reduction 1 with 2 rules applied. Total rules applied 189 place count 2469 transition count 4575
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 191 place count 2467 transition count 4573
Iterating global reduction 1 with 2 rules applied. Total rules applied 193 place count 2467 transition count 4573
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 195 place count 2465 transition count 4571
Iterating global reduction 1 with 2 rules applied. Total rules applied 197 place count 2465 transition count 4571
Applied a total of 197 rules in 1146 ms. Remains 2465 /2563 variables (removed 98) and now considering 4571/4723 (removed 152) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1147 ms. Remains : 2465/2563 places, 4571/4723 transitions.
[2023-03-08 12:14:03] [INFO ] Flatten gal took : 80 ms
[2023-03-08 12:14:03] [INFO ] Flatten gal took : 91 ms
[2023-03-08 12:14:03] [INFO ] Input system was already deterministic with 4571 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2563/2563 places, 4723/4723 transitions.
Graph (trivial) has 2254 edges and 2563 vertex of which 592 / 2563 are part of one of the 48 SCC in 1 ms
Free SCC test removed 544 places
Ensure Unique test removed 584 transitions
Reduce isomorphic transitions removed 584 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 427 transitions
Trivial Post-agglo rules discarded 427 transitions
Performed 427 trivial Post agglomeration. Transition count delta: 427
Iterating post reduction 0 with 427 rules applied. Total rules applied 428 place count 2018 transition count 3711
Reduce places removed 427 places and 0 transitions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Drop transitions removed 31 transitions
Trivial Post-agglo rules discarded 31 transitions
Performed 31 trivial Post agglomeration. Transition count delta: 31
Iterating post reduction 1 with 474 rules applied. Total rules applied 902 place count 1591 transition count 3664
Reduce places removed 31 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 33 rules applied. Total rules applied 935 place count 1560 transition count 3662
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 936 place count 1559 transition count 3662
Performed 199 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 199 Pre rules applied. Total rules applied 936 place count 1559 transition count 3463
Deduced a syphon composed of 199 places in 15 ms
Reduce places removed 199 places and 0 transitions.
Iterating global reduction 4 with 398 rules applied. Total rules applied 1334 place count 1360 transition count 3463
Discarding 106 places :
Symmetric choice reduction at 4 with 106 rule applications. Total rules 1440 place count 1254 transition count 2784
Iterating global reduction 4 with 106 rules applied. Total rules applied 1546 place count 1254 transition count 2784
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 4 with 4 rules applied. Total rules applied 1550 place count 1254 transition count 2780
Performed 27 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 27 Pre rules applied. Total rules applied 1550 place count 1254 transition count 2753
Deduced a syphon composed of 27 places in 12 ms
Reduce places removed 27 places and 0 transitions.
Iterating global reduction 5 with 54 rules applied. Total rules applied 1604 place count 1227 transition count 2753
Discarding 2 places :
Symmetric choice reduction at 5 with 2 rule applications. Total rules 1606 place count 1225 transition count 2728
Iterating global reduction 5 with 2 rules applied. Total rules applied 1608 place count 1225 transition count 2728
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 1609 place count 1225 transition count 2727
Performed 429 Post agglomeration using F-continuation condition.Transition count delta: 429
Deduced a syphon composed of 429 places in 0 ms
Reduce places removed 429 places and 0 transitions.
Iterating global reduction 6 with 858 rules applied. Total rules applied 2467 place count 796 transition count 2298
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 6 with 1 rules applied. Total rules applied 2468 place count 796 transition count 2297
Renaming transitions due to excessive name length > 1024 char.
Discarding 29 places :
Symmetric choice reduction at 7 with 29 rule applications. Total rules 2497 place count 767 transition count 1900
Iterating global reduction 7 with 29 rules applied. Total rules applied 2526 place count 767 transition count 1900
Ensure Unique test removed 24 transitions
Reduce isomorphic transitions removed 24 transitions.
Iterating post reduction 7 with 24 rules applied. Total rules applied 2550 place count 767 transition count 1876
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 8 with 2 rules applied. Total rules applied 2552 place count 766 transition count 1875
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 2553 place count 765 transition count 1861
Iterating global reduction 8 with 1 rules applied. Total rules applied 2554 place count 765 transition count 1861
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 8 with 1 rules applied. Total rules applied 2555 place count 765 transition count 1860
Drop transitions removed 21 transitions
Redundant transition composition rules discarded 21 transitions
Iterating global reduction 9 with 21 rules applied. Total rules applied 2576 place count 765 transition count 1839
Drop transitions removed 10 transitions
Trivial Post-agglo rules discarded 10 transitions
Performed 10 trivial Post agglomeration. Transition count delta: 10
Iterating post reduction 9 with 10 rules applied. Total rules applied 2586 place count 765 transition count 1829
Reduce places removed 10 places and 0 transitions.
Iterating post reduction 10 with 10 rules applied. Total rules applied 2596 place count 755 transition count 1829
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 11 with 1 rules applied. Total rules applied 2597 place count 755 transition count 1829
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 11 with 2 rules applied. Total rules applied 2599 place count 753 transition count 1827
Applied a total of 2599 rules in 366 ms. Remains 753 /2563 variables (removed 1810) and now considering 1827/4723 (removed 2896) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 366 ms. Remains : 753/2563 places, 1827/4723 transitions.
[2023-03-08 12:14:03] [INFO ] Flatten gal took : 32 ms
[2023-03-08 12:14:03] [INFO ] Flatten gal took : 35 ms
[2023-03-08 12:14:03] [INFO ] Input system was already deterministic with 1827 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2563/2563 places, 4723/4723 transitions.
Discarding 49 places :
Symmetric choice reduction at 0 with 49 rule applications. Total rules 49 place count 2514 transition count 4648
Iterating global reduction 0 with 49 rules applied. Total rules applied 98 place count 2514 transition count 4648
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 126 place count 2486 transition count 4593
Iterating global reduction 0 with 28 rules applied. Total rules applied 154 place count 2486 transition count 4593
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 164 place count 2476 transition count 4583
Iterating global reduction 0 with 10 rules applied. Total rules applied 174 place count 2476 transition count 4583
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 175 place count 2476 transition count 4582
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 181 place count 2470 transition count 4576
Iterating global reduction 1 with 6 rules applied. Total rules applied 187 place count 2470 transition count 4576
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 193 place count 2464 transition count 4570
Iterating global reduction 1 with 6 rules applied. Total rules applied 199 place count 2464 transition count 4570
Discarding 4 places :
Symmetric choice reduction at 1 with 4 rule applications. Total rules 203 place count 2460 transition count 4566
Iterating global reduction 1 with 4 rules applied. Total rules applied 207 place count 2460 transition count 4566
Discarding 4 places :
Symmetric choice reduction at 1 with 4 rule applications. Total rules 211 place count 2456 transition count 4562
Iterating global reduction 1 with 4 rules applied. Total rules applied 215 place count 2456 transition count 4562
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 218 place count 2453 transition count 4559
Iterating global reduction 1 with 3 rules applied. Total rules applied 221 place count 2453 transition count 4559
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 224 place count 2450 transition count 4556
Iterating global reduction 1 with 3 rules applied. Total rules applied 227 place count 2450 transition count 4556
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 230 place count 2447 transition count 4553
Iterating global reduction 1 with 3 rules applied. Total rules applied 233 place count 2447 transition count 4553
Applied a total of 233 rules in 1131 ms. Remains 2447 /2563 variables (removed 116) and now considering 4553/4723 (removed 170) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1132 ms. Remains : 2447/2563 places, 4553/4723 transitions.
[2023-03-08 12:14:05] [INFO ] Flatten gal took : 75 ms
[2023-03-08 12:14:05] [INFO ] Flatten gal took : 82 ms
[2023-03-08 12:14:05] [INFO ] Input system was already deterministic with 4553 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2563/2563 places, 4723/4723 transitions.
Graph (trivial) has 2254 edges and 2563 vertex of which 592 / 2563 are part of one of the 48 SCC in 1 ms
Free SCC test removed 544 places
Ensure Unique test removed 584 transitions
Reduce isomorphic transitions removed 584 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 427 transitions
Trivial Post-agglo rules discarded 427 transitions
Performed 427 trivial Post agglomeration. Transition count delta: 427
Iterating post reduction 0 with 427 rules applied. Total rules applied 428 place count 2018 transition count 3711
Reduce places removed 427 places and 0 transitions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Drop transitions removed 31 transitions
Trivial Post-agglo rules discarded 31 transitions
Performed 31 trivial Post agglomeration. Transition count delta: 31
Iterating post reduction 1 with 474 rules applied. Total rules applied 902 place count 1591 transition count 3664
Reduce places removed 31 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 33 rules applied. Total rules applied 935 place count 1560 transition count 3662
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 936 place count 1559 transition count 3662
Performed 199 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 199 Pre rules applied. Total rules applied 936 place count 1559 transition count 3463
Deduced a syphon composed of 199 places in 16 ms
Reduce places removed 199 places and 0 transitions.
Iterating global reduction 4 with 398 rules applied. Total rules applied 1334 place count 1360 transition count 3463
Discarding 107 places :
Symmetric choice reduction at 4 with 107 rule applications. Total rules 1441 place count 1253 transition count 2770
Iterating global reduction 4 with 107 rules applied. Total rules applied 1548 place count 1253 transition count 2770
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 4 with 4 rules applied. Total rules applied 1552 place count 1253 transition count 2766
Performed 27 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 27 Pre rules applied. Total rules applied 1552 place count 1253 transition count 2739
Deduced a syphon composed of 27 places in 12 ms
Reduce places removed 27 places and 0 transitions.
Iterating global reduction 5 with 54 rules applied. Total rules applied 1606 place count 1226 transition count 2739
Discarding 2 places :
Symmetric choice reduction at 5 with 2 rule applications. Total rules 1608 place count 1224 transition count 2714
Iterating global reduction 5 with 2 rules applied. Total rules applied 1610 place count 1224 transition count 2714
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 1611 place count 1224 transition count 2713
Performed 428 Post agglomeration using F-continuation condition.Transition count delta: 428
Deduced a syphon composed of 428 places in 1 ms
Reduce places removed 428 places and 0 transitions.
Iterating global reduction 6 with 856 rules applied. Total rules applied 2467 place count 796 transition count 2285
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 6 with 1 rules applied. Total rules applied 2468 place count 796 transition count 2284
Renaming transitions due to excessive name length > 1024 char.
Discarding 28 places :
Symmetric choice reduction at 7 with 28 rule applications. Total rules 2496 place count 768 transition count 1901
Iterating global reduction 7 with 28 rules applied. Total rules applied 2524 place count 768 transition count 1901
Ensure Unique test removed 23 transitions
Reduce isomorphic transitions removed 23 transitions.
Iterating post reduction 7 with 23 rules applied. Total rules applied 2547 place count 768 transition count 1878
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 8 with 2 rules applied. Total rules applied 2549 place count 767 transition count 1877
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 2550 place count 766 transition count 1863
Iterating global reduction 8 with 1 rules applied. Total rules applied 2551 place count 766 transition count 1863
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 8 with 1 rules applied. Total rules applied 2552 place count 766 transition count 1862
Drop transitions removed 22 transitions
Redundant transition composition rules discarded 22 transitions
Iterating global reduction 9 with 22 rules applied. Total rules applied 2574 place count 766 transition count 1840
Drop transitions removed 11 transitions
Trivial Post-agglo rules discarded 11 transitions
Performed 11 trivial Post agglomeration. Transition count delta: 11
Iterating post reduction 9 with 11 rules applied. Total rules applied 2585 place count 766 transition count 1829
Reduce places removed 11 places and 0 transitions.
Iterating post reduction 10 with 11 rules applied. Total rules applied 2596 place count 755 transition count 1829
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 11 with 2 rules applied. Total rules applied 2598 place count 753 transition count 1827
Applied a total of 2598 rules in 337 ms. Remains 753 /2563 variables (removed 1810) and now considering 1827/4723 (removed 2896) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 337 ms. Remains : 753/2563 places, 1827/4723 transitions.
[2023-03-08 12:14:05] [INFO ] Flatten gal took : 32 ms
[2023-03-08 12:14:05] [INFO ] Flatten gal took : 37 ms
[2023-03-08 12:14:05] [INFO ] Input system was already deterministic with 1827 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2563/2563 places, 4723/4723 transitions.
Graph (trivial) has 2251 edges and 2563 vertex of which 592 / 2563 are part of one of the 48 SCC in 1 ms
Free SCC test removed 544 places
Ensure Unique test removed 584 transitions
Reduce isomorphic transitions removed 584 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 426 transitions
Trivial Post-agglo rules discarded 426 transitions
Performed 426 trivial Post agglomeration. Transition count delta: 426
Iterating post reduction 0 with 426 rules applied. Total rules applied 427 place count 2018 transition count 3712
Reduce places removed 426 places and 0 transitions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Drop transitions removed 31 transitions
Trivial Post-agglo rules discarded 31 transitions
Performed 31 trivial Post agglomeration. Transition count delta: 31
Iterating post reduction 1 with 473 rules applied. Total rules applied 900 place count 1592 transition count 3665
Reduce places removed 31 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 33 rules applied. Total rules applied 933 place count 1561 transition count 3663
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 934 place count 1560 transition count 3663
Performed 199 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 199 Pre rules applied. Total rules applied 934 place count 1560 transition count 3464
Deduced a syphon composed of 199 places in 16 ms
Reduce places removed 199 places and 0 transitions.
Iterating global reduction 4 with 398 rules applied. Total rules applied 1332 place count 1361 transition count 3464
Discarding 105 places :
Symmetric choice reduction at 4 with 105 rule applications. Total rules 1437 place count 1256 transition count 2773
Iterating global reduction 4 with 105 rules applied. Total rules applied 1542 place count 1256 transition count 2773
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 4 with 4 rules applied. Total rules applied 1546 place count 1256 transition count 2769
Performed 25 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 25 Pre rules applied. Total rules applied 1546 place count 1256 transition count 2744
Deduced a syphon composed of 25 places in 12 ms
Reduce places removed 25 places and 0 transitions.
Iterating global reduction 5 with 50 rules applied. Total rules applied 1596 place count 1231 transition count 2744
Discarding 2 places :
Symmetric choice reduction at 5 with 2 rule applications. Total rules 1598 place count 1229 transition count 2719
Iterating global reduction 5 with 2 rules applied. Total rules applied 1600 place count 1229 transition count 2719
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 1601 place count 1229 transition count 2718
Performed 431 Post agglomeration using F-continuation condition.Transition count delta: 431
Deduced a syphon composed of 431 places in 0 ms
Reduce places removed 431 places and 0 transitions.
Iterating global reduction 6 with 862 rules applied. Total rules applied 2463 place count 798 transition count 2287
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 6 with 1 rules applied. Total rules applied 2464 place count 798 transition count 2286
Renaming transitions due to excessive name length > 1024 char.
Discarding 29 places :
Symmetric choice reduction at 7 with 29 rule applications. Total rules 2493 place count 769 transition count 1889
Iterating global reduction 7 with 29 rules applied. Total rules applied 2522 place count 769 transition count 1889
Ensure Unique test removed 24 transitions
Reduce isomorphic transitions removed 24 transitions.
Iterating post reduction 7 with 24 rules applied. Total rules applied 2546 place count 769 transition count 1865
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 8 with 2 rules applied. Total rules applied 2548 place count 768 transition count 1864
Discarding 1 places :
Symmetric choice reduction at 8 with 1 rule applications. Total rules 2549 place count 767 transition count 1850
Iterating global reduction 8 with 1 rules applied. Total rules applied 2550 place count 767 transition count 1850
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 8 with 1 rules applied. Total rules applied 2551 place count 767 transition count 1849
Drop transitions removed 22 transitions
Redundant transition composition rules discarded 22 transitions
Iterating global reduction 9 with 22 rules applied. Total rules applied 2573 place count 767 transition count 1827
Drop transitions removed 11 transitions
Trivial Post-agglo rules discarded 11 transitions
Performed 11 trivial Post agglomeration. Transition count delta: 11
Iterating post reduction 9 with 11 rules applied. Total rules applied 2584 place count 767 transition count 1816
Reduce places removed 11 places and 0 transitions.
Iterating post reduction 10 with 11 rules applied. Total rules applied 2595 place count 756 transition count 1816
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 11 with 2 rules applied. Total rules applied 2597 place count 754 transition count 1814
Applied a total of 2597 rules in 335 ms. Remains 754 /2563 variables (removed 1809) and now considering 1814/4723 (removed 2909) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 335 ms. Remains : 754/2563 places, 1814/4723 transitions.
[2023-03-08 12:14:06] [INFO ] Flatten gal took : 31 ms
[2023-03-08 12:14:06] [INFO ] Flatten gal took : 34 ms
[2023-03-08 12:14:06] [INFO ] Input system was already deterministic with 1814 transitions.
Finished random walk after 991 steps, including 0 resets, run visited all 1 properties in 22 ms. (steps per millisecond=45 )
FORMULA DLCround-PT-10b-CTLCardinality-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 2563/2563 places, 4723/4723 transitions.
Discarding 39 places :
Symmetric choice reduction at 0 with 39 rule applications. Total rules 39 place count 2524 transition count 4671
Iterating global reduction 0 with 39 rules applied. Total rules applied 78 place count 2524 transition count 4671
Discarding 22 places :
Symmetric choice reduction at 0 with 22 rule applications. Total rules 100 place count 2502 transition count 4636
Iterating global reduction 0 with 22 rules applied. Total rules applied 122 place count 2502 transition count 4636
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 130 place count 2494 transition count 4628
Iterating global reduction 0 with 8 rules applied. Total rules applied 138 place count 2494 transition count 4628
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 143 place count 2489 transition count 4623
Iterating global reduction 0 with 5 rules applied. Total rules applied 148 place count 2489 transition count 4623
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 153 place count 2484 transition count 4618
Iterating global reduction 0 with 5 rules applied. Total rules applied 158 place count 2484 transition count 4618
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 161 place count 2481 transition count 4615
Iterating global reduction 0 with 3 rules applied. Total rules applied 164 place count 2481 transition count 4615
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 167 place count 2478 transition count 4612
Iterating global reduction 0 with 3 rules applied. Total rules applied 170 place count 2478 transition count 4612
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 172 place count 2476 transition count 4610
Iterating global reduction 0 with 2 rules applied. Total rules applied 174 place count 2476 transition count 4610
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 176 place count 2474 transition count 4608
Iterating global reduction 0 with 2 rules applied. Total rules applied 178 place count 2474 transition count 4608
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 180 place count 2472 transition count 4606
Iterating global reduction 0 with 2 rules applied. Total rules applied 182 place count 2472 transition count 4606
Applied a total of 182 rules in 1247 ms. Remains 2472 /2563 variables (removed 91) and now considering 4606/4723 (removed 117) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1247 ms. Remains : 2472/2563 places, 4606/4723 transitions.
[2023-03-08 12:14:07] [INFO ] Flatten gal took : 76 ms
[2023-03-08 12:14:07] [INFO ] Flatten gal took : 81 ms
[2023-03-08 12:14:07] [INFO ] Input system was already deterministic with 4606 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2563/2563 places, 4723/4723 transitions.
Discarding 46 places :
Symmetric choice reduction at 0 with 46 rule applications. Total rules 46 place count 2517 transition count 4651
Iterating global reduction 0 with 46 rules applied. Total rules applied 92 place count 2517 transition count 4651
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 120 place count 2489 transition count 4596
Iterating global reduction 0 with 28 rules applied. Total rules applied 148 place count 2489 transition count 4596
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 158 place count 2479 transition count 4586
Iterating global reduction 0 with 10 rules applied. Total rules applied 168 place count 2479 transition count 4586
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 169 place count 2479 transition count 4585
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 175 place count 2473 transition count 4579
Iterating global reduction 1 with 6 rules applied. Total rules applied 181 place count 2473 transition count 4579
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 187 place count 2467 transition count 4573
Iterating global reduction 1 with 6 rules applied. Total rules applied 193 place count 2467 transition count 4573
Discarding 4 places :
Symmetric choice reduction at 1 with 4 rule applications. Total rules 197 place count 2463 transition count 4569
Iterating global reduction 1 with 4 rules applied. Total rules applied 201 place count 2463 transition count 4569
Discarding 4 places :
Symmetric choice reduction at 1 with 4 rule applications. Total rules 205 place count 2459 transition count 4565
Iterating global reduction 1 with 4 rules applied. Total rules applied 209 place count 2459 transition count 4565
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 212 place count 2456 transition count 4562
Iterating global reduction 1 with 3 rules applied. Total rules applied 215 place count 2456 transition count 4562
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 218 place count 2453 transition count 4559
Iterating global reduction 1 with 3 rules applied. Total rules applied 221 place count 2453 transition count 4559
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 224 place count 2450 transition count 4556
Iterating global reduction 1 with 3 rules applied. Total rules applied 227 place count 2450 transition count 4556
Applied a total of 227 rules in 1130 ms. Remains 2450 /2563 variables (removed 113) and now considering 4556/4723 (removed 167) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1130 ms. Remains : 2450/2563 places, 4556/4723 transitions.
[2023-03-08 12:14:09] [INFO ] Flatten gal took : 76 ms
[2023-03-08 12:14:09] [INFO ] Flatten gal took : 92 ms
[2023-03-08 12:14:09] [INFO ] Input system was already deterministic with 4556 transitions.
[2023-03-08 12:14:09] [INFO ] Flatten gal took : 83 ms
[2023-03-08 12:14:09] [INFO ] Flatten gal took : 87 ms
[2023-03-08 12:14:09] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 2 ms.
[2023-03-08 12:14:09] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 2563 places, 4723 transitions and 14170 arcs took 23 ms.
Total runtime 38545 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DLCround-PT-10b
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/370

FORMULA DLCround-PT-10b-CTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-CTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-CTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-CTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-CTLCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-CTLCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-CTLCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-CTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 9107544 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16101712 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/370/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/370/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/370/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 1 (type CNST) for 0 DLCround-PT-10b-CTLCardinality-00
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 1 (type CNST) for DLCround-PT-10b-CTLCardinality-00
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 10 (type EXCL) for 9 DLCround-PT-10b-CTLCardinality-04
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:754
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:754
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-10b-CTLCardinality-00: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-10b-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-02: F 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-04: CTL 0 0 1 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-05: CONJ 0 3 0 0 3 0 0 0
DLCround-PT-10b-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-08: EFEG 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-12: EG 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 1/239 2/32 DLCround-PT-10b-CTLCardinality-04 126834 m, 25366 m/sec, 237066 t fired, .

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DLCround-PT-10b-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-02: F 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-04: CTL 0 0 1 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-05: CONJ 0 3 0 0 3 0 0 0
DLCround-PT-10b-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-08: EFEG 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-12: EG 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 6/239 6/32 DLCround-PT-10b-CTLCardinality-04 661406 m, 106914 m/sec, 1278567 t fired, .

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DLCround-PT-10b-CTLCardinality-02: F 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-04: CTL 0 0 1 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-05: CONJ 0 3 0 0 3 0 0 0
DLCround-PT-10b-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-08: EFEG 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-12: EG 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 11/239 11/32 DLCround-PT-10b-CTLCardinality-04 1197811 m, 107281 m/sec, 2328338 t fired, .

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DLCround-PT-10b-CTLCardinality-04: CTL 0 0 1 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-05: CONJ 0 3 0 0 3 0 0 0
DLCround-PT-10b-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-08: EFEG 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
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DLCround-PT-10b-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-12: EG 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0

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10 CTL EXCL 16/239 15/32 DLCround-PT-10b-CTLCardinality-04 1727905 m, 106018 m/sec, 3382503 t fired, .

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DLCround-PT-10b-CTLCardinality-04: CTL 0 0 1 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-05: CONJ 0 3 0 0 3 0 0 0
DLCround-PT-10b-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-08: EFEG 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-12: EG 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0

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10 CTL EXCL 21/239 20/32 DLCround-PT-10b-CTLCardinality-04 2261865 m, 106792 m/sec, 4437273 t fired, .

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DLCround-PT-10b-CTLCardinality-05: CONJ 0 3 0 0 3 0 0 0
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DLCround-PT-10b-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-08: EFEG 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
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27 CTL EXCL 20/491 22/32 DLCround-PT-10b-CTLCardinality-07 678683 m, 33666 m/sec, 1463442 t fired, .

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DLCround-PT-10b-CTLCardinality-09: CTL true CTL model checker
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27 CTL EXCL 25/491 28/32 DLCround-PT-10b-CTLCardinality-07 849410 m, 34145 m/sec, 1832666 t fired, .

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27 CTL EXCL 30/491 32/32 DLCround-PT-10b-CTLCardinality-07 1013189 m, 32755 m/sec, 2188533 t fired, .

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DLCround-PT-10b-CTLCardinality-09: CTL true CTL model checker
DLCround-PT-10b-CTLCardinality-12: EG true state space / EG
DLCround-PT-10b-CTLCardinality-15: CTL true CTL model checker

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36 CTL EXCL 5/1135 2/32 DLCround-PT-10b-CTLCardinality-10 171669 m, 34333 m/sec, 1033996 t fired, .

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36 CTL EXCL 10/1135 4/32 DLCround-PT-10b-CTLCardinality-10 346758 m, 35017 m/sec, 2083814 t fired, .

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