Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478700714.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DLCround-PT-09a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478700714
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 968K
-rw-r--r-- 1 mcc users 6.1K Feb 25 19:41 CTLCardinality.txt
-rw-r--r-- 1 mcc users 63K Feb 25 19:41 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 25 19:11 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Feb 25 19:11 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:53 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 15:53 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:53 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:53 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 20:45 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 110K Feb 25 20:45 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.8K Feb 25 20:14 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 25 20:14 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 566K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-09a-CTLFireability-00
FORMULA_NAME DLCround-PT-09a-CTLFireability-01
FORMULA_NAME DLCround-PT-09a-CTLFireability-02
FORMULA_NAME DLCround-PT-09a-CTLFireability-03
FORMULA_NAME DLCround-PT-09a-CTLFireability-04
FORMULA_NAME DLCround-PT-09a-CTLFireability-05
FORMULA_NAME DLCround-PT-09a-CTLFireability-06
FORMULA_NAME DLCround-PT-09a-CTLFireability-07
FORMULA_NAME DLCround-PT-09a-CTLFireability-08
FORMULA_NAME DLCround-PT-09a-CTLFireability-09
FORMULA_NAME DLCround-PT-09a-CTLFireability-10
FORMULA_NAME DLCround-PT-09a-CTLFireability-11
FORMULA_NAME DLCround-PT-09a-CTLFireability-12
FORMULA_NAME DLCround-PT-09a-CTLFireability-13
FORMULA_NAME DLCround-PT-09a-CTLFireability-14
FORMULA_NAME DLCround-PT-09a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678276839007

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-09a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 12:00:40] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-08 12:00:40] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 12:00:40] [INFO ] Load time of PNML (sax parser for PT used): 112 ms
[2023-03-08 12:00:40] [INFO ] Transformed 299 places.
[2023-03-08 12:00:40] [INFO ] Transformed 2243 transitions.
[2023-03-08 12:00:40] [INFO ] Found NUPN structural information;
[2023-03-08 12:00:40] [INFO ] Parsed PT model containing 299 places and 2243 transitions and 8689 arcs in 186 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Initial state reduction rules removed 1 formulas.
Ensure Unique test removed 216 transitions
Reduce redundant transitions removed 216 transitions.
FORMULA DLCround-PT-09a-CTLFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 133 out of 299 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 299/299 places, 2027/2027 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 290 transition count 1916
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 290 transition count 1916
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 20 place count 290 transition count 1914
Drop transitions removed 691 transitions
Redundant transition composition rules discarded 691 transitions
Iterating global reduction 1 with 691 rules applied. Total rules applied 711 place count 290 transition count 1223
Applied a total of 711 rules in 77 ms. Remains 290 /299 variables (removed 9) and now considering 1223/2027 (removed 804) transitions.
[2023-03-08 12:00:40] [INFO ] Flow matrix only has 191 transitions (discarded 1032 similar events)
// Phase 1: matrix 191 rows 290 cols
[2023-03-08 12:00:40] [INFO ] Computed 184 place invariants in 17 ms
[2023-03-08 12:00:41] [INFO ] Implicit Places using invariants in 748 ms returned [120, 126, 127, 129, 130, 131, 132, 133, 134, 136, 140, 142, 143, 144, 145, 146, 148, 149, 150, 151, 152, 153, 156, 159, 160, 162, 163, 164, 165, 166, 167, 172, 174, 178, 180, 181, 182, 184, 186, 188, 189, 190, 191, 192, 193, 194, 196, 198, 200, 203, 209, 212, 215, 220, 221, 222, 224, 225, 227, 228, 229, 230, 232, 233, 234, 235, 239, 240, 241, 243, 244, 245, 247, 248, 250, 253, 254, 255, 259, 260, 261, 263, 264, 265, 266, 267, 268, 269, 273, 276, 282]
Discarding 91 places :
Ensure Unique test removed 442 transitions
Reduce isomorphic transitions removed 442 transitions.
Implicit Place search using SMT only with invariants took 775 ms to find 91 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 199/299 places, 781/2027 transitions.
Drop transitions removed 524 transitions
Redundant transition composition rules discarded 524 transitions
Iterating global reduction 0 with 524 rules applied. Total rules applied 524 place count 199 transition count 257
Applied a total of 524 rules in 9 ms. Remains 199 /199 variables (removed 0) and now considering 257/781 (removed 524) transitions.
[2023-03-08 12:00:41] [INFO ] Flow matrix only has 191 transitions (discarded 66 similar events)
// Phase 1: matrix 191 rows 199 cols
[2023-03-08 12:00:41] [INFO ] Computed 93 place invariants in 2 ms
[2023-03-08 12:00:41] [INFO ] Implicit Places using invariants in 84 ms returned []
[2023-03-08 12:00:41] [INFO ] Flow matrix only has 191 transitions (discarded 66 similar events)
[2023-03-08 12:00:41] [INFO ] Invariant cache hit.
[2023-03-08 12:00:41] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-08 12:00:41] [INFO ] Implicit Places using invariants and state equation in 119 ms returned []
Implicit Place search using SMT with State Equation took 205 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 199/299 places, 257/2027 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 1068 ms. Remains : 199/299 places, 257/2027 transitions.
Support contains 133 out of 199 places after structural reductions.
[2023-03-08 12:00:41] [INFO ] Flatten gal took : 35 ms
[2023-03-08 12:00:41] [INFO ] Flatten gal took : 16 ms
[2023-03-08 12:00:42] [INFO ] Input system was already deterministic with 257 transitions.
Support contains 131 out of 199 places (down from 133) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 178 ms. (steps per millisecond=56 ) properties (out of 76) seen :75
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-08 12:00:42] [INFO ] Flow matrix only has 191 transitions (discarded 66 similar events)
[2023-03-08 12:00:42] [INFO ] Invariant cache hit.
[2023-03-08 12:00:42] [INFO ] After 141ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-08 12:00:42] [INFO ] [Nat]Absence check using 93 positive place invariants in 11 ms returned sat
[2023-03-08 12:00:42] [INFO ] After 57ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 1 atomic propositions for a total of 15 simplifications.
[2023-03-08 12:00:42] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 12 ms
FORMULA DLCround-PT-09a-CTLFireability-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 12 ms
[2023-03-08 12:00:42] [INFO ] Input system was already deterministic with 257 transitions.
Support contains 128 out of 199 places (down from 129) after GAL structural reductions.
Computed a total of 80 stabilizing places and 1 stable transitions
Graph (complete) has 349 edges and 199 vertex of which 120 are kept as prefixes of interest. Removing 79 places using SCC suffix rule.3 ms
Starting structural reductions in SI_CTL mode, iteration 0 : 199/199 places, 257/257 transitions.
Graph (trivial) has 245 edges and 199 vertex of which 108 / 199 are part of one of the 13 SCC in 2 ms
Free SCC test removed 95 places
Ensure Unique test removed 220 transitions
Reduce isomorphic transitions removed 220 transitions.
Graph (complete) has 129 edges and 104 vertex of which 28 are kept as prefixes of interest. Removing 76 places using SCC suffix rule.1 ms
Discarding 76 places :
Also discarding 0 output transitions
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 28 transition count 36
Reduce places removed 1 places and 0 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 1 with 3 rules applied. Total rules applied 6 place count 27 transition count 34
Reduce places removed 2 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 9 place count 25 transition count 33
Discarding 12 places :
Symmetric choice reduction at 3 with 12 rule applications. Total rules 21 place count 13 transition count 20
Iterating global reduction 3 with 12 rules applied. Total rules applied 33 place count 13 transition count 20
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 3 with 2 rules applied. Total rules applied 35 place count 13 transition count 18
Applied a total of 35 rules in 12 ms. Remains 13 /199 variables (removed 186) and now considering 18/257 (removed 239) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 13/199 places, 18/257 transitions.
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 0 ms
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 0 ms
[2023-03-08 12:00:42] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 199/199 places, 257/257 transitions.
Graph (trivial) has 253 edges and 199 vertex of which 116 / 199 are part of one of the 14 SCC in 0 ms
Free SCC test removed 102 places
Ensure Unique test removed 236 transitions
Reduce isomorphic transitions removed 236 transitions.
Graph (complete) has 113 edges and 97 vertex of which 19 are kept as prefixes of interest. Removing 78 places using SCC suffix rule.0 ms
Discarding 78 places :
Also discarding 0 output transitions
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 19 transition count 20
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 4 place count 18 transition count 20
Discarding 12 places :
Symmetric choice reduction at 2 with 12 rule applications. Total rules 16 place count 6 transition count 8
Iterating global reduction 2 with 12 rules applied. Total rules applied 28 place count 6 transition count 8
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 29 place count 6 transition count 7
Applied a total of 29 rules in 3 ms. Remains 6 /199 variables (removed 193) and now considering 7/257 (removed 250) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 6/199 places, 7/257 transitions.
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 1 ms
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 0 ms
[2023-03-08 12:00:42] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 199/199 places, 257/257 transitions.
Reduce places removed 62 places and 0 transitions.
Iterating post reduction 0 with 62 rules applied. Total rules applied 62 place count 137 transition count 257
Discarding 16 places :
Symmetric choice reduction at 1 with 16 rule applications. Total rules 78 place count 121 transition count 225
Iterating global reduction 1 with 16 rules applied. Total rules applied 94 place count 121 transition count 225
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 96 place count 121 transition count 223
Applied a total of 96 rules in 3 ms. Remains 121 /199 variables (removed 78) and now considering 223/257 (removed 34) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 121/199 places, 223/257 transitions.
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 12 ms
[2023-03-08 12:00:42] [INFO ] Input system was already deterministic with 223 transitions.
Starting structural reductions in LTL mode, iteration 0 : 199/199 places, 257/257 transitions.
Reduce places removed 74 places and 0 transitions.
Iterating post reduction 0 with 74 rules applied. Total rules applied 74 place count 125 transition count 257
Discarding 17 places :
Symmetric choice reduction at 1 with 17 rule applications. Total rules 91 place count 108 transition count 223
Iterating global reduction 1 with 17 rules applied. Total rules applied 108 place count 108 transition count 223
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 110 place count 108 transition count 221
Applied a total of 110 rules in 3 ms. Remains 108 /199 variables (removed 91) and now considering 221/257 (removed 36) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 108/199 places, 221/257 transitions.
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:00:42] [INFO ] Input system was already deterministic with 221 transitions.
Starting structural reductions in LTL mode, iteration 0 : 199/199 places, 257/257 transitions.
Reduce places removed 74 places and 0 transitions.
Iterating post reduction 0 with 74 rules applied. Total rules applied 74 place count 125 transition count 257
Discarding 16 places :
Symmetric choice reduction at 1 with 16 rule applications. Total rules 90 place count 109 transition count 225
Iterating global reduction 1 with 16 rules applied. Total rules applied 106 place count 109 transition count 225
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 108 place count 109 transition count 223
Applied a total of 108 rules in 3 ms. Remains 109 /199 variables (removed 90) and now considering 223/257 (removed 34) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 109/199 places, 223/257 transitions.
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:00:42] [INFO ] Input system was already deterministic with 223 transitions.
Starting structural reductions in LTL mode, iteration 0 : 199/199 places, 257/257 transitions.
Reduce places removed 64 places and 0 transitions.
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 135 transition count 257
Discarding 15 places :
Symmetric choice reduction at 1 with 15 rule applications. Total rules 79 place count 120 transition count 227
Iterating global reduction 1 with 15 rules applied. Total rules applied 94 place count 120 transition count 227
Applied a total of 94 rules in 8 ms. Remains 120 /199 variables (removed 79) and now considering 227/257 (removed 30) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 120/199 places, 227/257 transitions.
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 7 ms
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:00:42] [INFO ] Input system was already deterministic with 227 transitions.
Starting structural reductions in LTL mode, iteration 0 : 199/199 places, 257/257 transitions.
Reduce places removed 70 places and 0 transitions.
Iterating post reduction 0 with 70 rules applied. Total rules applied 70 place count 129 transition count 257
Discarding 16 places :
Symmetric choice reduction at 1 with 16 rule applications. Total rules 86 place count 113 transition count 225
Iterating global reduction 1 with 16 rules applied. Total rules applied 102 place count 113 transition count 225
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 104 place count 113 transition count 223
Applied a total of 104 rules in 2 ms. Remains 113 /199 variables (removed 86) and now considering 223/257 (removed 34) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 113/199 places, 223/257 transitions.
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 5 ms
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:00:42] [INFO ] Input system was already deterministic with 223 transitions.
Starting structural reductions in LTL mode, iteration 0 : 199/199 places, 257/257 transitions.
Reduce places removed 71 places and 0 transitions.
Iterating post reduction 0 with 71 rules applied. Total rules applied 71 place count 128 transition count 257
Discarding 17 places :
Symmetric choice reduction at 1 with 17 rule applications. Total rules 88 place count 111 transition count 223
Iterating global reduction 1 with 17 rules applied. Total rules applied 105 place count 111 transition count 223
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 107 place count 111 transition count 221
Applied a total of 107 rules in 2 ms. Remains 111 /199 variables (removed 88) and now considering 221/257 (removed 36) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 111/199 places, 221/257 transitions.
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 5 ms
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:00:42] [INFO ] Input system was already deterministic with 221 transitions.
Starting structural reductions in LTL mode, iteration 0 : 199/199 places, 257/257 transitions.
Reduce places removed 78 places and 0 transitions.
Iterating post reduction 0 with 78 rules applied. Total rules applied 78 place count 121 transition count 257
Discarding 18 places :
Symmetric choice reduction at 1 with 18 rule applications. Total rules 96 place count 103 transition count 221
Iterating global reduction 1 with 18 rules applied. Total rules applied 114 place count 103 transition count 221
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 116 place count 103 transition count 219
Applied a total of 116 rules in 3 ms. Remains 103 /199 variables (removed 96) and now considering 219/257 (removed 38) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 103/199 places, 219/257 transitions.
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 5 ms
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 5 ms
[2023-03-08 12:00:42] [INFO ] Input system was already deterministic with 219 transitions.
Starting structural reductions in LTL mode, iteration 0 : 199/199 places, 257/257 transitions.
Reduce places removed 75 places and 0 transitions.
Iterating post reduction 0 with 75 rules applied. Total rules applied 75 place count 124 transition count 257
Discarding 17 places :
Symmetric choice reduction at 1 with 17 rule applications. Total rules 92 place count 107 transition count 223
Iterating global reduction 1 with 17 rules applied. Total rules applied 109 place count 107 transition count 223
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 111 place count 107 transition count 221
Applied a total of 111 rules in 2 ms. Remains 107 /199 variables (removed 92) and now considering 221/257 (removed 36) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 107/199 places, 221/257 transitions.
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 5 ms
[2023-03-08 12:00:42] [INFO ] Input system was already deterministic with 221 transitions.
Starting structural reductions in LTL mode, iteration 0 : 199/199 places, 257/257 transitions.
Reduce places removed 75 places and 0 transitions.
Iterating post reduction 0 with 75 rules applied. Total rules applied 75 place count 124 transition count 257
Discarding 17 places :
Symmetric choice reduction at 1 with 17 rule applications. Total rules 92 place count 107 transition count 223
Iterating global reduction 1 with 17 rules applied. Total rules applied 109 place count 107 transition count 223
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 111 place count 107 transition count 221
Applied a total of 111 rules in 2 ms. Remains 107 /199 variables (removed 92) and now considering 221/257 (removed 36) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 107/199 places, 221/257 transitions.
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 5 ms
[2023-03-08 12:00:42] [INFO ] Input system was already deterministic with 221 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 199/199 places, 257/257 transitions.
Graph (trivial) has 243 edges and 199 vertex of which 111 / 199 are part of one of the 14 SCC in 1 ms
Free SCC test removed 97 places
Ensure Unique test removed 222 transitions
Reduce isomorphic transitions removed 222 transitions.
Graph (complete) has 127 edges and 102 vertex of which 25 are kept as prefixes of interest. Removing 77 places using SCC suffix rule.1 ms
Discarding 77 places :
Also discarding 0 output transitions
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 25 transition count 34
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 4 place count 24 transition count 34
Discarding 12 places :
Symmetric choice reduction at 2 with 12 rule applications. Total rules 16 place count 12 transition count 21
Iterating global reduction 2 with 12 rules applied. Total rules applied 28 place count 12 transition count 21
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 2 with 2 rules applied. Total rules applied 30 place count 12 transition count 19
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 31 place count 12 transition count 19
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 32 place count 11 transition count 18
Iterating global reduction 2 with 1 rules applied. Total rules applied 33 place count 11 transition count 18
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 34 place count 11 transition count 17
Applied a total of 34 rules in 5 ms. Remains 11 /199 variables (removed 188) and now considering 17/257 (removed 240) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 11/199 places, 17/257 transitions.
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 0 ms
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 1 ms
[2023-03-08 12:00:42] [INFO ] Input system was already deterministic with 17 transitions.
Starting structural reductions in LTL mode, iteration 0 : 199/199 places, 257/257 transitions.
Reduce places removed 64 places and 0 transitions.
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 135 transition count 257
Discarding 14 places :
Symmetric choice reduction at 1 with 14 rule applications. Total rules 78 place count 121 transition count 229
Iterating global reduction 1 with 14 rules applied. Total rules applied 92 place count 121 transition count 229
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 94 place count 121 transition count 227
Applied a total of 94 rules in 4 ms. Remains 121 /199 variables (removed 78) and now considering 227/257 (removed 30) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 121/199 places, 227/257 transitions.
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 6 ms
[2023-03-08 12:00:42] [INFO ] Input system was already deterministic with 227 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 199/199 places, 257/257 transitions.
Graph (trivial) has 252 edges and 199 vertex of which 116 / 199 are part of one of the 15 SCC in 1 ms
Free SCC test removed 101 places
Ensure Unique test removed 232 transitions
Reduce isomorphic transitions removed 232 transitions.
Graph (complete) has 117 edges and 98 vertex of which 20 are kept as prefixes of interest. Removing 78 places using SCC suffix rule.0 ms
Discarding 78 places :
Also discarding 0 output transitions
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 20 transition count 24
Reduce places removed 1 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 5 place count 19 transition count 23
Discarding 12 places :
Symmetric choice reduction at 2 with 12 rule applications. Total rules 17 place count 7 transition count 11
Iterating global reduction 2 with 12 rules applied. Total rules applied 29 place count 7 transition count 11
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 30 place count 7 transition count 10
Applied a total of 30 rules in 3 ms. Remains 7 /199 variables (removed 192) and now considering 10/257 (removed 247) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 7/199 places, 10/257 transitions.
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 0 ms
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 1 ms
[2023-03-08 12:00:42] [INFO ] Input system was already deterministic with 10 transitions.
Finished random walk after 1 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=1 )
FORMULA DLCround-PT-09a-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 10 ms
[2023-03-08 12:00:42] [INFO ] Flatten gal took : 9 ms
[2023-03-08 12:00:42] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-08 12:00:42] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 199 places, 257 transitions and 606 arcs took 2 ms.
Total runtime 2511 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DLCround-PT-09a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA DLCround-PT-09a-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-09a-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-09a-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-09a-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-09a-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-09a-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-09a-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-09a-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-09a-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-09a-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-09a-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678277022300

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 10 (type EXCL) for 9 DLCround-PT-09a-CTLFireability-03
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
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DLCround-PT-09a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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DLCround-PT-09a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DLCround-PT-09a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
DLCround-PT-09a-CTLFireability-07: CONJ 0 3 0 0 3 0 0 0
DLCround-PT-09a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
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DLCround-PT-09a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
DLCround-PT-09a-CTLFireability-11: DISJ 0 2 0 0 2 0 0 0
DLCround-PT-09a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DLCround-PT-09a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 5/225 4/32 DLCround-PT-09a-CTLFireability-03 807197 m, 161439 m/sec, 4121873 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 10/225 7/32 DLCround-PT-09a-CTLFireability-03 1497044 m, 137969 m/sec, 7810967 t fired, .

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10 CTL EXCL 15/225 10/32 DLCround-PT-09a-CTLFireability-03 2150037 m, 130598 m/sec, 11272894 t fired, .

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10 CTL EXCL 20/225 13/32 DLCround-PT-09a-CTLFireability-03 2768476 m, 123687 m/sec, 14708698 t fired, .

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10 CTL EXCL 25/225 16/32 DLCround-PT-09a-CTLFireability-03 3353019 m, 116908 m/sec, 17972932 t fired, .

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lola: time limit : 3422 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for DLCround-PT-09a-CTLFireability-00
lola: result : true
lola: markings : 19
lola: fired transitions : 427
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 13

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-09a-CTLFireability-00: CTL true CTL model checker
DLCround-PT-09a-CTLFireability-01: EFEG true state space /EFEG
DLCround-PT-09a-CTLFireability-02: CTL false CTL model checker
DLCround-PT-09a-CTLFireability-03: CTL unknown AGGR
DLCround-PT-09a-CTLFireability-04: CTL false CTL model checker
DLCround-PT-09a-CTLFireability-05: CTL true CTL model checker
DLCround-PT-09a-CTLFireability-07: CONJ unknown CONJ
DLCround-PT-09a-CTLFireability-08: CTL false CTL model checker
DLCround-PT-09a-CTLFireability-09: CTL true CTL model checker
DLCround-PT-09a-CTLFireability-10: CTL true CTL model checker
DLCround-PT-09a-CTLFireability-11: DISJ true CTL model checker
DLCround-PT-09a-CTLFireability-12: CTL false CTL model checker
DLCround-PT-09a-CTLFireability-13: CTL false CTL model checker


Time elapsed: 178 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-09a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DLCround-PT-09a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r103-tall-167814478700714"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-09a.tgz
mv DLCround-PT-09a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;