About the Execution of LoLa+red for DLCround-PT-08b
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 880.224 | 33778.00 | 52192.00 | 386.00 | TTTFFTTFTTFTTFFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478700710.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DLCround-PT-08b, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478700710
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.5M
-rw-r--r-- 1 mcc users 5.8K Feb 25 18:25 CTLCardinality.txt
-rw-r--r-- 1 mcc users 59K Feb 25 18:25 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.7K Feb 25 18:25 CTLFireability.txt
-rw-r--r-- 1 mcc users 42K Feb 25 18:25 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:53 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 15:53 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 15:53 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:53 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.9K Feb 25 18:26 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 75K Feb 25 18:26 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.4K Feb 25 18:26 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 60K Feb 25 18:26 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 1.1M Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-08b-ReachabilityCardinality-00
FORMULA_NAME DLCround-PT-08b-ReachabilityCardinality-01
FORMULA_NAME DLCround-PT-08b-ReachabilityCardinality-02
FORMULA_NAME DLCround-PT-08b-ReachabilityCardinality-03
FORMULA_NAME DLCround-PT-08b-ReachabilityCardinality-04
FORMULA_NAME DLCround-PT-08b-ReachabilityCardinality-05
FORMULA_NAME DLCround-PT-08b-ReachabilityCardinality-06
FORMULA_NAME DLCround-PT-08b-ReachabilityCardinality-07
FORMULA_NAME DLCround-PT-08b-ReachabilityCardinality-08
FORMULA_NAME DLCround-PT-08b-ReachabilityCardinality-09
FORMULA_NAME DLCround-PT-08b-ReachabilityCardinality-10
FORMULA_NAME DLCround-PT-08b-ReachabilityCardinality-11
FORMULA_NAME DLCround-PT-08b-ReachabilityCardinality-12
FORMULA_NAME DLCround-PT-08b-ReachabilityCardinality-13
FORMULA_NAME DLCround-PT-08b-ReachabilityCardinality-14
FORMULA_NAME DLCround-PT-08b-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1678276760036
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-08b
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 11:59:21] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-08 11:59:21] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 11:59:21] [INFO ] Load time of PNML (sax parser for PT used): 162 ms
[2023-03-08 11:59:21] [INFO ] Transformed 3088 places.
[2023-03-08 11:59:21] [INFO ] Transformed 4732 transitions.
[2023-03-08 11:59:21] [INFO ] Found NUPN structural information;
[2023-03-08 11:59:21] [INFO ] Parsed PT model containing 3088 places and 4732 transitions and 13004 arcs in 275 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 11 ms.
Working with output stream class java.io.PrintStream
Incomplete random walk after 10000 steps, including 2 resets, run finished after 484 ms. (steps per millisecond=20 ) properties (out of 16) seen :8
FORMULA DLCround-PT-08b-ReachabilityCardinality-15 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-08b-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-08b-ReachabilityCardinality-11 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-08b-ReachabilityCardinality-10 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-08b-ReachabilityCardinality-09 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-08b-ReachabilityCardinality-07 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-08b-ReachabilityCardinality-06 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-08b-ReachabilityCardinality-02 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 8) seen :0
Running SMT prover for 8 properties.
// Phase 1: matrix 4732 rows 3088 cols
[2023-03-08 11:59:22] [INFO ] Computed 157 place invariants in 41 ms
[2023-03-08 11:59:23] [INFO ] After 1072ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:8
[2023-03-08 11:59:24] [INFO ] [Nat]Absence check using 157 positive place invariants in 112 ms returned sat
[2023-03-08 11:59:27] [INFO ] After 2369ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :7
[2023-03-08 11:59:28] [INFO ] Deduced a trap composed of 226 places in 910 ms of which 7 ms to minimize.
[2023-03-08 11:59:29] [INFO ] Deduced a trap composed of 187 places in 749 ms of which 5 ms to minimize.
[2023-03-08 11:59:30] [INFO ] Deduced a trap composed of 205 places in 730 ms of which 3 ms to minimize.
[2023-03-08 11:59:31] [INFO ] Deduced a trap composed of 170 places in 636 ms of which 2 ms to minimize.
[2023-03-08 11:59:31] [INFO ] Trap strengthening (SAT) tested/added 5/4 trap constraints in 3665 ms
[2023-03-08 11:59:32] [INFO ] Deduced a trap composed of 130 places in 475 ms of which 1 ms to minimize.
[2023-03-08 11:59:32] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 759 ms
[2023-03-08 11:59:33] [INFO ] After 8252ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :7
Attempting to minimize the solution found.
Minimization took 824 ms.
[2023-03-08 11:59:34] [INFO ] After 10358ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :7
FORMULA DLCround-PT-08b-ReachabilityCardinality-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 8 Parikh solutions to 7 different solutions.
FORMULA DLCround-PT-08b-ReachabilityCardinality-01 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA DLCround-PT-08b-ReachabilityCardinality-04 FALSE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA DLCround-PT-08b-ReachabilityCardinality-05 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Parikh walk visited 3 properties in 270 ms.
Support contains 27 out of 3088 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3088/3088 places, 4732/4732 transitions.
Graph (trivial) has 2836 edges and 3088 vertex of which 510 / 3088 are part of one of the 40 SCC in 11 ms
Free SCC test removed 470 places
Drop transitions removed 528 transitions
Reduce isomorphic transitions removed 528 transitions.
Drop transitions removed 1131 transitions
Trivial Post-agglo rules discarded 1131 transitions
Performed 1131 trivial Post agglomeration. Transition count delta: 1131
Iterating post reduction 0 with 1131 rules applied. Total rules applied 1132 place count 2618 transition count 3073
Reduce places removed 1131 places and 0 transitions.
Ensure Unique test removed 39 transitions
Reduce isomorphic transitions removed 39 transitions.
Drop transitions removed 30 transitions
Trivial Post-agglo rules discarded 30 transitions
Performed 30 trivial Post agglomeration. Transition count delta: 30
Iterating post reduction 1 with 1200 rules applied. Total rules applied 2332 place count 1487 transition count 3004
Reduce places removed 30 places and 0 transitions.
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 2 with 38 rules applied. Total rules applied 2370 place count 1457 transition count 2996
Reduce places removed 4 places and 0 transitions.
Performed 11 Post agglomeration using F-continuation condition.Transition count delta: 11
Iterating post reduction 3 with 15 rules applied. Total rules applied 2385 place count 1453 transition count 2985
Reduce places removed 11 places and 0 transitions.
Iterating post reduction 4 with 11 rules applied. Total rules applied 2396 place count 1442 transition count 2985
Performed 11 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 11 Pre rules applied. Total rules applied 2396 place count 1442 transition count 2974
Deduced a syphon composed of 11 places in 10 ms
Reduce places removed 11 places and 0 transitions.
Iterating global reduction 5 with 22 rules applied. Total rules applied 2418 place count 1431 transition count 2974
Discarding 384 places :
Symmetric choice reduction at 5 with 384 rule applications. Total rules 2802 place count 1047 transition count 2590
Iterating global reduction 5 with 384 rules applied. Total rules applied 3186 place count 1047 transition count 2590
Performed 163 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 163 Pre rules applied. Total rules applied 3186 place count 1047 transition count 2427
Deduced a syphon composed of 163 places in 26 ms
Reduce places removed 163 places and 0 transitions.
Iterating global reduction 5 with 326 rules applied. Total rules applied 3512 place count 884 transition count 2427
Discarding 60 places :
Symmetric choice reduction at 5 with 60 rule applications. Total rules 3572 place count 824 transition count 1722
Iterating global reduction 5 with 60 rules applied. Total rules applied 3632 place count 824 transition count 1722
Ensure Unique test removed 19 transitions
Reduce isomorphic transitions removed 19 transitions.
Iterating post reduction 5 with 19 rules applied. Total rules applied 3651 place count 824 transition count 1703
Performed 220 Post agglomeration using F-continuation condition with reduction of 8 identical transitions.
Deduced a syphon composed of 220 places in 1 ms
Reduce places removed 220 places and 0 transitions.
Iterating global reduction 6 with 440 rules applied. Total rules applied 4091 place count 604 transition count 1475
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 6 with 7 rules applied. Total rules applied 4098 place count 604 transition count 1468
Renaming transitions due to excessive name length > 1024 char.
Discarding 1 places :
Symmetric choice reduction at 7 with 1 rule applications. Total rules 4099 place count 603 transition count 1456
Iterating global reduction 7 with 1 rules applied. Total rules applied 4100 place count 603 transition count 1456
Performed 41 Post agglomeration using F-continuation condition.Transition count delta: -387
Deduced a syphon composed of 41 places in 1 ms
Reduce places removed 41 places and 0 transitions.
Iterating global reduction 7 with 82 rules applied. Total rules applied 4182 place count 562 transition count 1843
Drop transitions removed 18 transitions
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 21 transitions.
Iterating post reduction 7 with 21 rules applied. Total rules applied 4203 place count 562 transition count 1822
Discarding 17 places :
Symmetric choice reduction at 8 with 17 rule applications. Total rules 4220 place count 545 transition count 1426
Iterating global reduction 8 with 17 rules applied. Total rules applied 4237 place count 545 transition count 1426
Ensure Unique test removed 13 transitions
Reduce isomorphic transitions removed 13 transitions.
Iterating post reduction 8 with 13 rules applied. Total rules applied 4250 place count 545 transition count 1413
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: -22
Deduced a syphon composed of 3 places in 2 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 9 with 6 rules applied. Total rules applied 4256 place count 542 transition count 1435
Drop transitions removed 161 transitions
Redundant transition composition rules discarded 161 transitions
Iterating global reduction 9 with 161 rules applied. Total rules applied 4417 place count 542 transition count 1274
Discarding 9 places :
Symmetric choice reduction at 9 with 9 rule applications. Total rules 4426 place count 533 transition count 1164
Iterating global reduction 9 with 9 rules applied. Total rules applied 4435 place count 533 transition count 1164
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 9 with 8 rules applied. Total rules applied 4443 place count 533 transition count 1156
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -18
Deduced a syphon composed of 2 places in 2 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 10 with 4 rules applied. Total rules applied 4447 place count 531 transition count 1174
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 10 with 1 rules applied. Total rules applied 4448 place count 531 transition count 1173
Free-agglomeration rule applied 307 times with reduction of 160 identical transitions.
Iterating global reduction 10 with 307 rules applied. Total rules applied 4755 place count 531 transition count 706
Reduce places removed 307 places and 0 transitions.
Drop transitions removed 322 transitions
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 326 transitions.
Graph (complete) has 550 edges and 224 vertex of which 197 are kept as prefixes of interest. Removing 27 places using SCC suffix rule.1 ms
Discarding 27 places :
Also discarding 0 output transitions
Iterating post reduction 10 with 634 rules applied. Total rules applied 5389 place count 197 transition count 380
Discarding 56 places :
Symmetric choice reduction at 11 with 56 rule applications. Total rules 5445 place count 141 transition count 291
Iterating global reduction 11 with 56 rules applied. Total rules applied 5501 place count 141 transition count 291
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 11 with 2 rules applied. Total rules applied 5503 place count 140 transition count 290
Drop transitions removed 53 transitions
Redundant transition composition rules discarded 53 transitions
Iterating global reduction 11 with 53 rules applied. Total rules applied 5556 place count 140 transition count 237
Reduce places removed 2 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 11 with 3 rules applied. Total rules applied 5559 place count 138 transition count 236
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 12 with 1 rules applied. Total rules applied 5560 place count 137 transition count 236
Discarding 16 places :
Symmetric choice reduction at 13 with 16 rule applications. Total rules 5576 place count 121 transition count 212
Iterating global reduction 13 with 16 rules applied. Total rules applied 5592 place count 121 transition count 212
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -8
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 13 with 4 rules applied. Total rules applied 5596 place count 119 transition count 220
Drop transitions removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 13 with 10 rules applied. Total rules applied 5606 place count 119 transition count 210
Free-agglomeration rule (complex) applied 1 times.
Iterating global reduction 14 with 1 rules applied. Total rules applied 5607 place count 119 transition count 215
Reduce places removed 1 places and 0 transitions.
Drop transitions removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 14 with 6 rules applied. Total rules applied 5613 place count 118 transition count 210
Partial Free-agglomeration rule applied 2 times.
Drop transitions removed 2 transitions
Iterating global reduction 15 with 2 rules applied. Total rules applied 5615 place count 118 transition count 210
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 15 with 1 rules applied. Total rules applied 5616 place count 118 transition count 209
Applied a total of 5616 rules in 789 ms. Remains 118 /3088 variables (removed 2970) and now considering 209/4732 (removed 4523) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 789 ms. Remains : 118/3088 places, 209/4732 transitions.
Finished random walk after 7056 steps, including 2 resets, run visited all 4 properties in 34 ms. (steps per millisecond=207 )
FORMULA DLCround-PT-08b-ReachabilityCardinality-13 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-08b-ReachabilityCardinality-12 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-08b-ReachabilityCardinality-08 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-08b-ReachabilityCardinality-03 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
All properties solved without resorting to model-checking.
Total runtime 14023 ms.
starting LoLA
BK_INPUT DLCround-PT-08b
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA DLCround-PT-08b-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-08b-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-08b-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-08b-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-08b-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-08b-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-08b-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-08b-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-08b-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-08b-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-08b-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-08b-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-08b-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-08b-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-08b-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-08b-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678276793814
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type EXCL) for 6 DLCround-PT-08b-ReachabilityCardinality-02
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 48 (type FNDP) for 6 DLCround-PT-08b-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 49 (type EQUN) for 6 DLCround-PT-08b-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SRCH) for 6 DLCround-PT-08b-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 48 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-02
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 49 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 51 (type SRCH) for DLCround-PT-08b-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 52 (type EXCL) for DLCround-PT-08b-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 72 (type EXCL) for 12 DLCround-PT-08b-ReachabilityCardinality-04
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 55 (type FNDP) for 30 DLCround-PT-08b-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type EQUN) for 30 DLCround-PT-08b-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SRCH) for 30 DLCround-PT-08b-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-49.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 49 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-02
lola: result : true
lola: FINISHED task # 58 (type SRCH) for DLCround-PT-08b-ReachabilityCardinality-10
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 55 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 56 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 61 (type FNDP) for 36 DLCround-PT-08b-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type EQUN) for 36 DLCround-PT-08b-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type SRCH) for 36 DLCround-PT-08b-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-56.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 56 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-10
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 64 (type SRCH) for DLCround-PT-08b-ReachabilityCardinality-12
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 61 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 62 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 68 (type FNDP) for 12 DLCround-PT-08b-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type EQUN) for 12 DLCround-PT-08b-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type SRCH) for 12 DLCround-PT-08b-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 61 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-12
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-62.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 55 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-10
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 62 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-12
lola: result : true
lola: FINISHED task # 71 (type SRCH) for DLCround-PT-08b-ReachabilityCardinality-04
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 1.000000
lola: memory pages used : 1
lola: FINISHED task # 68 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-04
lola: result : true
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-69.sara.
lola: CANCELED task # 69 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 72 (type EXCL) for DLCround-PT-08b-ReachabilityCardinality-04 (obsolete)
lola: FINISHED task # 69 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-04
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 78 (type EXCL) for 45 DLCround-PT-08b-ReachabilityCardinality-15
lola: time limit : 298 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 74 (type FNDP) for 45 DLCround-PT-08b-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type EQUN) for 45 DLCround-PT-08b-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 77 (type SRCH) for 45 DLCround-PT-08b-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 78 (type EXCL) for DLCround-PT-08b-ReachabilityCardinality-15
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 74 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 75 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 77 (type SRCH) for DLCround-PT-08b-ReachabilityCardinality-15 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 74 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-15
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 84 (type EXCL) for 27 DLCround-PT-08b-ReachabilityCardinality-09
lola: time limit : 325 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 80 (type FNDP) for 27 DLCround-PT-08b-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 81 (type EQUN) for 27 DLCround-PT-08b-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type SRCH) for 27 DLCround-PT-08b-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-75.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 83 (type SRCH) for DLCround-PT-08b-ReachabilityCardinality-09
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 80 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 81 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 84 (type EXCL) for DLCround-PT-08b-ReachabilityCardinality-09 (obsolete)
lola: FINISHED task # 75 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-15
lola: result : true
lola: FINISHED task # 80 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-09
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 92 (type EXCL) for 9 DLCround-PT-08b-ReachabilityCardinality-03
lola: time limit : 398 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 88 (type FNDP) for 9 DLCround-PT-08b-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type EQUN) for 9 DLCround-PT-08b-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 91 (type SRCH) for 9 DLCround-PT-08b-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 91 (type SRCH) for DLCround-PT-08b-ReachabilityCardinality-03
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 88 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 89 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 92 (type EXCL) for DLCround-PT-08b-ReachabilityCardinality-03 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-81.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 88 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-03
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-89.sara.
sara: place or transition ordering is non-deterministic
lola: LAUNCH task # 98 (type EXCL) for 42 DLCround-PT-08b-ReachabilityCardinality-14
lola: time limit : 398 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 94 (type FNDP) for 42 DLCround-PT-08b-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 95 (type EQUN) for 42 DLCround-PT-08b-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 97 (type SRCH) for 42 DLCround-PT-08b-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 81 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-09
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 97 (type SRCH) for DLCround-PT-08b-ReachabilityCardinality-14
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 94 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 95 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 98 (type EXCL) for DLCround-PT-08b-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 104 (type EXCL) for 18 DLCround-PT-08b-ReachabilityCardinality-06
lola: time limit : 448 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 100 (type FNDP) for 18 DLCround-PT-08b-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 101 (type EQUN) for 18 DLCround-PT-08b-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 103 (type SRCH) for 18 DLCround-PT-08b-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 104 (type EXCL) for DLCround-PT-08b-ReachabilityCardinality-06
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 100 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 101 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 103 (type SRCH) for DLCround-PT-08b-ReachabilityCardinality-06 (obsolete)
lola: FINISHED task # 89 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-03
lola: result : true
lola: FINISHED task # 100 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-06
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-101.sara.
sara: place or transition ordering is non-deterministic
FINISHED task # 94 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-14
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola:
memory pages used : 0
lola: FINISHED task # 101 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-06
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-95.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 111 (type EXCL) for 39 DLCround-PT-08b-ReachabilityCardinality-13
lola: time limit : 512 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 107 (type FNDP) for 39 DLCround-PT-08b-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 108 (type EQUN) for 39 DLCround-PT-08b-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 110 (type SRCH) for 39 DLCround-PT-08b-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 111 (type EXCL) for DLCround-PT-08b-ReachabilityCardinality-13
lola: result : true
lola: markings : 111
lola: fired transitions : 126
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 107 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 108 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 110 (type SRCH) for DLCround-PT-08b-ReachabilityCardinality-13 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 107 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-13
lola: result : true
lola: fired transitions : 5
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 95 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-14
lola: result : true
lola: LAUNCH task # 117 (type EXCL) for 15 DLCround-PT-08b-ReachabilityCardinality-05
lola: time limit : 597 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 113 (type FNDP) for 15 DLCround-PT-08b-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 114 (type EQUN) for 15 DLCround-PT-08b-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 116 (type SRCH) for 15 DLCround-PT-08b-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-108.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 117 (type EXCL) for DLCround-PT-08b-ReachabilityCardinality-05
lola: result : true
lola: markings : 17
lola: fired transitions : 16
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 113 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 114 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 116 (type SRCH) for DLCround-PT-08b-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 136 (type EXCL) for 24 DLCround-PT-08b-ReachabilityCardinality-08
lola: time limit : 716 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 126 (type FNDP) for 21 DLCround-PT-08b-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 127 (type EQUN) for 21 DLCround-PT-08b-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 129 (type SRCH) for 21 DLCround-PT-08b-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 129 (type SRCH) for DLCround-PT-08b-ReachabilityCardinality-07
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 126 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 127 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 119 (type FNDP) for 33 DLCround-PT-08b-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 120 (type EQUN) for 33 DLCround-PT-08b-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type SRCH) for 33 DLCround-PT-08b-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 108 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-13
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-114.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 126 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-07
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 113 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-127.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 122 (type SRCH) for DLCround-PT-08b-ReachabilityCardinality-11
lola: result : true
lola: markings : 8
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 119 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 120 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 145 (type FNDP) for 3 DLCround-PT-08b-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 146 (type EQUN) for 3 DLCround-PT-08b-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 148 (type SRCH) for 3 DLCround-PT-08b-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 148 (type SRCH) for DLCround-PT-08b-ReachabilityCardinality-01
lola: result : true
lola: markings : 28
lola: fired transitions : 31
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 145 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 146 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 139 (type FNDP) for 0 DLCround-PT-08b-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 140 (type EQUN) for 0 DLCround-PT-08b-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 142 (type SRCH) for 0 DLCround-PT-08b-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 145 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-01
lola: result : true
lola: fired transitions : 30
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 119 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 6
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-120.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-146.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-140.sara.
lola: FINISHED task # 127 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-07
lola: result : true
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 146 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-01
lola: result : true
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 140 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-00
lola: result : false
lola: CANCELED task # 139 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 142 (type SRCH) for DLCround-PT-08b-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 132 (type FNDP) for 24 DLCround-PT-08b-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 133 (type EQUN) for 24 DLCround-PT-08b-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 135 (type SRCH) for 24 DLCround-PT-08b-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 139 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 300091
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: FINISHED task # 135 (type SRCH) for DLCround-PT-08b-ReachabilityCardinality-08
lola: result : true
lola: markings : 91
lola: fired transitions : 112
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 132 (type FNDP) for DLCround-PT-08b-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 133 (type EQUN) for DLCround-PT-08b-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 136 (type EXCL) for DLCround-PT-08b-ReachabilityCardinality-08 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-08b-ReachabilityCardinality-00: AG true state equation
DLCround-PT-08b-ReachabilityCardinality-01: EF true tandem / insertion
DLCround-PT-08b-ReachabilityCardinality-02: EF true findpath
DLCround-PT-08b-ReachabilityCardinality-03: AG false tandem / insertion
DLCround-PT-08b-ReachabilityCardinality-04: AG false findpath
DLCround-PT-08b-ReachabilityCardinality-05: EF true tandem / relaxed
DLCround-PT-08b-ReachabilityCardinality-06: EF true tandem / relaxed
DLCround-PT-08b-ReachabilityCardinality-07: AG false tandem / insertion
DLCround-PT-08b-ReachabilityCardinality-08: EF true tandem / insertion
DLCround-PT-08b-ReachabilityCardinality-09: EF true tandem / insertion
DLCround-PT-08b-ReachabilityCardinality-10: AG false tandem / insertion
DLCround-PT-08b-ReachabilityCardinality-11: EF true tandem / insertion
DLCround-PT-08b-ReachabilityCardinality-12: EF true tandem / insertion
DLCround-PT-08b-ReachabilityCardinality-13: AG false tandem / relaxed
DLCround-PT-08b-ReachabilityCardinality-14: AG false tandem / insertion
DLCround-PT-08b-ReachabilityCardinality-15: EF true tandem / relaxed
Time elapsed: 17 secs. Pages in use: 2
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-08b"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DLCround-PT-08b, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r103-tall-167814478700710"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-08b.tgz
mv DLCround-PT-08b execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;