Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478600697.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DLCround-PT-08a, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478600697
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 948K
-rw-r--r-- 1 mcc users 6.4K Feb 25 19:02 CTLCardinality.txt
-rw-r--r-- 1 mcc users 68K Feb 25 19:02 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.9K Feb 25 18:44 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 25 18:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:53 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 15:53 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 15:53 LTLFireability.txt
-rw-r--r-- 1 mcc users 14K Feb 25 15:53 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 25 19:40 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 151K Feb 25 19:40 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.2K Feb 25 19:27 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 69K Feb 25 19:27 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 479K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-08a-CTLCardinality-00
FORMULA_NAME DLCround-PT-08a-CTLCardinality-01
FORMULA_NAME DLCround-PT-08a-CTLCardinality-02
FORMULA_NAME DLCround-PT-08a-CTLCardinality-03
FORMULA_NAME DLCround-PT-08a-CTLCardinality-04
FORMULA_NAME DLCround-PT-08a-CTLCardinality-05
FORMULA_NAME DLCround-PT-08a-CTLCardinality-06
FORMULA_NAME DLCround-PT-08a-CTLCardinality-07
FORMULA_NAME DLCround-PT-08a-CTLCardinality-08
FORMULA_NAME DLCround-PT-08a-CTLCardinality-09
FORMULA_NAME DLCround-PT-08a-CTLCardinality-10
FORMULA_NAME DLCround-PT-08a-CTLCardinality-11
FORMULA_NAME DLCround-PT-08a-CTLCardinality-12
FORMULA_NAME DLCround-PT-08a-CTLCardinality-13
FORMULA_NAME DLCround-PT-08a-CTLCardinality-14
FORMULA_NAME DLCround-PT-08a-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678275261842

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-08a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 11:34:23] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-08 11:34:23] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 11:34:23] [INFO ] Load time of PNML (sax parser for PT used): 100 ms
[2023-03-08 11:34:23] [INFO ] Transformed 263 places.
[2023-03-08 11:34:23] [INFO ] Transformed 1907 transitions.
[2023-03-08 11:34:23] [INFO ] Found NUPN structural information;
[2023-03-08 11:34:23] [INFO ] Parsed PT model containing 263 places and 1907 transitions and 7354 arcs in 171 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 9 ms.
Ensure Unique test removed 187 transitions
Reduce redundant transitions removed 187 transitions.
Support contains 93 out of 263 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 263/263 places, 1720/1720 transitions.
Discarding 13 places :
Symmetric choice reduction at 0 with 13 rule applications. Total rules 13 place count 250 transition count 1558
Iterating global reduction 0 with 13 rules applied. Total rules applied 26 place count 250 transition count 1558
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 29 place count 250 transition count 1555
Drop transitions removed 516 transitions
Redundant transition composition rules discarded 516 transitions
Iterating global reduction 1 with 516 rules applied. Total rules applied 545 place count 250 transition count 1039
Applied a total of 545 rules in 74 ms. Remains 250 /263 variables (removed 13) and now considering 1039/1720 (removed 681) transitions.
[2023-03-08 11:34:23] [INFO ] Flow matrix only has 170 transitions (discarded 869 similar events)
// Phase 1: matrix 170 rows 250 cols
[2023-03-08 11:34:23] [INFO ] Computed 157 place invariants in 17 ms
[2023-03-08 11:34:24] [INFO ] Implicit Places using invariants in 536 ms returned [106, 107, 108, 111, 112, 114, 115, 117, 119, 120, 122, 123, 124, 127, 128, 129, 131, 134, 135, 136, 138, 139, 140, 142, 144, 145, 148, 149, 150, 152, 153, 154, 155, 156, 158, 160, 161, 162, 163, 164, 166, 167, 168, 169, 170, 172, 173, 174, 175, 179, 181, 183, 184, 185, 187, 188, 189, 191, 192, 193, 196, 197, 199, 200, 203, 204, 205, 208, 210, 212, 213, 214, 215, 216, 217, 218, 219, 220, 222, 224, 225, 227, 231, 232, 233, 234, 235, 236, 238, 239, 241, 243, 246, 249]
Discarding 94 places :
Ensure Unique test removed 491 transitions
Reduce isomorphic transitions removed 491 transitions.
Implicit Place search using SMT only with invariants took 562 ms to find 94 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 156/263 places, 548/1720 transitions.
Drop transitions removed 322 transitions
Redundant transition composition rules discarded 322 transitions
Iterating global reduction 0 with 322 rules applied. Total rules applied 322 place count 156 transition count 226
Applied a total of 322 rules in 6 ms. Remains 156 /156 variables (removed 0) and now considering 226/548 (removed 322) transitions.
[2023-03-08 11:34:24] [INFO ] Flow matrix only has 170 transitions (discarded 56 similar events)
// Phase 1: matrix 170 rows 156 cols
[2023-03-08 11:34:24] [INFO ] Computed 63 place invariants in 2 ms
[2023-03-08 11:34:24] [INFO ] Implicit Places using invariants in 46 ms returned []
[2023-03-08 11:34:24] [INFO ] Flow matrix only has 170 transitions (discarded 56 similar events)
[2023-03-08 11:34:24] [INFO ] Invariant cache hit.
[2023-03-08 11:34:24] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-08 11:34:24] [INFO ] Implicit Places using invariants and state equation in 85 ms returned []
Implicit Place search using SMT with State Equation took 134 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 156/263 places, 226/1720 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 777 ms. Remains : 156/263 places, 226/1720 transitions.
Support contains 93 out of 156 places after structural reductions.
[2023-03-08 11:34:24] [INFO ] Flatten gal took : 34 ms
[2023-03-08 11:34:24] [INFO ] Flatten gal took : 12 ms
[2023-03-08 11:34:24] [INFO ] Input system was already deterministic with 226 transitions.
Support contains 87 out of 156 places (down from 93) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 597 ms. (steps per millisecond=16 ) properties (out of 60) seen :45
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 15) seen :0
Running SMT prover for 15 properties.
[2023-03-08 11:34:25] [INFO ] Flow matrix only has 170 transitions (discarded 56 similar events)
[2023-03-08 11:34:25] [INFO ] Invariant cache hit.
[2023-03-08 11:34:25] [INFO ] After 116ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:15
[2023-03-08 11:34:25] [INFO ] [Nat]Absence check using 63 positive place invariants in 8 ms returned sat
[2023-03-08 11:34:25] [INFO ] After 111ms SMT Verify possible using all constraints in natural domain returned unsat :15 sat :0
Fused 15 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 15 atomic propositions for a total of 16 simplifications.
FORMULA DLCround-PT-08a-CTLCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-08a-CTLCardinality-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-08a-CTLCardinality-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-08 11:34:25] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 10 ms
[2023-03-08 11:34:25] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA DLCround-PT-08a-CTLCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-08a-CTLCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 10 ms
[2023-03-08 11:34:25] [INFO ] Input system was already deterministic with 226 transitions.
Support contains 46 out of 156 places (down from 49) after GAL structural reductions.
Computed a total of 51 stabilizing places and 1 stable transitions
Graph (complete) has 288 edges and 156 vertex of which 106 are kept as prefixes of interest. Removing 50 places using SCC suffix rule.2 ms
Starting structural reductions in LTL mode, iteration 0 : 156/156 places, 226/226 transitions.
Reduce places removed 47 places and 0 transitions.
Iterating post reduction 0 with 47 rules applied. Total rules applied 47 place count 109 transition count 226
Discarding 13 places :
Symmetric choice reduction at 1 with 13 rule applications. Total rules 60 place count 96 transition count 200
Iterating global reduction 1 with 13 rules applied. Total rules applied 73 place count 96 transition count 200
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 74 place count 96 transition count 199
Applied a total of 74 rules in 3 ms. Remains 96 /156 variables (removed 60) and now considering 199/226 (removed 27) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 96/156 places, 199/226 transitions.
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 11 ms
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 6 ms
[2023-03-08 11:34:25] [INFO ] Input system was already deterministic with 199 transitions.
Starting structural reductions in LTL mode, iteration 0 : 156/156 places, 226/226 transitions.
Reduce places removed 48 places and 0 transitions.
Iterating post reduction 0 with 48 rules applied. Total rules applied 48 place count 108 transition count 226
Discarding 13 places :
Symmetric choice reduction at 1 with 13 rule applications. Total rules 61 place count 95 transition count 200
Iterating global reduction 1 with 13 rules applied. Total rules applied 74 place count 95 transition count 200
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 75 place count 95 transition count 199
Applied a total of 75 rules in 3 ms. Remains 95 /156 variables (removed 61) and now considering 199/226 (removed 27) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 95/156 places, 199/226 transitions.
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-08 11:34:25] [INFO ] Input system was already deterministic with 199 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 156/156 places, 226/226 transitions.
Graph (trivial) has 216 edges and 156 vertex of which 100 / 156 are part of one of the 13 SCC in 3 ms
Free SCC test removed 87 places
Ensure Unique test removed 200 transitions
Reduce isomorphic transitions removed 200 transitions.
Graph (complete) has 88 edges and 69 vertex of which 20 are kept as prefixes of interest. Removing 49 places using SCC suffix rule.0 ms
Discarding 49 places :
Also discarding 0 output transitions
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 12 place count 10 transition count 16
Iterating global reduction 0 with 10 rules applied. Total rules applied 22 place count 10 transition count 16
Applied a total of 22 rules in 8 ms. Remains 10 /156 variables (removed 146) and now considering 16/226 (removed 210) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 10/156 places, 16/226 transitions.
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 0 ms
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 0 ms
[2023-03-08 11:34:25] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 156/156 places, 226/226 transitions.
Graph (trivial) has 219 edges and 156 vertex of which 101 / 156 are part of one of the 14 SCC in 1 ms
Free SCC test removed 87 places
Ensure Unique test removed 200 transitions
Reduce isomorphic transitions removed 200 transitions.
Graph (complete) has 88 edges and 69 vertex of which 19 are kept as prefixes of interest. Removing 50 places using SCC suffix rule.1 ms
Discarding 50 places :
Also discarding 0 output transitions
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 19 transition count 25
Reduce places removed 1 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 5 place count 18 transition count 24
Discarding 10 places :
Symmetric choice reduction at 2 with 10 rule applications. Total rules 15 place count 8 transition count 14
Iterating global reduction 2 with 10 rules applied. Total rules applied 25 place count 8 transition count 14
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 26 place count 8 transition count 13
Applied a total of 26 rules in 4 ms. Remains 8 /156 variables (removed 148) and now considering 13/226 (removed 213) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 8/156 places, 13/226 transitions.
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 1 ms
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 0 ms
[2023-03-08 11:34:25] [INFO ] Input system was already deterministic with 13 transitions.
Starting structural reductions in LTL mode, iteration 0 : 156/156 places, 226/226 transitions.
Reduce places removed 46 places and 0 transitions.
Iterating post reduction 0 with 46 rules applied. Total rules applied 46 place count 110 transition count 226
Discarding 11 places :
Symmetric choice reduction at 1 with 11 rule applications. Total rules 57 place count 99 transition count 204
Iterating global reduction 1 with 11 rules applied. Total rules applied 68 place count 99 transition count 204
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 69 place count 99 transition count 203
Applied a total of 69 rules in 3 ms. Remains 99 /156 variables (removed 57) and now considering 203/226 (removed 23) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 99/156 places, 203/226 transitions.
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-08 11:34:25] [INFO ] Input system was already deterministic with 203 transitions.
Starting structural reductions in LTL mode, iteration 0 : 156/156 places, 226/226 transitions.
Reduce places removed 49 places and 0 transitions.
Iterating post reduction 0 with 49 rules applied. Total rules applied 49 place count 107 transition count 226
Discarding 13 places :
Symmetric choice reduction at 1 with 13 rule applications. Total rules 62 place count 94 transition count 200
Iterating global reduction 1 with 13 rules applied. Total rules applied 75 place count 94 transition count 200
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 76 place count 94 transition count 199
Applied a total of 76 rules in 2 ms. Remains 94 /156 variables (removed 62) and now considering 199/226 (removed 27) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 94/156 places, 199/226 transitions.
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-08 11:34:25] [INFO ] Input system was already deterministic with 199 transitions.
Starting structural reductions in LTL mode, iteration 0 : 156/156 places, 226/226 transitions.
Reduce places removed 50 places and 0 transitions.
Iterating post reduction 0 with 50 rules applied. Total rules applied 50 place count 106 transition count 226
Discarding 13 places :
Symmetric choice reduction at 1 with 13 rule applications. Total rules 63 place count 93 transition count 200
Iterating global reduction 1 with 13 rules applied. Total rules applied 76 place count 93 transition count 200
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 77 place count 93 transition count 199
Applied a total of 77 rules in 3 ms. Remains 93 /156 variables (removed 63) and now considering 199/226 (removed 27) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 93/156 places, 199/226 transitions.
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 6 ms
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-08 11:34:25] [INFO ] Input system was already deterministic with 199 transitions.
Starting structural reductions in LTL mode, iteration 0 : 156/156 places, 226/226 transitions.
Reduce places removed 48 places and 0 transitions.
Iterating post reduction 0 with 48 rules applied. Total rules applied 48 place count 108 transition count 226
Discarding 11 places :
Symmetric choice reduction at 1 with 11 rule applications. Total rules 59 place count 97 transition count 204
Iterating global reduction 1 with 11 rules applied. Total rules applied 70 place count 97 transition count 204
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 71 place count 97 transition count 203
Applied a total of 71 rules in 3 ms. Remains 97 /156 variables (removed 59) and now considering 203/226 (removed 23) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 97/156 places, 203/226 transitions.
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-08 11:34:25] [INFO ] Input system was already deterministic with 203 transitions.
Starting structural reductions in LTL mode, iteration 0 : 156/156 places, 226/226 transitions.
Reduce places removed 48 places and 0 transitions.
Iterating post reduction 0 with 48 rules applied. Total rules applied 48 place count 108 transition count 226
Discarding 12 places :
Symmetric choice reduction at 1 with 12 rule applications. Total rules 60 place count 96 transition count 202
Iterating global reduction 1 with 12 rules applied. Total rules applied 72 place count 96 transition count 202
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 73 place count 96 transition count 201
Applied a total of 73 rules in 2 ms. Remains 96 /156 variables (removed 60) and now considering 201/226 (removed 25) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 96/156 places, 201/226 transitions.
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-08 11:34:25] [INFO ] Input system was already deterministic with 201 transitions.
Starting structural reductions in LTL mode, iteration 0 : 156/156 places, 226/226 transitions.
Reduce places removed 46 places and 0 transitions.
Iterating post reduction 0 with 46 rules applied. Total rules applied 46 place count 110 transition count 226
Discarding 11 places :
Symmetric choice reduction at 1 with 11 rule applications. Total rules 57 place count 99 transition count 204
Iterating global reduction 1 with 11 rules applied. Total rules applied 68 place count 99 transition count 204
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 69 place count 99 transition count 203
Applied a total of 69 rules in 2 ms. Remains 99 /156 variables (removed 57) and now considering 203/226 (removed 23) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 99/156 places, 203/226 transitions.
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 5 ms
[2023-03-08 11:34:25] [INFO ] Input system was already deterministic with 203 transitions.
Starting structural reductions in LTL mode, iteration 0 : 156/156 places, 226/226 transitions.
Reduce places removed 48 places and 0 transitions.
Iterating post reduction 0 with 48 rules applied. Total rules applied 48 place count 108 transition count 226
Discarding 12 places :
Symmetric choice reduction at 1 with 12 rule applications. Total rules 60 place count 96 transition count 202
Iterating global reduction 1 with 12 rules applied. Total rules applied 72 place count 96 transition count 202
Applied a total of 72 rules in 2 ms. Remains 96 /156 variables (removed 60) and now considering 202/226 (removed 24) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 96/156 places, 202/226 transitions.
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 4 ms
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 4 ms
[2023-03-08 11:34:25] [INFO ] Input system was already deterministic with 202 transitions.
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 6 ms
[2023-03-08 11:34:25] [INFO ] Flatten gal took : 6 ms
[2023-03-08 11:34:25] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 1 ms.
[2023-03-08 11:34:25] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 156 places, 226 transitions and 514 arcs took 1 ms.
Total runtime 2523 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DLCround-PT-08a
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372

FORMULA DLCround-PT-08a-CTLCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-08a-CTLCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-08a-CTLCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-08a-CTLCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678275566389

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:287
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:287
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 1 (type EXCL) for 0 DLCround-PT-08a-CTLCardinality-00
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 41 (type FNDP) for 22 DLCround-PT-08a-CTLCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 38 (type FNDP) for 6 DLCround-PT-08a-CTLCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 39 (type EQUN) for 6 DLCround-PT-08a-CTLCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 38 (type FNDP) for DLCround-PT-08a-CTLCardinality-05
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 39 (type EQUN) for DLCround-PT-08a-CTLCardinality-05 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/372/CTLCardinality-39.sara.

lola: FINISHED task # 39 (type EQUN) for DLCround-PT-08a-CTLCardinality-05
lola: result : true
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1 CTL EXCL 5/360 4/32 DLCround-PT-08a-CTLCardinality-00 691045 m, 138209 m/sec, 5070466 t fired, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/360 7/32 DLCround-PT-08a-CTLCardinality-00 1291161 m, 120023 m/sec, 9842067 t fired, .
41 EF DL FNDP 10/3600 0/5 DLCround-PT-08a-CTLCardinality-11 221411379 t fired, 222 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 15/360 10/32 DLCround-PT-08a-CTLCardinality-00 1930744 m, 127916 m/sec, 14858488 t fired, .
41 EF DL FNDP 15/3600 0/5 DLCround-PT-08a-CTLCardinality-11 333251612 t fired, 334 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 20/360 12/32 DLCround-PT-08a-CTLCardinality-00 2545180 m, 122887 m/sec, 19724379 t fired, .
41 EF DL FNDP 20/3600 0/5 DLCround-PT-08a-CTLCardinality-11 445307248 t fired, 446 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 25/360 15/32 DLCround-PT-08a-CTLCardinality-00 3132858 m, 117535 m/sec, 24427718 t fired, .
41 EF DL FNDP 25/3600 0/5 DLCround-PT-08a-CTLCardinality-11 557115685 t fired, 558 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 30/360 18/32 DLCround-PT-08a-CTLCardinality-00 3702414 m, 113911 m/sec, 29003701 t fired, .
41 EF DL FNDP 30/3600 0/5 DLCround-PT-08a-CTLCardinality-11 668976266 t fired, 669 attempts, .

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1 CTL EXCL 35/360 20/32 DLCround-PT-08a-CTLCardinality-00 4255316 m, 110580 m/sec, 33543067 t fired, .
41 EF DL FNDP 35/3600 0/5 DLCround-PT-08a-CTLCardinality-11 780870073 t fired, 781 attempts, .

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1 CTL EXCL 40/360 23/32 DLCround-PT-08a-CTLCardinality-00 4792769 m, 107490 m/sec, 38067897 t fired, .
41 EF DL FNDP 40/3600 0/5 DLCround-PT-08a-CTLCardinality-11 892842466 t fired, 893 attempts, .

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1 CTL EXCL 45/360 25/32 DLCround-PT-08a-CTLCardinality-00 5326454 m, 106737 m/sec, 42525485 t fired, .
41 EF DL FNDP 45/3600 0/5 DLCround-PT-08a-CTLCardinality-11 1004665981 t fired, 1005 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 50/360 28/32 DLCround-PT-08a-CTLCardinality-00 5902197 m, 115148 m/sec, 46948987 t fired, .
41 EF DL FNDP 50/3600 0/5 DLCround-PT-08a-CTLCardinality-11 1116486319 t fired, 1117 attempts, .

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1 CTL EXCL 55/360 30/32 DLCround-PT-08a-CTLCardinality-00 6446903 m, 108941 m/sec, 51254352 t fired, .
41 EF DL FNDP 55/3600 0/5 DLCround-PT-08a-CTLCardinality-11 1228323685 t fired, 1229 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 60/360 32/32 DLCround-PT-08a-CTLCardinality-00 6969236 m, 104466 m/sec, 55601623 t fired, .
41 EF DL FNDP 60/3600 0/5 DLCround-PT-08a-CTLCardinality-11 1340139894 t fired, 1341 attempts, .

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DLCround-PT-08a-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 EF DL FNDP 65/3600 0/5 DLCround-PT-08a-CTLCardinality-11 1453952890 t fired, 1454 attempts, .

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DLCround-PT-08a-CTLCardinality-05: DISJ true findpath
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 5/441 5/32 DLCround-PT-08a-CTLCardinality-14 1052482 m, 210496 m/sec, 5322574 t fired, .
41 EF DL FNDP 70/3600 0/5 DLCround-PT-08a-CTLCardinality-11 1568090821 t fired, 1569 attempts, .

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DLCround-PT-08a-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 11/441 9/32 DLCround-PT-08a-CTLCardinality-14 2009965 m, 191496 m/sec, 10210155 t fired, .
41 EF DL FNDP 76/3600 0/5 DLCround-PT-08a-CTLCardinality-11 1682131616 t fired, 1683 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 16/441 13/32 DLCround-PT-08a-CTLCardinality-14 2934618 m, 184930 m/sec, 15077187 t fired, .
41 EF DL FNDP 81/3600 0/5 DLCround-PT-08a-CTLCardinality-11 1796282192 t fired, 1797 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 21/441 17/32 DLCround-PT-08a-CTLCardinality-14 3885446 m, 190165 m/sec, 19890339 t fired, .
41 EF DL FNDP 86/3600 0/5 DLCround-PT-08a-CTLCardinality-11 1910271857 t fired, 1911 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 26/441 22/32 DLCround-PT-08a-CTLCardinality-14 4839483 m, 190807 m/sec, 24770410 t fired, .
41 EF DL FNDP 91/3600 0/5 DLCround-PT-08a-CTLCardinality-11 2024342662 t fired, 2025 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 31/441 25/32 DLCround-PT-08a-CTLCardinality-14 5738080 m, 179719 m/sec, 29442256 t fired, .
41 EF DL FNDP 96/3600 0/5 DLCround-PT-08a-CTLCardinality-11 2138310009 t fired, 2139 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 36/441 29/32 DLCround-PT-08a-CTLCardinality-14 6609695 m, 174323 m/sec, 33988334 t fired, .
41 EF DL FNDP 101/3600 0/5 DLCround-PT-08a-CTLCardinality-11 -2042546012 t fired, 2253 attempts, .

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41 EF DL FNDP 106/3600 0/5 DLCround-PT-08a-CTLCardinality-11 -1928531830 t fired, 2367 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 5/499 4/32 DLCround-PT-08a-CTLCardinality-13 841078 m, 168215 m/sec, 4523821 t fired, .
41 EF DL FNDP 111/3600 0/5 DLCround-PT-08a-CTLCardinality-11 -1814536360 t fired, 2481 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 10/499 8/32 DLCround-PT-08a-CTLCardinality-13 1516993 m, 135183 m/sec, 8642269 t fired, .
41 EF DL FNDP 116/3600 0/5 DLCround-PT-08a-CTLCardinality-11 -1700398802 t fired, 2595 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 15/499 11/32 DLCround-PT-08a-CTLCardinality-13 2273492 m, 151299 m/sec, 12991214 t fired, .
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29 CTL EXCL 20/499 14/32 DLCround-PT-08a-CTLCardinality-13 2926219 m, 130545 m/sec, 16874855 t fired, .
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29 CTL EXCL 25/499 17/32 DLCround-PT-08a-CTLCardinality-13 3554036 m, 125563 m/sec, 20690718 t fired, .
41 EF DL FNDP 131/3600 0/5 DLCround-PT-08a-CTLCardinality-11 -1358418555 t fired, 2937 attempts, .

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29 CTL EXCL 30/499 20/32 DLCround-PT-08a-CTLCardinality-13 4173486 m, 123890 m/sec, 24511849 t fired, .
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29 CTL EXCL 35/499 23/32 DLCround-PT-08a-CTLCardinality-13 4763329 m, 117968 m/sec, 28282387 t fired, .
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29 CTL EXCL 40/499 25/32 DLCround-PT-08a-CTLCardinality-13 5344923 m, 116318 m/sec, 31980909 t fired, .
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29 CTL EXCL 45/499 28/32 DLCround-PT-08a-CTLCardinality-13 5996317 m, 130278 m/sec, 35624098 t fired, .
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29 CTL EXCL 50/499 31/32 DLCround-PT-08a-CTLCardinality-13 6580624 m, 116861 m/sec, 39145401 t fired, .
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17 CTL EXCL 5/859 4/32 DLCround-PT-08a-CTLCardinality-09 659027 m, 131805 m/sec, 4974761 t fired, .
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17 CTL EXCL 10/859 6/32 DLCround-PT-08a-CTLCardinality-09 1268661 m, 121926 m/sec, 9605949 t fired, .
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17 CTL EXCL 15/859 9/32 DLCround-PT-08a-CTLCardinality-09 1818015 m, 109870 m/sec, 14155550 t fired, .
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17 CTL EXCL 20/859 12/32 DLCround-PT-08a-CTLCardinality-09 2398447 m, 116086 m/sec, 19034358 t fired, .
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17 CTL EXCL 25/859 14/32 DLCround-PT-08a-CTLCardinality-09 2977353 m, 115781 m/sec, 23559983 t fired, .
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17 CTL EXCL 30/859 17/32 DLCround-PT-08a-CTLCardinality-09 3497449 m, 104019 m/sec, 27854311 t fired, .
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17 CTL EXCL 35/859 19/32 DLCround-PT-08a-CTLCardinality-09 4078650 m, 116240 m/sec, 32151099 t fired, .
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17 CTL EXCL 40/859 22/32 DLCround-PT-08a-CTLCardinality-09 4577819 m, 99833 m/sec, 36324500 t fired, .
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/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 467 Killed lola --conf=$BIN_DIR/configfiles/ctlcardinalityconf --formula=$DIR/CTLCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-08a"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DLCround-PT-08a, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r103-tall-167814478600697"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-08a.tgz
mv DLCround-PT-08a execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;