Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478600654.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DLCround-PT-05a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478600654
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 792K
-rw-r--r-- 1 mcc users 8.0K Feb 25 18:35 CTLCardinality.txt
-rw-r--r-- 1 mcc users 89K Feb 25 18:35 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.2K Feb 25 18:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K Feb 25 18:28 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 15:52 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 15:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 25 18:46 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 161K Feb 25 18:46 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 18:40 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 95K Feb 25 18:40 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:52 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:52 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 259K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-00
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-01
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-02
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-03
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-04
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-05
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-06
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-07
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-08
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-09
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-10
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-11
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-12
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-13
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-14
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678272978122

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-05a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 10:56:19] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-08 10:56:19] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 10:56:19] [INFO ] Load time of PNML (sax parser for PT used): 81 ms
[2023-03-08 10:56:19] [INFO ] Transformed 167 places.
[2023-03-08 10:56:19] [INFO ] Transformed 1055 transitions.
[2023-03-08 10:56:19] [INFO ] Found NUPN structural information;
[2023-03-08 10:56:19] [INFO ] Parsed PT model containing 167 places and 1055 transitions and 3985 arcs in 148 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 17 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 6 formulas.
Ensure Unique test removed 112 transitions
Reduce redundant transitions removed 112 transitions.
FORMULA DLCround-PT-05a-ReachabilityCardinality-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-05a-ReachabilityCardinality-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-05a-ReachabilityCardinality-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-05a-ReachabilityCardinality-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-05a-ReachabilityCardinality-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-05a-ReachabilityCardinality-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-05a-ReachabilityCardinality-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-05a-ReachabilityCardinality-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 223 ms. (steps per millisecond=44 ) properties (out of 8) seen :5
FORMULA DLCround-PT-05a-ReachabilityCardinality-15 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-05a-ReachabilityCardinality-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-05a-ReachabilityCardinality-09 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-05a-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-05a-ReachabilityCardinality-05 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 57 ms. (steps per millisecond=175 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
[2023-03-08 10:56:20] [INFO ] Flow matrix only has 138 transitions (discarded 805 similar events)
// Phase 1: matrix 138 rows 167 cols
[2023-03-08 10:56:20] [INFO ] Computed 88 place invariants in 9 ms
[2023-03-08 10:56:20] [INFO ] After 220ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-08 10:56:20] [INFO ] [Nat]Absence check using 88 positive place invariants in 15 ms returned sat
[2023-03-08 10:56:20] [INFO ] After 106ms SMT Verify possible using all constraints in natural domain returned unsat :3 sat :0
FORMULA DLCround-PT-05a-ReachabilityCardinality-04 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-05a-ReachabilityCardinality-02 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-05a-ReachabilityCardinality-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 3 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 1139 ms.
starting LoLA
BK_INPUT DLCround-PT-05a
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA DLCround-PT-05a-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678272982635

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 43 (type CNST) for 42 DLCround-PT-05a-ReachabilityCardinality-14
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 43 (type CNST) for DLCround-PT-05a-ReachabilityCardinality-14
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 50 (type SKEL/FNDP) for 27 DLCround-PT-05a-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SKEL/EQUN) for 27 DLCround-PT-05a-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/SRCH) for 27 DLCround-PT-05a-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 59 (type SKEL/SRCH) for 27 DLCround-PT-05a-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 59 (type SKEL/SRCH) for DLCround-PT-05a-ReachabilityCardinality-09
lola: result : true
lola: markings : 14
lola: fired transitions : 28
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 50 (type FNDP) for DLCround-PT-05a-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 51 (type EQUN) for DLCround-PT-05a-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 58 (type SRCH) for DLCround-PT-05a-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 54 (type SKEL/FNDP) for 45 DLCround-PT-05a-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 55 (type SKEL/EQUN) for 45 DLCround-PT-05a-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 61 (type SKEL/SRCH) for 45 DLCround-PT-05a-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type SKEL/SRCH) for 45 DLCround-PT-05a-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 50 (type SKEL/FNDP) for DLCround-PT-05a-ReachabilityCardinality-09
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: Rule S: 0 transitions removed,0 places removed
lola: FINISHED task # 61 (type SKEL/SRCH) for DLCround-PT-05a-ReachabilityCardinality-15
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 54 (type SKEL/FNDP) for DLCround-PT-05a-ReachabilityCardinality-15
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 55 (type EQUN) for DLCround-PT-05a-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 62 (type SRCH) for DLCround-PT-05a-ReachabilityCardinality-15 (obsolete)
lola: FINISHED task # 55 (type SKEL/EQUN) for DLCround-PT-05a-ReachabilityCardinality-15
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 7 (type CNST) for 6 DLCround-PT-05a-ReachabilityCardinality-02
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 7 (type CNST) for DLCround-PT-05a-ReachabilityCardinality-02
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-51.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 51 (type SKEL/EQUN) for DLCround-PT-05a-ReachabilityCardinality-09
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 91 (type EXCL) for 33 DLCround-PT-05a-ReachabilityCardinality-11
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 74 (type FNDP) for 15 DLCround-PT-05a-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type EQUN) for 15 DLCround-PT-05a-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 77 (type SRCH) for 15 DLCround-PT-05a-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 77 (type SRCH) for DLCround-PT-05a-ReachabilityCardinality-05
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 74 (type FNDP) for DLCround-PT-05a-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 75 (type EQUN) for DLCround-PT-05a-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 67 (type FNDP) for 12 DLCround-PT-05a-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 68 (type EQUN) for 12 DLCround-PT-05a-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type SRCH) for 12 DLCround-PT-05a-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 91 (type EXCL) for DLCround-PT-05a-ReachabilityCardinality-11
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 74 (type FNDP) for DLCround-PT-05a-ReachabilityCardinality-05
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 98 (type EXCL) for 0 DLCround-PT-05a-ReachabilityCardinality-00
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-75.sara.
sara: place or transition ordering is non-deterministic

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 98 (type EXCL) for DLCround-PT-05a-ReachabilityCardinality-00
lola: result : false
lola: markings : 9
lola: fired transitions : 66
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 118 (type EXCL) for 24 DLCround-PT-05a-ReachabilityCardinality-08
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 75 (type EQUN) for DLCround-PT-05a-ReachabilityCardinality-05
lola: result : true
lola: FINISHED task # 70 (type SRCH) for DLCround-PT-05a-ReachabilityCardinality-04
lola: result : false
lola: markings : 27
lola: fired transitions : 217
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 118 (type EXCL) for DLCround-PT-05a-ReachabilityCardinality-08
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 67 (type FNDP) for DLCround-PT-05a-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 68 (type EQUN) for DLCround-PT-05a-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 157 (type EXCL) for 45 DLCround-PT-05a-ReachabilityCardinality-15
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 146 (type FNDP) for 27 DLCround-PT-05a-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 147 (type EQUN) for 27 DLCround-PT-05a-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 149 (type SRCH) for 27 DLCround-PT-05a-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 149 (type SRCH) for DLCround-PT-05a-ReachabilityCardinality-09
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 146 (type FNDP) for DLCround-PT-05a-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 147 (type EQUN) for DLCround-PT-05a-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 120 (type FNDP) for 9 DLCround-PT-05a-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 128 (type EQUN) for 9 DLCround-PT-05a-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 137 (type SRCH) for 9 DLCround-PT-05a-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 157 (type EXCL) for DLCround-PT-05a-ReachabilityCardinality-15
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 144 (type EXCL) for 39 DLCround-PT-05a-ReachabilityCardinality-13
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 67 (type FNDP) for DLCround-PT-05a-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 28963
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 146 (type FNDP) for DLCround-PT-05a-ReachabilityCardinality-09
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 144 (type EXCL) for DLCround-PT-05a-ReachabilityCardinality-13
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 84 (type EXCL) for 36 DLCround-PT-05a-ReachabilityCardinality-12
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 84 (type EXCL) for DLCround-PT-05a-ReachabilityCardinality-12
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 111 (type EXCL) for 21 DLCround-PT-05a-ReachabilityCardinality-07
lola: time limit : 719 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-68.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-147.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 111 (type EXCL) for DLCround-PT-05a-ReachabilityCardinality-07
lola: result : true
lola: markings : 6
lola: fired transitions : 14
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 124 (type EXCL) for 30 DLCround-PT-05a-ReachabilityCardinality-10
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 147 (type EQUN) for DLCround-PT-05a-ReachabilityCardinality-09
lola: result : true
lola: FINISHED task # 137 (type SRCH) for DLCround-PT-05a-ReachabilityCardinality-03
lola: result : false
lola: markings : 322
lola: fired transitions : 3173
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 124 (type EXCL) for DLCround-PT-05a-ReachabilityCardinality-10
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 120 (type FNDP) for DLCround-PT-05a-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 128 (type EQUN) for DLCround-PT-05a-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 106 (type EXCL) for 3 DLCround-PT-05a-ReachabilityCardinality-01
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 119 (type FNDP) for 18 DLCround-PT-05a-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 126 (type EQUN) for 18 DLCround-PT-05a-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 131 (type SRCH) for 18 DLCround-PT-05a-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 120 (type FNDP) for DLCround-PT-05a-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 18612
lola: tried executions : 126
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 106 (type EXCL) for DLCround-PT-05a-ReachabilityCardinality-01
lola: result : false
lola: markings : 67
lola: fired transitions : 549
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 132 (type EXCL) for 18 DLCround-PT-05a-ReachabilityCardinality-06
lola: time limit : 3599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 131 (type SRCH) for DLCround-PT-05a-ReachabilityCardinality-06
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 119 (type FNDP) for DLCround-PT-05a-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 126 (type EQUN) for DLCround-PT-05a-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 132 (type EXCL) for DLCround-PT-05a-ReachabilityCardinality-06 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-05a-ReachabilityCardinality-00: AG true tandem / relaxed
DLCround-PT-05a-ReachabilityCardinality-01: AG true tandem / relaxed
DLCround-PT-05a-ReachabilityCardinality-02: INITIAL true preprocessing
DLCround-PT-05a-ReachabilityCardinality-03: EF false tandem / insertion
DLCround-PT-05a-ReachabilityCardinality-04: AG true tandem / insertion
DLCround-PT-05a-ReachabilityCardinality-05: AG false tandem / insertion
DLCround-PT-05a-ReachabilityCardinality-06: AG false tandem / insertion
DLCround-PT-05a-ReachabilityCardinality-07: EF true tandem / relaxed
DLCround-PT-05a-ReachabilityCardinality-08: AG false tandem / relaxed
DLCround-PT-05a-ReachabilityCardinality-09: AG false tandem / insertion
DLCround-PT-05a-ReachabilityCardinality-10: AG false tandem / relaxed
DLCround-PT-05a-ReachabilityCardinality-11: AG false tandem / relaxed
DLCround-PT-05a-ReachabilityCardinality-12: EF true tandem / relaxed
DLCround-PT-05a-ReachabilityCardinality-13: AG false tandem / relaxed
DLCround-PT-05a-ReachabilityCardinality-14: INITIAL true preprocessing
DLCround-PT-05a-ReachabilityCardinality-15: AG false tandem / relaxed


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-05a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DLCround-PT-05a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r103-tall-167814478600654"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-05a.tgz
mv DLCround-PT-05a execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;