fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r103-tall-167814478600649
Last Updated
May 14, 2023

About the Execution of LoLa+red for DLCround-PT-05a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
2913.399 3600000.00 143078.00 9603.60 TTFFF?FTT?TTFTFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478600649.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DLCround-PT-05a, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478600649
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 792K
-rw-r--r-- 1 mcc users 8.0K Feb 25 18:35 CTLCardinality.txt
-rw-r--r-- 1 mcc users 89K Feb 25 18:35 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.2K Feb 25 18:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K Feb 25 18:28 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 15:52 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 15:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 25 18:46 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 161K Feb 25 18:46 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 18:40 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 95K Feb 25 18:40 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:52 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:52 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 259K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-05a-CTLCardinality-00
FORMULA_NAME DLCround-PT-05a-CTLCardinality-01
FORMULA_NAME DLCround-PT-05a-CTLCardinality-02
FORMULA_NAME DLCround-PT-05a-CTLCardinality-03
FORMULA_NAME DLCround-PT-05a-CTLCardinality-04
FORMULA_NAME DLCround-PT-05a-CTLCardinality-05
FORMULA_NAME DLCround-PT-05a-CTLCardinality-06
FORMULA_NAME DLCround-PT-05a-CTLCardinality-07
FORMULA_NAME DLCround-PT-05a-CTLCardinality-08
FORMULA_NAME DLCround-PT-05a-CTLCardinality-09
FORMULA_NAME DLCround-PT-05a-CTLCardinality-10
FORMULA_NAME DLCround-PT-05a-CTLCardinality-11
FORMULA_NAME DLCround-PT-05a-CTLCardinality-12
FORMULA_NAME DLCround-PT-05a-CTLCardinality-13
FORMULA_NAME DLCround-PT-05a-CTLCardinality-14
FORMULA_NAME DLCround-PT-05a-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678272521879

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-05a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 10:48:43] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-08 10:48:43] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 10:48:43] [INFO ] Load time of PNML (sax parser for PT used): 77 ms
[2023-03-08 10:48:43] [INFO ] Transformed 167 places.
[2023-03-08 10:48:43] [INFO ] Transformed 1055 transitions.
[2023-03-08 10:48:43] [INFO ] Found NUPN structural information;
[2023-03-08 10:48:43] [INFO ] Parsed PT model containing 167 places and 1055 transitions and 3985 arcs in 147 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 12 ms.
Initial state reduction rules removed 2 formulas.
Ensure Unique test removed 112 transitions
Reduce redundant transitions removed 112 transitions.
FORMULA DLCround-PT-05a-CTLCardinality-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-05a-CTLCardinality-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 83 out of 167 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 167/167 places, 943/943 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 162 transition count 900
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 162 transition count 900
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 12 place count 162 transition count 898
Drop transitions removed 300 transitions
Redundant transition composition rules discarded 300 transitions
Iterating global reduction 1 with 300 rules applied. Total rules applied 312 place count 162 transition count 598
Applied a total of 312 rules in 47 ms. Remains 162 /167 variables (removed 5) and now considering 598/943 (removed 345) transitions.
[2023-03-08 10:48:43] [INFO ] Flow matrix only has 131 transitions (discarded 467 similar events)
// Phase 1: matrix 131 rows 162 cols
[2023-03-08 10:48:43] [INFO ] Computed 88 place invariants in 8 ms
[2023-03-08 10:48:43] [INFO ] Implicit Places using invariants in 347 ms returned [84, 85, 86, 87, 88, 89, 90, 91, 94, 95, 96, 97, 101, 102, 103, 104, 106, 107, 108, 109, 110, 115, 117, 118, 120, 121, 122, 124, 132, 134, 137, 138, 139, 143, 144, 145, 146, 149, 150, 154, 160]
Discarding 41 places :
Ensure Unique test removed 188 transitions
Reduce isomorphic transitions removed 188 transitions.
Implicit Place search using SMT only with invariants took 373 ms to find 41 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 121/167 places, 410/943 transitions.
Drop transitions removed 233 transitions
Redundant transition composition rules discarded 233 transitions
Iterating global reduction 0 with 233 rules applied. Total rules applied 233 place count 121 transition count 177
Applied a total of 233 rules in 4 ms. Remains 121 /121 variables (removed 0) and now considering 177/410 (removed 233) transitions.
[2023-03-08 10:48:43] [INFO ] Flow matrix only has 131 transitions (discarded 46 similar events)
// Phase 1: matrix 131 rows 121 cols
[2023-03-08 10:48:43] [INFO ] Computed 47 place invariants in 1 ms
[2023-03-08 10:48:43] [INFO ] Implicit Places using invariants in 36 ms returned []
[2023-03-08 10:48:43] [INFO ] Flow matrix only has 131 transitions (discarded 46 similar events)
[2023-03-08 10:48:43] [INFO ] Invariant cache hit.
[2023-03-08 10:48:44] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-08 10:48:44] [INFO ] Implicit Places using invariants and state equation in 67 ms returned []
Implicit Place search using SMT with State Equation took 105 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 121/167 places, 177/943 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 529 ms. Remains : 121/167 places, 177/943 transitions.
Support contains 83 out of 121 places after structural reductions.
[2023-03-08 10:48:44] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-08 10:48:44] [INFO ] Flatten gal took : 30 ms
[2023-03-08 10:48:44] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA DLCround-PT-05a-CTLCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA DLCround-PT-05a-CTLCardinality-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-08 10:48:44] [INFO ] Flatten gal took : 12 ms
[2023-03-08 10:48:44] [INFO ] Input system was already deterministic with 177 transitions.
Support contains 69 out of 121 places (down from 83) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 420 ms. (steps per millisecond=23 ) properties (out of 49) seen :43
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 6) seen :0
Running SMT prover for 6 properties.
[2023-03-08 10:48:44] [INFO ] Flow matrix only has 131 transitions (discarded 46 similar events)
[2023-03-08 10:48:44] [INFO ] Invariant cache hit.
[2023-03-08 10:48:44] [INFO ] After 75ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:6
[2023-03-08 10:48:44] [INFO ] [Nat]Absence check using 47 positive place invariants in 6 ms returned sat
[2023-03-08 10:48:44] [INFO ] After 52ms SMT Verify possible using all constraints in natural domain returned unsat :6 sat :0
Fused 6 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 6 atomic propositions for a total of 9 simplifications.
FORMULA DLCround-PT-05a-CTLCardinality-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-08 10:48:44] [INFO ] Flatten gal took : 12 ms
[2023-03-08 10:48:44] [INFO ] Flatten gal took : 8 ms
[2023-03-08 10:48:44] [INFO ] Input system was already deterministic with 177 transitions.
Support contains 57 out of 121 places (down from 59) after GAL structural reductions.
Computed a total of 38 stabilizing places and 1 stable transitions
Graph (complete) has 223 edges and 121 vertex of which 84 are kept as prefixes of interest. Removing 37 places using SCC suffix rule.1 ms
Starting structural reductions in LTL mode, iteration 0 : 121/121 places, 177/177 transitions.
Reduce places removed 31 places and 0 transitions.
Iterating post reduction 0 with 31 rules applied. Total rules applied 31 place count 90 transition count 177
Discarding 9 places :
Symmetric choice reduction at 1 with 9 rule applications. Total rules 40 place count 81 transition count 159
Iterating global reduction 1 with 9 rules applied. Total rules applied 49 place count 81 transition count 159
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 51 place count 81 transition count 157
Applied a total of 51 rules in 3 ms. Remains 81 /121 variables (removed 40) and now considering 157/177 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 81/121 places, 157/177 transitions.
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 5 ms
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:48:45] [INFO ] Input system was already deterministic with 157 transitions.
Starting structural reductions in LTL mode, iteration 0 : 121/121 places, 177/177 transitions.
Reduce places removed 37 places and 0 transitions.
Iterating post reduction 0 with 37 rules applied. Total rules applied 37 place count 84 transition count 177
Discarding 15 places :
Symmetric choice reduction at 1 with 15 rule applications. Total rules 52 place count 69 transition count 147
Iterating global reduction 1 with 15 rules applied. Total rules applied 67 place count 69 transition count 147
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 69 place count 69 transition count 145
Applied a total of 69 rules in 3 ms. Remains 69 /121 variables (removed 52) and now considering 145/177 (removed 32) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 69/121 places, 145/177 transitions.
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 8 ms
[2023-03-08 10:48:45] [INFO ] Input system was already deterministic with 145 transitions.
Starting structural reductions in LTL mode, iteration 0 : 121/121 places, 177/177 transitions.
Reduce places removed 37 places and 0 transitions.
Iterating post reduction 0 with 37 rules applied. Total rules applied 37 place count 84 transition count 177
Discarding 15 places :
Symmetric choice reduction at 1 with 15 rule applications. Total rules 52 place count 69 transition count 147
Iterating global reduction 1 with 15 rules applied. Total rules applied 67 place count 69 transition count 147
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 69 place count 69 transition count 145
Applied a total of 69 rules in 4 ms. Remains 69 /121 variables (removed 52) and now considering 145/177 (removed 32) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 69/121 places, 145/177 transitions.
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:48:45] [INFO ] Input system was already deterministic with 145 transitions.
Starting structural reductions in LTL mode, iteration 0 : 121/121 places, 177/177 transitions.
Reduce places removed 36 places and 0 transitions.
Iterating post reduction 0 with 36 rules applied. Total rules applied 36 place count 85 transition count 177
Discarding 14 places :
Symmetric choice reduction at 1 with 14 rule applications. Total rules 50 place count 71 transition count 149
Iterating global reduction 1 with 14 rules applied. Total rules applied 64 place count 71 transition count 149
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 66 place count 71 transition count 147
Applied a total of 66 rules in 3 ms. Remains 71 /121 variables (removed 50) and now considering 147/177 (removed 30) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 71/121 places, 147/177 transitions.
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 5 ms
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:48:45] [INFO ] Input system was already deterministic with 147 transitions.
Starting structural reductions in LTL mode, iteration 0 : 121/121 places, 177/177 transitions.
Reduce places removed 37 places and 0 transitions.
Iterating post reduction 0 with 37 rules applied. Total rules applied 37 place count 84 transition count 177
Discarding 13 places :
Symmetric choice reduction at 1 with 13 rule applications. Total rules 50 place count 71 transition count 151
Iterating global reduction 1 with 13 rules applied. Total rules applied 63 place count 71 transition count 151
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 64 place count 71 transition count 150
Applied a total of 64 rules in 3 ms. Remains 71 /121 variables (removed 50) and now considering 150/177 (removed 27) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 71/121 places, 150/177 transitions.
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:48:45] [INFO ] Input system was already deterministic with 150 transitions.
Starting structural reductions in LTL mode, iteration 0 : 121/121 places, 177/177 transitions.
Reduce places removed 37 places and 0 transitions.
Iterating post reduction 0 with 37 rules applied. Total rules applied 37 place count 84 transition count 177
Discarding 15 places :
Symmetric choice reduction at 1 with 15 rule applications. Total rules 52 place count 69 transition count 147
Iterating global reduction 1 with 15 rules applied. Total rules applied 67 place count 69 transition count 147
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 69 place count 69 transition count 145
Applied a total of 69 rules in 2 ms. Remains 69 /121 variables (removed 52) and now considering 145/177 (removed 32) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 69/121 places, 145/177 transitions.
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:48:45] [INFO ] Input system was already deterministic with 145 transitions.
Starting structural reductions in LTL mode, iteration 0 : 121/121 places, 177/177 transitions.
Reduce places removed 33 places and 0 transitions.
Iterating post reduction 0 with 33 rules applied. Total rules applied 33 place count 88 transition count 177
Discarding 14 places :
Symmetric choice reduction at 1 with 14 rule applications. Total rules 47 place count 74 transition count 149
Iterating global reduction 1 with 14 rules applied. Total rules applied 61 place count 74 transition count 149
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 63 place count 74 transition count 147
Applied a total of 63 rules in 3 ms. Remains 74 /121 variables (removed 47) and now considering 147/177 (removed 30) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 74/121 places, 147/177 transitions.
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 9 ms
[2023-03-08 10:48:45] [INFO ] Input system was already deterministic with 147 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 121/121 places, 177/177 transitions.
Graph (trivial) has 152 edges and 121 vertex of which 67 / 121 are part of one of the 10 SCC in 3 ms
Free SCC test removed 57 places
Ensure Unique test removed 130 transitions
Reduce isomorphic transitions removed 130 transitions.
Graph (complete) has 93 edges and 64 vertex of which 30 are kept as prefixes of interest. Removing 34 places using SCC suffix rule.1 ms
Discarding 34 places :
Also discarding 0 output transitions
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 30 transition count 46
Reduce places removed 1 places and 0 transitions.
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Iterating post reduction 1 with 5 rules applied. Total rules applied 8 place count 29 transition count 42
Reduce places removed 4 places and 0 transitions.
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 15 place count 25 transition count 39
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 17 place count 23 transition count 37
Iterating global reduction 3 with 2 rules applied. Total rules applied 19 place count 23 transition count 37
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 3 with 2 rules applied. Total rules applied 21 place count 23 transition count 35
Applied a total of 21 rules in 12 ms. Remains 23 /121 variables (removed 98) and now considering 35/177 (removed 142) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 23/121 places, 35/177 transitions.
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 1 ms
[2023-03-08 10:48:45] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 121/121 places, 177/177 transitions.
Reduce places removed 35 places and 0 transitions.
Iterating post reduction 0 with 35 rules applied. Total rules applied 35 place count 86 transition count 177
Discarding 13 places :
Symmetric choice reduction at 1 with 13 rule applications. Total rules 48 place count 73 transition count 151
Iterating global reduction 1 with 13 rules applied. Total rules applied 61 place count 73 transition count 151
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 63 place count 73 transition count 149
Applied a total of 63 rules in 2 ms. Remains 73 /121 variables (removed 48) and now considering 149/177 (removed 28) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 73/121 places, 149/177 transitions.
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:48:45] [INFO ] Input system was already deterministic with 149 transitions.
Starting structural reductions in LTL mode, iteration 0 : 121/121 places, 177/177 transitions.
Reduce places removed 31 places and 0 transitions.
Iterating post reduction 0 with 31 rules applied. Total rules applied 31 place count 90 transition count 177
Discarding 13 places :
Symmetric choice reduction at 1 with 13 rule applications. Total rules 44 place count 77 transition count 151
Iterating global reduction 1 with 13 rules applied. Total rules applied 57 place count 77 transition count 151
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 59 place count 77 transition count 149
Applied a total of 59 rules in 2 ms. Remains 77 /121 variables (removed 44) and now considering 149/177 (removed 28) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 77/121 places, 149/177 transitions.
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:48:45] [INFO ] Input system was already deterministic with 149 transitions.
Starting structural reductions in LTL mode, iteration 0 : 121/121 places, 177/177 transitions.
Reduce places removed 37 places and 0 transitions.
Iterating post reduction 0 with 37 rules applied. Total rules applied 37 place count 84 transition count 177
Discarding 15 places :
Symmetric choice reduction at 1 with 15 rule applications. Total rules 52 place count 69 transition count 147
Iterating global reduction 1 with 15 rules applied. Total rules applied 67 place count 69 transition count 147
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 69 place count 69 transition count 145
Applied a total of 69 rules in 1 ms. Remains 69 /121 variables (removed 52) and now considering 145/177 (removed 32) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 69/121 places, 145/177 transitions.
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 4 ms
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 3 ms
[2023-03-08 10:48:45] [INFO ] Input system was already deterministic with 145 transitions.
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 6 ms
[2023-03-08 10:48:45] [INFO ] Flatten gal took : 6 ms
[2023-03-08 10:48:45] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 2 ms.
[2023-03-08 10:48:45] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 121 places, 177 transitions and 400 arcs took 0 ms.
Total runtime 2016 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DLCround-PT-05a
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374

FORMULA DLCround-PT-05a-CTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-CTLCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-CTLCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-CTLCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-CTLCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-CTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-CTLCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-CTLCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-05a-CTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 13238592 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16101824 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:199
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:287
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 3 (type EXCL) for 0 DLCround-PT-05a-CTLCardinality-00
lola: time limit : 97 sec
lola: memory limit: 32 pages
lola: FINISHED task # 3 (type EXCL) for DLCround-PT-05a-CTLCardinality-00
lola: result : true
lola: markings : 7
lola: fired transitions : 87
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:737
lola: rewrite Frontend/Parser/formula_rewrite.k:693
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH INITIAL
lola: LAUNCH task # 83 (type CNST) for 82 DLCround-PT-05a-CTLCardinality-14
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 83 (type CNST) for DLCround-PT-05a-CTLCardinality-14
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: planning for (null) stopped (result already fixed).
lola: planning for (null) stopped (result already fixed).
lola: planning for (null) stopped (result already fixed).
lola: planning for (null) stopped (result already fixed).
lola: LAUNCH task # 34 (type EXCL) for 33 DLCround-PT-05a-CTLCardinality-05
lola: time limit : 128 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:738
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 86 (type FNDP) for 45 DLCround-PT-05a-CTLCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 87 (type EQUN) for 45 DLCround-PT-05a-CTLCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type SRCH) for 45 DLCround-PT-05a-CTLCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 89 (type SRCH) for DLCround-PT-05a-CTLCardinality-11
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 86 (type FNDP) for DLCround-PT-05a-CTLCardinality-11
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 87 (type EQUN) for DLCround-PT-05a-CTLCardinality-11 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 87 (type EQUN) for DLCround-PT-05a-CTLCardinality-11
lola: result : unknown
lola: LAUNCH INITIAL
lola: LAUNCH task # 31 (type CNST) for 30 DLCround-PT-05a-CTLCardinality-03
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 40 (type CNST) for 39 DLCround-PT-05a-CTLCardinality-08
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 31 (type CNST) for DLCround-PT-05a-CTLCardinality-03
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 40 (type CNST) for DLCround-PT-05a-CTLCardinality-08
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 91 (type FNDP) for 64 DLCround-PT-05a-CTLCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 92 (type EQUN) for 64 DLCround-PT-05a-CTLCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 94 (type SRCH) for 64 DLCround-PT-05a-CTLCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 94 (type SRCH) for DLCround-PT-05a-CTLCardinality-12
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 91 (type FNDP) for DLCround-PT-05a-CTLCardinality-12
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 92 (type EQUN) for DLCround-PT-05a-CTLCardinality-12 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 92 (type EQUN) for DLCround-PT-05a-CTLCardinality-12
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 96 (type FNDP) for 45 DLCround-PT-05a-CTLCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 97 (type EQUN) for 45 DLCround-PT-05a-CTLCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 99 (type SRCH) for 45 DLCround-PT-05a-CTLCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 99 (type SRCH) for DLCround-PT-05a-CTLCardinality-11
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 96 (type FNDP) for DLCround-PT-05a-CTLCardinality-11
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 97 (type EQUN) for DLCround-PT-05a-CTLCardinality-11 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/374/CTLCardinality-97.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 97 (type EQUN) for DLCround-PT-05a-CTLCardinality-11
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-05a-CTLCardinality-00: DISJ true CTL model checker
DLCround-PT-05a-CTLCardinality-03: INITIAL false preprocessing
DLCround-PT-05a-CTLCardinality-08: INITIAL true preprocessing
DLCround-PT-05a-CTLCardinality-14: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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DLCround-PT-05a-CTLCardinality-05: CTL 0 0 1 0 1 0 0 0
DLCround-PT-05a-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DLCround-PT-05a-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DLCround-PT-05a-CTLCardinality-11: DISJ 0 2 0 0 11 0 0 3
DLCround-PT-05a-CTLCardinality-12: DISJ 0 2 0 0 7 0 0 2
DLCround-PT-05a-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 5/400 5/32 DLCround-PT-05a-CTLCardinality-05 942409 m, 188481 m/sec, 5268358 t fired, .

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DLCround-PT-05a-CTLCardinality-14: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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DLCround-PT-05a-CTLCardinality-05: CTL 0 0 1 0 1 0 0 0
DLCround-PT-05a-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DLCround-PT-05a-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DLCround-PT-05a-CTLCardinality-11: DISJ 0 2 0 0 11 0 0 3
DLCround-PT-05a-CTLCardinality-12: DISJ 0 2 0 0 7 0 0 2
DLCround-PT-05a-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 10/400 8/32 DLCround-PT-05a-CTLCardinality-05 1812817 m, 174081 m/sec, 10183877 t fired, .

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DLCround-PT-05a-CTLCardinality-08: INITIAL true preprocessing
DLCround-PT-05a-CTLCardinality-14: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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DLCround-PT-05a-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DLCround-PT-05a-CTLCardinality-11: DISJ 0 2 0 0 11 0 0 3
DLCround-PT-05a-CTLCardinality-12: DISJ 0 2 0 0 7 0 0 2
DLCround-PT-05a-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 15/400 12/32 DLCround-PT-05a-CTLCardinality-05 2635035 m, 164443 m/sec, 14919511 t fired, .

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DLCround-PT-05a-CTLCardinality-03: INITIAL false preprocessing
DLCround-PT-05a-CTLCardinality-08: INITIAL true preprocessing
DLCround-PT-05a-CTLCardinality-14: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-05a-CTLCardinality-01: AFAG 0 1 0 0 1 0 0 0
DLCround-PT-05a-CTLCardinality-05: CTL 0 0 1 0 1 0 0 0
DLCround-PT-05a-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
DLCround-PT-05a-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DLCround-PT-05a-CTLCardinality-11: DISJ 0 2 0 0 11 0 0 3
DLCround-PT-05a-CTLCardinality-12: DISJ 0 2 0 0 7 0 0 2
DLCround-PT-05a-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 20/400 16/32 DLCround-PT-05a-CTLCardinality-05 3477559 m, 168504 m/sec, 19539478 t fired, .

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DLCround-PT-05a-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DLCround-PT-05a-CTLCardinality-11: DISJ 0 2 0 0 11 0 0 3
DLCround-PT-05a-CTLCardinality-12: DISJ 0 2 0 0 7 0 0 2
DLCround-PT-05a-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 25/400 19/32 DLCround-PT-05a-CTLCardinality-05 4269140 m, 158316 m/sec, 24032044 t fired, .

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DLCround-PT-05a-CTLCardinality-14: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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DLCround-PT-05a-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DLCround-PT-05a-CTLCardinality-11: DISJ 0 2 0 0 11 0 0 3
DLCround-PT-05a-CTLCardinality-12: DISJ 0 2 0 0 7 0 0 2
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 30/400 22/32 DLCround-PT-05a-CTLCardinality-05 5049758 m, 156123 m/sec, 28429779 t fired, .

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DLCround-PT-05a-CTLCardinality-08: INITIAL true preprocessing
DLCround-PT-05a-CTLCardinality-14: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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DLCround-PT-05a-CTLCardinality-05: CTL 0 0 1 0 1 0 0 0
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DLCround-PT-05a-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
DLCround-PT-05a-CTLCardinality-11: DISJ 0 2 0 0 11 0 0 3
DLCround-PT-05a-CTLCardinality-12: DISJ 0 2 0 0 7 0 0 2
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34 CTL EXCL 35/400 26/32 DLCround-PT-05a-CTLCardinality-05 5829301 m, 155908 m/sec, 32799844 t fired, .

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DLCround-PT-05a-CTLCardinality-08: INITIAL true preprocessing
DLCround-PT-05a-CTLCardinality-14: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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DLCround-PT-05a-CTLCardinality-05: CTL 0 0 1 0 1 0 0 0
DLCround-PT-05a-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
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DLCround-PT-05a-CTLCardinality-11: DISJ 0 2 0 0 11 0 0 3
DLCround-PT-05a-CTLCardinality-12: DISJ 0 2 0 0 7 0 0 2
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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-05a"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DLCround-PT-05a, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r103-tall-167814478600649"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-05a.tgz
mv DLCround-PT-05a execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;