About the Execution of LoLa+red for DLCround-PT-04b
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
953.407 | 41095.00 | 117096.00 | 367.30 | TTFTFTFTTTFTFFTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478600647.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DLCround-PT-04b, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478600647
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 952K
-rw-r--r-- 1 mcc users 6.6K Feb 25 18:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K Feb 25 18:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 25 18:21 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K Feb 25 18:21 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 15:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 15:52 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.4K Feb 25 18:23 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 94K Feb 25 18:23 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.3K Feb 25 18:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 58K Feb 25 18:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:52 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:52 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 547K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-04b-ReachabilityFireability-00
FORMULA_NAME DLCround-PT-04b-ReachabilityFireability-01
FORMULA_NAME DLCround-PT-04b-ReachabilityFireability-02
FORMULA_NAME DLCround-PT-04b-ReachabilityFireability-03
FORMULA_NAME DLCround-PT-04b-ReachabilityFireability-04
FORMULA_NAME DLCround-PT-04b-ReachabilityFireability-05
FORMULA_NAME DLCround-PT-04b-ReachabilityFireability-06
FORMULA_NAME DLCround-PT-04b-ReachabilityFireability-07
FORMULA_NAME DLCround-PT-04b-ReachabilityFireability-08
FORMULA_NAME DLCround-PT-04b-ReachabilityFireability-09
FORMULA_NAME DLCround-PT-04b-ReachabilityFireability-10
FORMULA_NAME DLCround-PT-04b-ReachabilityFireability-11
FORMULA_NAME DLCround-PT-04b-ReachabilityFireability-12
FORMULA_NAME DLCround-PT-04b-ReachabilityFireability-13
FORMULA_NAME DLCround-PT-04b-ReachabilityFireability-14
FORMULA_NAME DLCround-PT-04b-ReachabilityFireability-15
=== Now, execution of the tool begins
BK_START 1678272460921
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-04b
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 10:47:42] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityFireability, -timeout, 360, -rebuildPNML]
[2023-03-08 10:47:42] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 10:47:42] [INFO ] Load time of PNML (sax parser for PT used): 118 ms
[2023-03-08 10:47:42] [INFO ] Transformed 1680 places.
[2023-03-08 10:47:42] [INFO ] Transformed 2364 transitions.
[2023-03-08 10:47:42] [INFO ] Found NUPN structural information;
[2023-03-08 10:47:42] [INFO ] Parsed PT model containing 1680 places and 2364 transitions and 6156 arcs in 199 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityFireability.xml in 11 ms.
Working with output stream class java.io.PrintStream
Incomplete random walk after 10000 steps, including 2 resets, run finished after 415 ms. (steps per millisecond=24 ) properties (out of 16) seen :12
FORMULA DLCround-PT-04b-ReachabilityFireability-13 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-04b-ReachabilityFireability-11 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-04b-ReachabilityFireability-10 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-04b-ReachabilityFireability-09 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-04b-ReachabilityFireability-08 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-04b-ReachabilityFireability-07 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-04b-ReachabilityFireability-06 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-04b-ReachabilityFireability-05 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-04b-ReachabilityFireability-04 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-04b-ReachabilityFireability-03 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-04b-ReachabilityFireability-02 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA DLCround-PT-04b-ReachabilityFireability-01 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 63 ms. (steps per millisecond=158 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 47 ms. (steps per millisecond=212 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
// Phase 1: matrix 2364 rows 1680 cols
[2023-03-08 10:47:43] [INFO ] Computed 69 place invariants in 30 ms
[2023-03-08 10:47:43] [INFO ] After 540ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-08 10:47:44] [INFO ] [Nat]Absence check using 69 positive place invariants in 40 ms returned sat
[2023-03-08 10:47:45] [INFO ] After 1008ms SMT Verify possible using state equation in natural domain returned unsat :2 sat :2
[2023-03-08 10:47:45] [INFO ] Deduced a trap composed of 83 places in 280 ms of which 5 ms to minimize.
[2023-03-08 10:47:46] [INFO ] Deduced a trap composed of 151 places in 233 ms of which 2 ms to minimize.
[2023-03-08 10:47:46] [INFO ] Deduced a trap composed of 136 places in 200 ms of which 0 ms to minimize.
[2023-03-08 10:47:46] [INFO ] Trap strengthening (SAT) tested/added 4/3 trap constraints in 1002 ms
[2023-03-08 10:47:46] [INFO ] After 2218ms SMT Verify possible using trap constraints in natural domain returned unsat :2 sat :2
Attempting to minimize the solution found.
Minimization took 160 ms.
[2023-03-08 10:47:46] [INFO ] After 2867ms SMT Verify possible using all constraints in natural domain returned unsat :2 sat :2
FORMULA DLCround-PT-04b-ReachabilityFireability-15 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA DLCround-PT-04b-ReachabilityFireability-14 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 4 Parikh solutions to 2 different solutions.
FORMULA DLCround-PT-04b-ReachabilityFireability-00 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Parikh walk visited 1 properties in 17 ms.
Support contains 3 out of 1680 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1680/1680 places, 2364/2364 transitions.
Graph (trivial) has 1611 edges and 1680 vertex of which 338 / 1680 are part of one of the 23 SCC in 17 ms
Free SCC test removed 315 places
Drop transitions removed 352 transitions
Reduce isomorphic transitions removed 352 transitions.
Drop transitions removed 657 transitions
Trivial Post-agglo rules discarded 657 transitions
Performed 657 trivial Post agglomeration. Transition count delta: 657
Iterating post reduction 0 with 657 rules applied. Total rules applied 658 place count 1365 transition count 1355
Reduce places removed 657 places and 0 transitions.
Ensure Unique test removed 27 transitions
Reduce isomorphic transitions removed 27 transitions.
Drop transitions removed 22 transitions
Trivial Post-agglo rules discarded 22 transitions
Performed 22 trivial Post agglomeration. Transition count delta: 22
Iterating post reduction 1 with 706 rules applied. Total rules applied 1364 place count 708 transition count 1306
Reduce places removed 22 places and 0 transitions.
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 2 with 30 rules applied. Total rules applied 1394 place count 686 transition count 1298
Reduce places removed 4 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 3 with 5 rules applied. Total rules applied 1399 place count 682 transition count 1297
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 1400 place count 681 transition count 1297
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 4 Pre rules applied. Total rules applied 1400 place count 681 transition count 1293
Deduced a syphon composed of 4 places in 6 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 5 with 8 rules applied. Total rules applied 1408 place count 677 transition count 1293
Discarding 194 places :
Symmetric choice reduction at 5 with 194 rule applications. Total rules 1602 place count 483 transition count 1099
Iterating global reduction 5 with 194 rules applied. Total rules applied 1796 place count 483 transition count 1099
Performed 79 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 79 Pre rules applied. Total rules applied 1796 place count 483 transition count 1020
Deduced a syphon composed of 79 places in 5 ms
Reduce places removed 79 places and 0 transitions.
Iterating global reduction 5 with 158 rules applied. Total rules applied 1954 place count 404 transition count 1020
Discarding 41 places :
Symmetric choice reduction at 5 with 41 rule applications. Total rules 1995 place count 363 transition count 716
Iterating global reduction 5 with 41 rules applied. Total rules applied 2036 place count 363 transition count 716
Ensure Unique test removed 18 transitions
Reduce isomorphic transitions removed 18 transitions.
Iterating post reduction 5 with 18 rules applied. Total rules applied 2054 place count 363 transition count 698
Performed 96 Post agglomeration using F-continuation condition with reduction of 4 identical transitions.
Deduced a syphon composed of 96 places in 0 ms
Reduce places removed 96 places and 0 transitions.
Iterating global reduction 6 with 192 rules applied. Total rules applied 2246 place count 267 transition count 598
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 6 with 5 rules applied. Total rules applied 2251 place count 267 transition count 593
Discarding 1 places :
Symmetric choice reduction at 7 with 1 rule applications. Total rules 2252 place count 266 transition count 585
Iterating global reduction 7 with 1 rules applied. Total rules applied 2253 place count 266 transition count 585
Performed 31 Post agglomeration using F-continuation condition with reduction of 20 identical transitions.
Deduced a syphon composed of 31 places in 0 ms
Reduce places removed 31 places and 0 transitions.
Iterating global reduction 7 with 62 rules applied. Total rules applied 2315 place count 235 transition count 772
Drop transitions removed 12 transitions
Reduce isomorphic transitions removed 12 transitions.
Iterating post reduction 7 with 12 rules applied. Total rules applied 2327 place count 235 transition count 760
Discarding 13 places :
Symmetric choice reduction at 8 with 13 rule applications. Total rules 2340 place count 222 transition count 572
Iterating global reduction 8 with 13 rules applied. Total rules applied 2353 place count 222 transition count 572
Ensure Unique test removed 30 transitions
Reduce isomorphic transitions removed 30 transitions.
Iterating post reduction 8 with 30 rules applied. Total rules applied 2383 place count 222 transition count 542
Drop transitions removed 61 transitions
Redundant transition composition rules discarded 61 transitions
Iterating global reduction 9 with 61 rules applied. Total rules applied 2444 place count 222 transition count 481
Discarding 5 places :
Symmetric choice reduction at 9 with 5 rule applications. Total rules 2449 place count 217 transition count 440
Iterating global reduction 9 with 5 rules applied. Total rules applied 2454 place count 217 transition count 440
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 9 with 5 rules applied. Total rules applied 2459 place count 217 transition count 435
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -33
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 10 with 8 rules applied. Total rules applied 2467 place count 213 transition count 468
Drop transitions removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 10 with 5 rules applied. Total rules applied 2472 place count 213 transition count 463
Drop transitions removed 22 transitions
Redundant transition composition rules discarded 22 transitions
Iterating global reduction 11 with 22 rules applied. Total rules applied 2494 place count 213 transition count 441
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -27
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 11 with 8 rules applied. Total rules applied 2502 place count 209 transition count 468
Drop transitions removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 11 with 6 rules applied. Total rules applied 2508 place count 209 transition count 462
Drop transitions removed 21 transitions
Redundant transition composition rules discarded 21 transitions
Iterating global reduction 12 with 21 rules applied. Total rules applied 2529 place count 209 transition count 441
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -27
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 12 with 8 rules applied. Total rules applied 2537 place count 205 transition count 468
Drop transitions removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 12 with 6 rules applied. Total rules applied 2543 place count 205 transition count 462
Drop transitions removed 21 transitions
Redundant transition composition rules discarded 21 transitions
Iterating global reduction 13 with 21 rules applied. Total rules applied 2564 place count 205 transition count 441
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -27
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 13 with 8 rules applied. Total rules applied 2572 place count 201 transition count 468
Drop transitions removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 13 with 6 rules applied. Total rules applied 2578 place count 201 transition count 462
Drop transitions removed 21 transitions
Redundant transition composition rules discarded 21 transitions
Iterating global reduction 14 with 21 rules applied. Total rules applied 2599 place count 201 transition count 441
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -27
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 14 with 8 rules applied. Total rules applied 2607 place count 197 transition count 468
Drop transitions removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 14 with 6 rules applied. Total rules applied 2613 place count 197 transition count 462
Drop transitions removed 21 transitions
Redundant transition composition rules discarded 21 transitions
Iterating global reduction 15 with 21 rules applied. Total rules applied 2634 place count 197 transition count 441
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -29
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 15 with 8 rules applied. Total rules applied 2642 place count 193 transition count 470
Drop transitions removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 15 with 6 rules applied. Total rules applied 2648 place count 193 transition count 464
Drop transitions removed 21 transitions
Redundant transition composition rules discarded 21 transitions
Iterating global reduction 16 with 21 rules applied. Total rules applied 2669 place count 193 transition count 443
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -29
Deduced a syphon composed of 4 places in 1 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 16 with 8 rules applied. Total rules applied 2677 place count 189 transition count 472
Drop transitions removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 16 with 6 rules applied. Total rules applied 2683 place count 189 transition count 466
Renaming transitions due to excessive name length > 1024 char.
Drop transitions removed 21 transitions
Redundant transition composition rules discarded 21 transitions
Iterating global reduction 17 with 21 rules applied. Total rules applied 2704 place count 189 transition count 445
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -27
Deduced a syphon composed of 4 places in 1 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 17 with 8 rules applied. Total rules applied 2712 place count 185 transition count 472
Drop transitions removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 17 with 6 rules applied. Total rules applied 2718 place count 185 transition count 466
Drop transitions removed 21 transitions
Redundant transition composition rules discarded 21 transitions
Iterating global reduction 18 with 21 rules applied. Total rules applied 2739 place count 185 transition count 445
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -27
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 18 with 8 rules applied. Total rules applied 2747 place count 181 transition count 472
Drop transitions removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 18 with 6 rules applied. Total rules applied 2753 place count 181 transition count 466
Drop transitions removed 21 transitions
Redundant transition composition rules discarded 21 transitions
Iterating global reduction 19 with 21 rules applied. Total rules applied 2774 place count 181 transition count 445
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -27
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 19 with 8 rules applied. Total rules applied 2782 place count 177 transition count 472
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 19 with 4 rules applied. Total rules applied 2786 place count 177 transition count 468
Drop transitions removed 19 transitions
Redundant transition composition rules discarded 19 transitions
Iterating global reduction 20 with 19 rules applied. Total rules applied 2805 place count 177 transition count 449
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -19
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 20 with 8 rules applied. Total rules applied 2813 place count 173 transition count 468
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 20 with 4 rules applied. Total rules applied 2817 place count 173 transition count 464
Drop transitions removed 19 transitions
Redundant transition composition rules discarded 19 transitions
Iterating global reduction 21 with 19 rules applied. Total rules applied 2836 place count 173 transition count 445
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -19
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 21 with 8 rules applied. Total rules applied 2844 place count 169 transition count 464
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 21 with 4 rules applied. Total rules applied 2848 place count 169 transition count 460
Drop transitions removed 19 transitions
Redundant transition composition rules discarded 19 transitions
Iterating global reduction 22 with 19 rules applied. Total rules applied 2867 place count 169 transition count 441
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -22
Deduced a syphon composed of 4 places in 1 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 22 with 8 rules applied. Total rules applied 2875 place count 165 transition count 463
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 22 with 4 rules applied. Total rules applied 2879 place count 165 transition count 459
Drop transitions removed 18 transitions
Redundant transition composition rules discarded 18 transitions
Iterating global reduction 23 with 18 rules applied. Total rules applied 2897 place count 165 transition count 441
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: -17
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 23 with 6 rules applied. Total rules applied 2903 place count 162 transition count 458
Drop transitions removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 23 with 3 rules applied. Total rules applied 2906 place count 162 transition count 455
Drop transitions removed 17 transitions
Redundant transition composition rules discarded 17 transitions
Iterating global reduction 24 with 17 rules applied. Total rules applied 2923 place count 162 transition count 438
Free-agglomeration rule applied 25 times with reduction of 1 identical transitions.
Iterating global reduction 24 with 25 rules applied. Total rules applied 2948 place count 162 transition count 412
Reduce places removed 25 places and 0 transitions.
Drop transitions removed 147 transitions
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 155 transitions.
Graph (complete) has 408 edges and 137 vertex of which 113 are kept as prefixes of interest. Removing 24 places using SCC suffix rule.1 ms
Discarding 24 places :
Also discarding 0 output transitions
Iterating post reduction 24 with 181 rules applied. Total rules applied 3129 place count 113 transition count 257
Drop transitions removed 24 transitions
Reduce isomorphic transitions removed 24 transitions.
Iterating post reduction 25 with 24 rules applied. Total rules applied 3153 place count 113 transition count 233
Drop transitions removed 28 transitions
Redundant transition composition rules discarded 28 transitions
Iterating global reduction 26 with 28 rules applied. Total rules applied 3181 place count 113 transition count 205
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 26 with 1 rules applied. Total rules applied 3182 place count 112 transition count 204
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 26 with 3 rules applied. Total rules applied 3185 place count 109 transition count 204
Performed 12 Post agglomeration using F-continuation condition.Transition count delta: 12
Deduced a syphon composed of 12 places in 0 ms
Reduce places removed 24 places and 0 transitions.
Iterating global reduction 27 with 36 rules applied. Total rules applied 3221 place count 85 transition count 192
Drop transitions removed 12 transitions
Ensure Unique test removed 20 transitions
Reduce isomorphic transitions removed 32 transitions.
Iterating post reduction 27 with 32 rules applied. Total rules applied 3253 place count 85 transition count 160
Performed 17 Post agglomeration using F-continuation condition.Transition count delta: 17
Deduced a syphon composed of 17 places in 0 ms
Reduce places removed 34 places and 0 transitions.
Iterating global reduction 28 with 51 rules applied. Total rules applied 3304 place count 51 transition count 143
Drop transitions removed 29 transitions
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 43 transitions.
Graph (trivial) has 9 edges and 51 vertex of which 8 / 51 are part of one of the 4 SCC in 0 ms
Free SCC test removed 4 places
Iterating post reduction 28 with 44 rules applied. Total rules applied 3348 place count 47 transition count 100
Reduce places removed 4 places and 0 transitions.
Drop transitions removed 24 transitions
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 40 transitions.
Graph (complete) has 77 edges and 43 vertex of which 27 are kept as prefixes of interest. Removing 16 places using SCC suffix rule.0 ms
Discarding 16 places :
Also discarding 8 output transitions
Drop transitions removed 8 transitions
Iterating post reduction 29 with 45 rules applied. Total rules applied 3393 place count 27 transition count 52
Drop transitions removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 30 with 8 rules applied. Total rules applied 3401 place count 27 transition count 44
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 31 with 24 rules applied. Total rules applied 3425 place count 11 transition count 36
Drop transitions removed 8 transitions
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 31 with 20 rules applied. Total rules applied 3445 place count 11 transition count 16
Drop transitions removed 4 transitions
Redundant transition composition rules discarded 4 transitions
Iterating global reduction 32 with 4 rules applied. Total rules applied 3449 place count 11 transition count 12
Graph (complete) has 18 edges and 11 vertex of which 7 are kept as prefixes of interest. Removing 4 places using SCC suffix rule.0 ms
Discarding 4 places :
Also discarding 0 output transitions
Iterating post reduction 32 with 1 rules applied. Total rules applied 3450 place count 7 transition count 12
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 33 with 4 rules applied. Total rules applied 3454 place count 7 transition count 8
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 34 with 1 Pre rules applied. Total rules applied 3454 place count 7 transition count 7
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 34 with 2 rules applied. Total rules applied 3456 place count 6 transition count 7
Applied a total of 3456 rules in 454 ms. Remains 6 /1680 variables (removed 1674) and now considering 7/2364 (removed 2357) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 454 ms. Remains : 6/1680 places, 7/2364 transitions.
Finished random walk after 11 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=11 )
FORMULA DLCround-PT-04b-ReachabilityFireability-12 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
All properties solved without resorting to model-checking.
Total runtime 4913 ms.
starting LoLA
BK_INPUT DLCround-PT-04b
BK_EXAMINATION: ReachabilityFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityFireability
FORMULA DLCround-PT-04b-ReachabilityFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04b-ReachabilityFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04b-ReachabilityFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04b-ReachabilityFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04b-ReachabilityFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04b-ReachabilityFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04b-ReachabilityFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04b-ReachabilityFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04b-ReachabilityFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04b-ReachabilityFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04b-ReachabilityFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04b-ReachabilityFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04b-ReachabilityFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04b-ReachabilityFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04b-ReachabilityFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-04b-ReachabilityFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678272502016
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityFireability.xml
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type EXCL) for 9 DLCround-PT-04b-ReachabilityFireability-03
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 48 (type FNDP) for 9 DLCround-PT-04b-ReachabilityFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 49 (type EQUN) for 9 DLCround-PT-04b-ReachabilityFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SRCH) for 9 DLCround-PT-04b-ReachabilityFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 52 (type EXCL) for DLCround-PT-04b-ReachabilityFireability-03
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 48 (type FNDP) for DLCround-PT-04b-ReachabilityFireability-03 (obsolete)
lola: CANCELED task # 49 (type EQUN) for DLCround-PT-04b-ReachabilityFireability-03 (obsolete)
lola: CANCELED task # 51 (type SRCH) for DLCround-PT-04b-ReachabilityFireability-03 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 48 (type FNDP) for DLCround-PT-04b-ReachabilityFireability-03
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-49.sara.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 49 (type EQUN) for DLCround-PT-04b-ReachabilityFireability-03
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 63 (type EXCL) for 24 DLCround-PT-04b-ReachabilityFireability-08
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 59 (type FNDP) for 24 DLCround-PT-04b-ReachabilityFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type EQUN) for 24 DLCround-PT-04b-ReachabilityFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 62 (type SRCH) for 24 DLCround-PT-04b-ReachabilityFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 63 (type EXCL) for DLCround-PT-04b-ReachabilityFireability-08
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 59 (type FNDP) for DLCround-PT-04b-ReachabilityFireability-08 (obsolete)
lola: CANCELED task # 60 (type EQUN) for DLCround-PT-04b-ReachabilityFireability-08 (obsolete)
lola: CANCELED task # 62 (type SRCH) for DLCround-PT-04b-ReachabilityFireability-08 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 111 (type EXCL) for 3 DLCround-PT-04b-ReachabilityFireability-01
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 92 (type FNDP) for 3 DLCround-PT-04b-ReachabilityFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 93 (type EQUN) for 3 DLCround-PT-04b-ReachabilityFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 110 (type SRCH) for 3 DLCround-PT-04b-ReachabilityFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 59 (type FNDP) for DLCround-PT-04b-ReachabilityFireability-08
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 110 (type SRCH) for DLCround-PT-04b-ReachabilityFireability-01
lola: result : true
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 92 (type FNDP) for DLCround-PT-04b-ReachabilityFireability-01 (obsolete)
lola: CANCELED task # 93 (type EQUN) for DLCround-PT-04b-ReachabilityFireability-01 (obsolete)
lola: CANCELED task # 111 (type EXCL) for DLCround-PT-04b-ReachabilityFireability-01 (obsolete)
lola: LAUNCH task # 121 (type EXCL) for 21 DLCround-PT-04b-ReachabilityFireability-07
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 128 (type FNDP) for 30 DLCround-PT-04b-ReachabilityFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 133 (type EQUN) for 30 DLCround-PT-04b-ReachabilityFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 143 (type SRCH) for 30 DLCround-PT-04b-ReachabilityFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 92 (type FNDP) for DLCround-PT-04b-ReachabilityFireability-01
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-60.sara.
lola: FINISHED task # 128 (type FNDP) for DLCround-PT-04b-ReachabilityFireability-10
lola: result : true
lola: fired transitions : 4
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 133 (type EQUN) for DLCround-PT-04b-ReachabilityFireability-10 (obsolete)
lola: CANCELED task # 143 (type SRCH) for DLCround-PT-04b-ReachabilityFireability-10 (obsolete)
lola: LAUNCH task # 109 (type FNDP) for 42 DLCround-PT-04b-ReachabilityFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type EQUN) for 42 DLCround-PT-04b-ReachabilityFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 117 (type SRCH) for 42 DLCround-PT-04b-ReachabilityFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-93.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-113.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-133.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 60 (type EQUN) for DLCround-PT-04b-ReachabilityFireability-08
lola: result : true
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 93 (type EQUN) for DLCround-PT-04b-ReachabilityFireability-01
lola: result : true
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-04b-ReachabilityFireability-01: EF true tandem / insertion
DLCround-PT-04b-ReachabilityFireability-03: EF true tandem / relaxed
DLCround-PT-04b-ReachabilityFireability-08: EF true tandem / relaxed
DLCround-PT-04b-ReachabilityFireability-10: AG false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-04b-ReachabilityFireability-00: EF 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-02: AG 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-04: AG 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-05: EF 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-06: AG 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-07: EF 0 4 1 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-09: EF 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-11: EF 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-12: AG 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-13: AG 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-14: AG 0 2 3 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-15: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
109 EF FNDP 4/224 0/5 DLCround-PT-04b-ReachabilityFireability-14 956856 t fired, 2371 attempts, .
113 EF STEQ 4/224 0/5 DLCround-PT-04b-ReachabilityFireability-14 sara is running.
117 EF SRCH 4/224 2/5 DLCround-PT-04b-ReachabilityFireability-14 465875 m, 93175 m/sec, 656132 t fired, .
121 EF EXCL 4/299 1/32 DLCround-PT-04b-ReachabilityFireability-07 55923 m, 11184 m/sec, 91104 t fired, .
Time elapsed: 10 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 133 (type EQUN) for DLCround-PT-04b-ReachabilityFireability-10
lola: result : true
lola: FINISHED task # 113 (type EQUN) for DLCround-PT-04b-ReachabilityFireability-14
lola: result : false
lola: CANCELED task # 109 (type FNDP) for DLCround-PT-04b-ReachabilityFireability-14 (obsolete)
lola: CANCELED task # 117 (type SRCH) for DLCround-PT-04b-ReachabilityFireability-14 (obsolete)
lola: LAUNCH task # 105 (type FNDP) for 45 DLCround-PT-04b-ReachabilityFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 106 (type EQUN) for 45 DLCround-PT-04b-ReachabilityFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 131 (type SRCH) for 45 DLCround-PT-04b-ReachabilityFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 109 (type FNDP) for DLCround-PT-04b-ReachabilityFireability-14
lola: result : unknown
lola: fired transitions : 970357
lola: tried executions : 2449
lola: time used : 4.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-106.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-04b-ReachabilityFireability-01: EF true tandem / insertion
DLCround-PT-04b-ReachabilityFireability-03: EF true tandem / relaxed
DLCround-PT-04b-ReachabilityFireability-08: EF true tandem / relaxed
DLCround-PT-04b-ReachabilityFireability-10: AG false findpath
DLCround-PT-04b-ReachabilityFireability-14: AG true state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-04b-ReachabilityFireability-00: EF 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-02: AG 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-04: AG 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-05: EF 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-06: AG 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-07: EF 0 4 1 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-09: EF 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-11: EF 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-12: AG 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-13: AG 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-15: AG 0 2 3 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
105 EF FNDP 5/239 0/5 DLCround-PT-04b-ReachabilityFireability-15 990633 t fired, 1 attempts, .
106 EF STEQ 5/239 0/5 DLCround-PT-04b-ReachabilityFireability-15 sara is running.
121 EF EXCL 9/326 1/32 DLCround-PT-04b-ReachabilityFireability-07 140904 m, 16996 m/sec, 231795 t fired, .
131 EF SRCH 5/256 4/5 DLCround-PT-04b-ReachabilityFireability-15 851037 m, 170207 m/sec, 1117900 t fired, .
Time elapsed: 15 secs. Pages in use: 5
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 131 (type SRCH) for DLCround-PT-04b-ReachabilityFireability-15 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-04b-ReachabilityFireability-01: EF true tandem / insertion
DLCround-PT-04b-ReachabilityFireability-03: EF true tandem / relaxed
DLCround-PT-04b-ReachabilityFireability-08: EF true tandem / relaxed
DLCround-PT-04b-ReachabilityFireability-10: AG false findpath
DLCround-PT-04b-ReachabilityFireability-14: AG true state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-04b-ReachabilityFireability-00: EF 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-02: AG 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-04: AG 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-05: EF 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-06: AG 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-07: EF 0 4 1 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-09: EF 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-11: EF 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-12: AG 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-13: AG 0 5 0 0 1 0 0 0
DLCround-PT-04b-ReachabilityFireability-15: AG 0 2 2 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
105 EF FNDP 10/234 0/5 DLCround-PT-04b-ReachabilityFireability-15 1640821 t fired, 2 attempts, .
106 EF STEQ 10/234 0/5 DLCround-PT-04b-ReachabilityFireability-15 sara is running.
121 EF EXCL 14/326 1/32 DLCround-PT-04b-ReachabilityFireability-07 223980 m, 16615 m/sec, 375052 t fired, .
Time elapsed: 20 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 146 (type FNDP) for 0 DLCround-PT-04b-ReachabilityFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 146 (type FNDP) for DLCround-PT-04b-ReachabilityFireability-00
lola: result : true
lola: fired transitions : 5
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 80 (type FNDP) for 27 DLCround-PT-04b-ReachabilityFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 80 (type FNDP) for DLCround-PT-04b-ReachabilityFireability-09
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 101 (type FNDP) for 39 DLCround-PT-04b-ReachabilityFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 101 (type FNDP) for DLCround-PT-04b-ReachabilityFireability-13
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 56 (type FNDP) for 15 DLCround-PT-04b-ReachabilityFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 56 (type FNDP) for DLCround-PT-04b-ReachabilityFireability-05
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 65 (type FNDP) for 12 DLCround-PT-04b-ReachabilityFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 65 (type FNDP) for DLCround-PT-04b-ReachabilityFireability-04
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 84 (type FNDP) for 36 DLCround-PT-04b-ReachabilityFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 84 (type FNDP) for DLCround-PT-04b-ReachabilityFireability-12
lola: result : true
lola: fired transitions : 9
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 66 (type FNDP) for 6 DLCround-PT-04b-ReachabilityFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 66 (type FNDP) for DLCround-PT-04b-ReachabilityFireability-02
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 86 (type FNDP) for 18 DLCround-PT-04b-ReachabilityFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 86 (type FNDP) for DLCround-PT-04b-ReachabilityFireability-06
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 77 (type FNDP) for 33 DLCround-PT-04b-ReachabilityFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 77 (type FNDP) for DLCround-PT-04b-ReachabilityFireability-11
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 74 (type FNDP) for 21 DLCround-PT-04b-ReachabilityFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 74 (type FNDP) for DLCround-PT-04b-ReachabilityFireability-07
lola: result : true
lola: fired transitions : 6
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 121 (type EXCL) for DLCround-PT-04b-ReachabilityFireability-07 (obsolete)
lola: LAUNCH task # 135 (type EXCL) for 45 DLCround-PT-04b-ReachabilityFireability-15
lola: time limit : 3580 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 141 (type SRCH) for 45 DLCround-PT-04b-ReachabilityFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 141 (type SRCH) for DLCround-PT-04b-ReachabilityFireability-15
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-04b-ReachabilityFireability-00: EF true findpath
DLCround-PT-04b-ReachabilityFireability-01: EF true tandem / insertion
DLCround-PT-04b-ReachabilityFireability-02: AG false findpath
DLCround-PT-04b-ReachabilityFireability-03: EF true tandem / relaxed
DLCround-PT-04b-ReachabilityFireability-04: AG false findpath
DLCround-PT-04b-ReachabilityFireability-05: EF true findpath
DLCround-PT-04b-ReachabilityFireability-06: AG false findpath
DLCround-PT-04b-ReachabilityFireability-07: EF true findpath
DLCround-PT-04b-ReachabilityFireability-08: EF true tandem / relaxed
DLCround-PT-04b-ReachabilityFireability-09: EF true findpath
DLCround-PT-04b-ReachabilityFireability-10: AG false findpath
DLCround-PT-04b-ReachabilityFireability-11: EF true findpath
DLCround-PT-04b-ReachabilityFireability-12: AG false findpath
DLCround-PT-04b-ReachabilityFireability-13: AG false findpath
DLCround-PT-04b-ReachabilityFireability-14: AG true state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-04b-ReachabilityFireability-15: AG 0 0 3 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
105 EF FNDP 15/3590 0/5 DLCround-PT-04b-ReachabilityFireability-15 2208468 t fired, 3 attempts, .
106 EF STEQ 15/3590 0/5 DLCround-PT-04b-ReachabilityFireability-15 sara is running.
135 EF EXCL 5/3580 1/32 DLCround-PT-04b-ReachabilityFireability-15 77502 m, 15500 m/sec, 110133 t fired, .
Time elapsed: 25 secs. Pages in use: 6
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-04b-ReachabilityFireability-00: EF true findpath
DLCround-PT-04b-ReachabilityFireability-01: EF true tandem / insertion
DLCround-PT-04b-ReachabilityFireability-02: AG false findpath
DLCround-PT-04b-ReachabilityFireability-03: EF true tandem / relaxed
DLCround-PT-04b-ReachabilityFireability-04: AG false findpath
DLCround-PT-04b-ReachabilityFireability-05: EF true findpath
DLCround-PT-04b-ReachabilityFireability-06: AG false findpath
DLCround-PT-04b-ReachabilityFireability-07: EF true findpath
DLCround-PT-04b-ReachabilityFireability-08: EF true tandem / relaxed
DLCround-PT-04b-ReachabilityFireability-09: EF true findpath
DLCround-PT-04b-ReachabilityFireability-10: AG false findpath
DLCround-PT-04b-ReachabilityFireability-11: EF true findpath
DLCround-PT-04b-ReachabilityFireability-12: AG false findpath
DLCround-PT-04b-ReachabilityFireability-13: AG false findpath
DLCround-PT-04b-ReachabilityFireability-14: AG true state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-04b-ReachabilityFireability-15: AG 0 0 3 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
105 EF FNDP 20/3590 0/5 DLCround-PT-04b-ReachabilityFireability-15 2723361 t fired, 3 attempts, .
106 EF STEQ 20/3590 0/5 DLCround-PT-04b-ReachabilityFireability-15 sara is running.
135 EF EXCL 10/3580 1/32 DLCround-PT-04b-ReachabilityFireability-15 156223 m, 15744 m/sec, 222449 t fired, .
Time elapsed: 30 secs. Pages in use: 6
# running tasks: 3 of 4 Visible: 16
lola: FINISHED task # 106 (type EQUN) for DLCround-PT-04b-ReachabilityFireability-15
lola: result : false
lola: CANCELED task # 105 (type FNDP) for DLCround-PT-04b-ReachabilityFireability-15 (obsolete)
lola: CANCELED task # 135 (type EXCL) for DLCround-PT-04b-ReachabilityFireability-15 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-04b-ReachabilityFireability-00: EF true findpath
DLCround-PT-04b-ReachabilityFireability-01: EF true tandem / insertion
DLCround-PT-04b-ReachabilityFireability-02: AG false findpath
DLCround-PT-04b-ReachabilityFireability-03: EF true tandem / relaxed
DLCround-PT-04b-ReachabilityFireability-04: AG false findpath
DLCround-PT-04b-ReachabilityFireability-05: EF true findpath
DLCround-PT-04b-ReachabilityFireability-06: AG false findpath
DLCround-PT-04b-ReachabilityFireability-07: EF true findpath
DLCround-PT-04b-ReachabilityFireability-08: EF true tandem / relaxed
DLCround-PT-04b-ReachabilityFireability-09: EF true findpath
DLCround-PT-04b-ReachabilityFireability-10: AG false findpath
DLCround-PT-04b-ReachabilityFireability-11: EF true findpath
DLCround-PT-04b-ReachabilityFireability-12: AG false findpath
DLCround-PT-04b-ReachabilityFireability-13: AG false findpath
DLCround-PT-04b-ReachabilityFireability-14: AG true state equation
DLCround-PT-04b-ReachabilityFireability-15: AG true state equation
Time elapsed: 33 secs. Pages in use: 6
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-04b"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DLCround-PT-04b, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r103-tall-167814478600647"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-04b.tgz
mv DLCround-PT-04b execution
cd execution
if [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "UpperBounds" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] || [ "ReachabilityFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;