Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478500554.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
............................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DLCflexbar-PT-5a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478500554
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 3.2M
-rw-r--r-- 1 mcc users 8.2K Feb 25 16:40 CTLCardinality.txt
-rw-r--r-- 1 mcc users 93K Feb 25 16:40 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Feb 25 16:00 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K Feb 25 16:00 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:51 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 15:51 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 15:51 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 15:51 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 18:19 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 110K Feb 25 18:19 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 17:30 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 88K Feb 25 17:30 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:51 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:51 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 2.8M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-5a-CTLFireability-00
FORMULA_NAME DLCflexbar-PT-5a-CTLFireability-01
FORMULA_NAME DLCflexbar-PT-5a-CTLFireability-02
FORMULA_NAME DLCflexbar-PT-5a-CTLFireability-03
FORMULA_NAME DLCflexbar-PT-5a-CTLFireability-04
FORMULA_NAME DLCflexbar-PT-5a-CTLFireability-05
FORMULA_NAME DLCflexbar-PT-5a-CTLFireability-06
FORMULA_NAME DLCflexbar-PT-5a-CTLFireability-07
FORMULA_NAME DLCflexbar-PT-5a-CTLFireability-08
FORMULA_NAME DLCflexbar-PT-5a-CTLFireability-09
FORMULA_NAME DLCflexbar-PT-5a-CTLFireability-10
FORMULA_NAME DLCflexbar-PT-5a-CTLFireability-11
FORMULA_NAME DLCflexbar-PT-5a-CTLFireability-12
FORMULA_NAME DLCflexbar-PT-5a-CTLFireability-13
FORMULA_NAME DLCflexbar-PT-5a-CTLFireability-14
FORMULA_NAME DLCflexbar-PT-5a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678260410768

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCflexbar-PT-5a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 07:26:52] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-08 07:26:52] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 07:26:52] [INFO ] Load time of PNML (sax parser for PT used): 299 ms
[2023-03-08 07:26:52] [INFO ] Transformed 1415 places.
[2023-03-08 07:26:52] [INFO ] Transformed 10593 transitions.
[2023-03-08 07:26:52] [INFO ] Found NUPN structural information;
[2023-03-08 07:26:52] [INFO ] Parsed PT model containing 1415 places and 10593 transitions and 41484 arcs in 406 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 12 ms.
Ensure Unique test removed 1179 transitions
Reduce redundant transitions removed 1179 transitions.
Support contains 177 out of 1415 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1415/1415 places, 9414/9414 transitions.
Discarding 111 places :
Symmetric choice reduction at 0 with 111 rule applications. Total rules 111 place count 1304 transition count 8278
Iterating global reduction 0 with 111 rules applied. Total rules applied 222 place count 1304 transition count 8278
Ensure Unique test removed 53 transitions
Reduce isomorphic transitions removed 53 transitions.
Iterating post reduction 0 with 53 rules applied. Total rules applied 275 place count 1304 transition count 8225
Drop transitions removed 2976 transitions
Redundant transition composition rules discarded 2976 transitions
Iterating global reduction 1 with 2976 rules applied. Total rules applied 3251 place count 1304 transition count 5249
Applied a total of 3251 rules in 693 ms. Remains 1304 /1415 variables (removed 111) and now considering 5249/9414 (removed 4165) transitions.
[2023-03-08 07:26:53] [INFO ] Flow matrix only has 570 transitions (discarded 4679 similar events)
// Phase 1: matrix 570 rows 1304 cols
[2023-03-08 07:26:53] [INFO ] Computed 979 place invariants in 26 ms
[2023-03-08 07:26:59] [INFO ] Implicit Places using invariants in 6398 ms returned [394, 395, 396, 397, 398, 399, 400, 402, 403, 405, 406, 407, 408, 409, 410, 411, 412, 413, 414, 415, 416, 417, 418, 419, 420, 421, 422, 423, 424, 426, 428, 429, 430, 431, 432, 433, 434, 435, 436, 437, 438, 439, 440, 441, 442, 443, 444, 445, 446, 447, 448, 449, 450, 451, 452, 453, 454, 455, 456, 457, 458, 459, 460, 461, 462, 463, 464, 465, 466, 467, 468, 469, 470, 472, 473, 474, 475, 476, 477, 478, 479, 480, 481, 482, 484, 485, 486, 488, 489, 490, 492, 494, 495, 496, 497, 498, 500, 501, 502, 503, 504, 505, 506, 508, 509, 510, 511, 512, 513, 514, 516, 517, 518, 519, 520, 521, 522, 523, 524, 525, 526, 527, 528, 529, 530, 531, 532, 533, 534, 535, 536, 537, 538, 540, 541, 542, 543, 544, 545, 546, 547, 548, 550, 551, 552, 553, 554, 555, 556, 557, 558, 559, 560, 562, 563, 564, 565, 567, 568, 570, 571, 572, 575, 576, 577, 578, 579, 581, 582, 583, 584, 585, 586, 588, 589, 591, 592, 593, 594, 595, 596, 597, 598, 599, 600, 601, 602, 603, 604, 605, 606, 607, 608, 609, 610, 611, 613, 614, 615, 616, 619, 620, 621, 622, 623, 624, 625, 626, 627, 628, 630, 631, 632, 633, 634, 635, 636, 637, 638, 640, 641, 642, 643, 644, 645, 646, 647, 648, 649, 650, 651, 652, 653, 654, 655, 656, 657, 658, 659, 660, 662, 663, 664, 665, 666, 667, 668, 669, 670, 671, 672, 673, 674, 675, 676, 677, 678, 679, 680, 681, 682, 683, 684, 685, 686, 687, 688, 689, 691, 692, 693, 694, 695, 696, 697, 698, 699, 700, 702, 703, 704, 705, 706, 707, 708, 709, 710, 711, 712, 713, 714, 715, 716, 717, 718, 719, 720, 721, 722, 724, 725, 726, 727, 728, 729, 730, 731, 732, 733, 734, 736, 737, 738, 739, 741, 742, 743, 744, 745, 746, 747, 748, 750, 751, 752, 753, 754, 755, 756, 758, 759, 760, 762, 763, 764, 767, 768, 769, 770, 771, 773, 774, 775, 776, 777, 778, 779, 780, 781, 782, 784, 786, 787, 788, 789, 790, 791, 792, 793, 794, 795, 796, 797, 799, 800, 801, 802, 803, 804, 805, 806, 807, 808, 809, 810, 811, 812, 813, 814, 815, 816, 818, 819, 821, 823, 824, 825, 826, 827, 828, 829, 830, 831, 832, 834, 837, 838, 839, 840, 841, 842, 843, 844, 845, 847, 848, 849, 850, 852, 853, 854, 855, 856, 857, 858, 859, 860, 861, 862, 863, 864, 865, 866, 867, 868, 869, 870, 871, 872, 873, 874, 875, 876, 877, 878, 879, 880, 881, 882, 884, 885, 886, 888, 889, 890, 891, 892, 895, 896, 897, 898, 899, 901, 902, 903, 904, 905, 906, 907, 908, 910, 911, 912, 913, 914, 915, 916, 917, 918, 919, 921, 922, 923, 924, 925, 926, 927, 928, 929, 931, 932, 933, 934, 935, 936, 937, 938, 939, 940, 941, 942, 943, 944, 946, 947, 949, 950, 951, 952, 953, 954, 955, 956, 957, 958, 959, 960, 961, 962, 963, 964, 965, 966, 967, 968, 969, 970, 971, 972, 973, 974, 975, 976, 977, 978, 979, 980, 981, 982, 983, 984, 985, 986, 987, 988, 989, 990, 991, 992, 993, 994, 996, 997, 998, 999, 1000, 1001, 1002, 1003, 1004, 1005, 1006, 1007, 1008, 1009, 1010, 1011, 1012, 1014, 1015, 1016, 1017, 1018, 1019, 1021, 1022, 1023, 1024, 1026, 1027, 1028, 1029, 1030, 1032, 1033, 1034, 1035, 1036, 1038, 1040, 1041, 1042, 1044, 1045, 1048, 1049, 1050, 1051, 1053, 1054, 1055, 1056, 1057, 1058, 1059, 1060, 1062, 1063, 1064, 1065, 1066, 1067, 1068, 1069, 1070, 1071, 1072, 1073, 1074, 1075, 1076, 1077, 1078, 1079, 1081, 1082, 1083, 1084, 1085, 1086, 1087, 1088, 1089, 1091, 1092, 1094, 1095, 1096, 1097, 1098, 1099, 1100, 1101, 1102, 1103, 1104, 1105, 1106, 1107, 1108, 1109, 1110, 1111, 1112, 1113, 1114, 1115, 1116, 1117, 1118, 1119, 1120, 1121, 1123, 1124, 1125, 1126, 1128, 1129, 1132, 1133, 1134, 1135, 1136, 1137, 1138, 1139, 1140, 1141, 1142, 1143, 1144, 1145, 1146, 1147, 1148, 1149, 1150, 1151, 1153, 1154, 1155, 1156, 1157, 1158, 1159, 1160, 1162, 1164, 1165, 1166, 1167, 1168, 1169, 1170, 1171, 1172, 1173, 1174, 1176, 1177, 1178, 1179, 1180, 1181, 1182, 1184, 1185, 1187, 1188, 1189, 1190, 1191, 1192, 1193, 1194, 1195, 1196, 1198, 1199, 1200, 1201, 1202, 1203, 1204, 1205, 1206, 1207, 1208, 1210, 1212, 1215, 1217, 1218, 1219, 1220, 1221, 1222, 1223, 1226, 1227, 1228, 1229, 1230, 1231, 1232, 1233, 1234, 1235, 1236, 1237, 1238, 1239, 1240, 1241, 1242, 1244, 1245, 1246, 1247, 1248, 1249, 1250, 1251, 1252, 1253, 1254, 1256, 1257, 1258, 1259, 1260, 1261, 1262, 1263, 1264, 1265, 1266, 1267, 1268, 1269, 1270, 1271, 1272, 1273, 1274, 1276, 1277, 1278, 1279, 1280, 1281, 1283, 1284, 1286, 1287, 1288, 1289, 1290, 1291, 1292, 1293, 1294, 1295, 1296, 1297, 1298, 1299, 1300, 1301, 1302, 1303]
Discarding 812 places :
Ensure Unique test removed 3919 transitions
Reduce isomorphic transitions removed 3919 transitions.
Implicit Place search using SMT only with invariants took 6556 ms to find 812 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 492/1415 places, 1330/9414 transitions.
Drop transitions removed 582 transitions
Redundant transition composition rules discarded 582 transitions
Iterating global reduction 0 with 582 rules applied. Total rules applied 582 place count 492 transition count 748
Applied a total of 582 rules in 15 ms. Remains 492 /492 variables (removed 0) and now considering 748/1330 (removed 582) transitions.
[2023-03-08 07:26:59] [INFO ] Flow matrix only has 570 transitions (discarded 178 similar events)
// Phase 1: matrix 570 rows 492 cols
[2023-03-08 07:26:59] [INFO ] Computed 167 place invariants in 3 ms
[2023-03-08 07:27:00] [INFO ] Implicit Places using invariants in 110 ms returned []
[2023-03-08 07:27:00] [INFO ] Flow matrix only has 570 transitions (discarded 178 similar events)
[2023-03-08 07:27:00] [INFO ] Invariant cache hit.
[2023-03-08 07:27:00] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-08 07:27:00] [INFO ] Implicit Places using invariants and state equation in 371 ms returned []
Implicit Place search using SMT with State Equation took 483 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 492/1415 places, 748/9414 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 7750 ms. Remains : 492/1415 places, 748/9414 transitions.
Support contains 177 out of 492 places after structural reductions.
[2023-03-08 07:27:00] [INFO ] Flatten gal took : 78 ms
[2023-03-08 07:27:00] [INFO ] Flatten gal took : 32 ms
[2023-03-08 07:27:00] [INFO ] Input system was already deterministic with 748 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 410 ms. (steps per millisecond=24 ) properties (out of 86) seen :85
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-08 07:27:01] [INFO ] Flow matrix only has 570 transitions (discarded 178 similar events)
[2023-03-08 07:27:01] [INFO ] Invariant cache hit.
[2023-03-08 07:27:01] [INFO ] [Real]Absence check using 167 positive place invariants in 29 ms returned sat
[2023-03-08 07:27:01] [INFO ] After 313ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-08 07:27:01] [INFO ] [Nat]Absence check using 167 positive place invariants in 25 ms returned sat
[2023-03-08 07:27:01] [INFO ] After 149ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-08 07:27:01] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-08 07:27:01] [INFO ] After 43ms SMT Verify possible using 1 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-08 07:27:01] [INFO ] After 88ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 35 ms.
[2023-03-08 07:27:01] [INFO ] After 376ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 8 ms.
Support contains 4 out of 492 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 492/492 places, 748/748 transitions.
Graph (trivial) has 738 edges and 492 vertex of which 386 / 492 are part of one of the 68 SCC in 6 ms
Free SCC test removed 318 places
Drop transitions removed 737 transitions
Reduce isomorphic transitions removed 737 transitions.
Graph (complete) has 177 edges and 174 vertex of which 11 are kept as prefixes of interest. Removing 163 places using SCC suffix rule.1 ms
Discarding 163 places :
Also discarding 0 output transitions
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 11 transition count 9
Reduce places removed 2 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 7 place count 9 transition count 8
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 7 place count 9 transition count 7
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 9 place count 8 transition count 7
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 10 place count 7 transition count 6
Iterating global reduction 2 with 1 rules applied. Total rules applied 11 place count 7 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 12 place count 7 transition count 5
Applied a total of 12 rules in 14 ms. Remains 7 /492 variables (removed 485) and now considering 5/748 (removed 743) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 14 ms. Remains : 7/492 places, 5/748 transitions.
Finished random walk after 2 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=2 )
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 27 ms
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 28 ms
[2023-03-08 07:27:02] [INFO ] Input system was already deterministic with 748 transitions.
Computed a total of 99 stabilizing places and 1 stable transitions
Graph (complete) has 914 edges and 492 vertex of which 394 are kept as prefixes of interest. Removing 98 places using SCC suffix rule.3 ms
Starting structural reductions in LTL mode, iteration 0 : 492/492 places, 748/748 transitions.
Reduce places removed 85 places and 0 transitions.
Iterating post reduction 0 with 85 rules applied. Total rules applied 85 place count 407 transition count 748
Discarding 21 places :
Symmetric choice reduction at 1 with 21 rule applications. Total rules 106 place count 386 transition count 706
Iterating global reduction 1 with 21 rules applied. Total rules applied 127 place count 386 transition count 706
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 1 with 7 rules applied. Total rules applied 134 place count 386 transition count 699
Applied a total of 134 rules in 12 ms. Remains 386 /492 variables (removed 106) and now considering 699/748 (removed 49) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 386/492 places, 699/748 transitions.
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 15 ms
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 15 ms
[2023-03-08 07:27:02] [INFO ] Input system was already deterministic with 699 transitions.
Starting structural reductions in LTL mode, iteration 0 : 492/492 places, 748/748 transitions.
Reduce places removed 92 places and 0 transitions.
Iterating post reduction 0 with 92 rules applied. Total rules applied 92 place count 400 transition count 748
Discarding 26 places :
Symmetric choice reduction at 1 with 26 rule applications. Total rules 118 place count 374 transition count 696
Iterating global reduction 1 with 26 rules applied. Total rules applied 144 place count 374 transition count 696
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 153 place count 374 transition count 687
Applied a total of 153 rules in 35 ms. Remains 374 /492 variables (removed 118) and now considering 687/748 (removed 61) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 36 ms. Remains : 374/492 places, 687/748 transitions.
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 16 ms
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 14 ms
[2023-03-08 07:27:02] [INFO ] Input system was already deterministic with 687 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 492/492 places, 748/748 transitions.
Graph (trivial) has 744 edges and 492 vertex of which 391 / 492 are part of one of the 69 SCC in 1 ms
Free SCC test removed 322 places
Ensure Unique test removed 674 transitions
Reduce isomorphic transitions removed 674 transitions.
Graph (complete) has 240 edges and 170 vertex of which 73 are kept as prefixes of interest. Removing 97 places using SCC suffix rule.0 ms
Discarding 97 places :
Also discarding 0 output transitions
Discarding 67 places :
Symmetric choice reduction at 0 with 67 rule applications. Total rules 69 place count 6 transition count 7
Iterating global reduction 0 with 67 rules applied. Total rules applied 136 place count 6 transition count 7
Applied a total of 136 rules in 7 ms. Remains 6 /492 variables (removed 486) and now considering 7/748 (removed 741) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 6/492 places, 7/748 transitions.
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 0 ms
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 0 ms
[2023-03-08 07:27:02] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 492/492 places, 748/748 transitions.
Reduce places removed 92 places and 0 transitions.
Iterating post reduction 0 with 92 rules applied. Total rules applied 92 place count 400 transition count 748
Discarding 26 places :
Symmetric choice reduction at 1 with 26 rule applications. Total rules 118 place count 374 transition count 696
Iterating global reduction 1 with 26 rules applied. Total rules applied 144 place count 374 transition count 696
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 153 place count 374 transition count 687
Applied a total of 153 rules in 16 ms. Remains 374 /492 variables (removed 118) and now considering 687/748 (removed 61) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 374/492 places, 687/748 transitions.
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 12 ms
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 12 ms
[2023-03-08 07:27:02] [INFO ] Input system was already deterministic with 687 transitions.
Starting structural reductions in LTL mode, iteration 0 : 492/492 places, 748/748 transitions.
Reduce places removed 94 places and 0 transitions.
Iterating post reduction 0 with 94 rules applied. Total rules applied 94 place count 398 transition count 748
Discarding 25 places :
Symmetric choice reduction at 1 with 25 rule applications. Total rules 119 place count 373 transition count 698
Iterating global reduction 1 with 25 rules applied. Total rules applied 144 place count 373 transition count 698
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 152 place count 373 transition count 690
Applied a total of 152 rules in 16 ms. Remains 373 /492 variables (removed 119) and now considering 690/748 (removed 58) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 373/492 places, 690/748 transitions.
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 12 ms
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 12 ms
[2023-03-08 07:27:02] [INFO ] Input system was already deterministic with 690 transitions.
Starting structural reductions in LTL mode, iteration 0 : 492/492 places, 748/748 transitions.
Reduce places removed 94 places and 0 transitions.
Iterating post reduction 0 with 94 rules applied. Total rules applied 94 place count 398 transition count 748
Discarding 26 places :
Symmetric choice reduction at 1 with 26 rule applications. Total rules 120 place count 372 transition count 696
Iterating global reduction 1 with 26 rules applied. Total rules applied 146 place count 372 transition count 696
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 155 place count 372 transition count 687
Applied a total of 155 rules in 18 ms. Remains 372 /492 variables (removed 120) and now considering 687/748 (removed 61) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 18 ms. Remains : 372/492 places, 687/748 transitions.
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 11 ms
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 11 ms
[2023-03-08 07:27:02] [INFO ] Input system was already deterministic with 687 transitions.
Starting structural reductions in LTL mode, iteration 0 : 492/492 places, 748/748 transitions.
Reduce places removed 95 places and 0 transitions.
Iterating post reduction 0 with 95 rules applied. Total rules applied 95 place count 397 transition count 748
Discarding 25 places :
Symmetric choice reduction at 1 with 25 rule applications. Total rules 120 place count 372 transition count 698
Iterating global reduction 1 with 25 rules applied. Total rules applied 145 place count 372 transition count 698
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 153 place count 372 transition count 690
Applied a total of 153 rules in 9 ms. Remains 372 /492 variables (removed 120) and now considering 690/748 (removed 58) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 372/492 places, 690/748 transitions.
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 11 ms
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 10 ms
[2023-03-08 07:27:02] [INFO ] Input system was already deterministic with 690 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 492/492 places, 748/748 transitions.
Graph (trivial) has 729 edges and 492 vertex of which 376 / 492 are part of one of the 68 SCC in 1 ms
Free SCC test removed 308 places
Ensure Unique test removed 645 transitions
Reduce isomorphic transitions removed 645 transitions.
Graph (complete) has 269 edges and 184 vertex of which 90 are kept as prefixes of interest. Removing 94 places using SCC suffix rule.1 ms
Discarding 94 places :
Also discarding 0 output transitions
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 90 transition count 102
Reduce places removed 1 places and 0 transitions.
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Iterating post reduction 1 with 4 rules applied. Total rules applied 7 place count 89 transition count 99
Reduce places removed 3 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 11 place count 86 transition count 98
Discarding 63 places :
Symmetric choice reduction at 3 with 63 rule applications. Total rules 74 place count 23 transition count 35
Iterating global reduction 3 with 63 rules applied. Total rules applied 137 place count 23 transition count 35
Drop transitions removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 3 with 3 rules applied. Total rules applied 140 place count 23 transition count 32
Applied a total of 140 rules in 8 ms. Remains 23 /492 variables (removed 469) and now considering 32/748 (removed 716) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 23/492 places, 32/748 transitions.
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 1 ms
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 1 ms
[2023-03-08 07:27:02] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in LTL mode, iteration 0 : 492/492 places, 748/748 transitions.
Reduce places removed 96 places and 0 transitions.
Iterating post reduction 0 with 96 rules applied. Total rules applied 96 place count 396 transition count 748
Discarding 26 places :
Symmetric choice reduction at 1 with 26 rule applications. Total rules 122 place count 370 transition count 696
Iterating global reduction 1 with 26 rules applied. Total rules applied 148 place count 370 transition count 696
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 157 place count 370 transition count 687
Applied a total of 157 rules in 8 ms. Remains 370 /492 variables (removed 122) and now considering 687/748 (removed 61) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 370/492 places, 687/748 transitions.
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 10 ms
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 10 ms
[2023-03-08 07:27:02] [INFO ] Input system was already deterministic with 687 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 492/492 places, 748/748 transitions.
Graph (trivial) has 729 edges and 492 vertex of which 376 / 492 are part of one of the 68 SCC in 1 ms
Free SCC test removed 308 places
Ensure Unique test removed 641 transitions
Reduce isomorphic transitions removed 641 transitions.
Graph (complete) has 273 edges and 184 vertex of which 90 are kept as prefixes of interest. Removing 94 places using SCC suffix rule.1 ms
Discarding 94 places :
Also discarding 0 output transitions
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 90 transition count 105
Reduce places removed 2 places and 0 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 1 with 4 rules applied. Total rules applied 8 place count 88 transition count 103
Reduce places removed 2 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 11 place count 86 transition count 102
Discarding 65 places :
Symmetric choice reduction at 3 with 65 rule applications. Total rules 76 place count 21 transition count 36
Iterating global reduction 3 with 65 rules applied. Total rules applied 141 place count 21 transition count 36
Drop transitions removed 4 transitions
Redundant transition composition rules discarded 4 transitions
Iterating global reduction 3 with 4 rules applied. Total rules applied 145 place count 21 transition count 32
Applied a total of 145 rules in 8 ms. Remains 21 /492 variables (removed 471) and now considering 32/748 (removed 716) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 21/492 places, 32/748 transitions.
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 1 ms
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 1 ms
[2023-03-08 07:27:02] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 492/492 places, 748/748 transitions.
Graph (trivial) has 701 edges and 492 vertex of which 358 / 492 are part of one of the 68 SCC in 1 ms
Free SCC test removed 290 places
Ensure Unique test removed 602 transitions
Reduce isomorphic transitions removed 602 transitions.
Graph (complete) has 312 edges and 202 vertex of which 112 are kept as prefixes of interest. Removing 90 places using SCC suffix rule.0 ms
Discarding 90 places :
Also discarding 0 output transitions
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 5 place count 112 transition count 143
Reduce places removed 3 places and 0 transitions.
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Iterating post reduction 1 with 8 rules applied. Total rules applied 13 place count 109 transition count 138
Reduce places removed 5 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 6 rules applied. Total rules applied 19 place count 104 transition count 137
Discarding 63 places :
Symmetric choice reduction at 3 with 63 rule applications. Total rules 82 place count 41 transition count 71
Iterating global reduction 3 with 63 rules applied. Total rules applied 145 place count 41 transition count 71
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 146 place count 41 transition count 70
Drop transitions removed 5 transitions
Redundant transition composition rules discarded 5 transitions
Iterating global reduction 4 with 5 rules applied. Total rules applied 151 place count 41 transition count 65
Partial Post-agglomeration rule applied 2 times.
Drop transitions removed 2 transitions
Iterating global reduction 4 with 2 rules applied. Total rules applied 153 place count 41 transition count 65
Discarding 2 places :
Symmetric choice reduction at 4 with 2 rule applications. Total rules 155 place count 39 transition count 63
Iterating global reduction 4 with 2 rules applied. Total rules applied 157 place count 39 transition count 63
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 4 with 2 rules applied. Total rules applied 159 place count 39 transition count 61
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 5 with 1 rules applied. Total rules applied 160 place count 39 transition count 60
Applied a total of 160 rules in 13 ms. Remains 39 /492 variables (removed 453) and now considering 60/748 (removed 688) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 39/492 places, 60/748 transitions.
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 1 ms
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 1 ms
[2023-03-08 07:27:02] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 492/492 places, 748/748 transitions.
Reduce places removed 82 places and 0 transitions.
Iterating post reduction 0 with 82 rules applied. Total rules applied 82 place count 410 transition count 748
Discarding 21 places :
Symmetric choice reduction at 1 with 21 rule applications. Total rules 103 place count 389 transition count 706
Iterating global reduction 1 with 21 rules applied. Total rules applied 124 place count 389 transition count 706
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 132 place count 389 transition count 698
Applied a total of 132 rules in 9 ms. Remains 389 /492 variables (removed 103) and now considering 698/748 (removed 50) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 389/492 places, 698/748 transitions.
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 11 ms
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 11 ms
[2023-03-08 07:27:02] [INFO ] Input system was already deterministic with 698 transitions.
Starting structural reductions in LTL mode, iteration 0 : 492/492 places, 748/748 transitions.
Reduce places removed 76 places and 0 transitions.
Iterating post reduction 0 with 76 rules applied. Total rules applied 76 place count 416 transition count 748
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 96 place count 396 transition count 708
Iterating global reduction 1 with 20 rules applied. Total rules applied 116 place count 396 transition count 708
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 1 with 6 rules applied. Total rules applied 122 place count 396 transition count 702
Applied a total of 122 rules in 7 ms. Remains 396 /492 variables (removed 96) and now considering 702/748 (removed 46) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 396/492 places, 702/748 transitions.
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 10 ms
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 11 ms
[2023-03-08 07:27:02] [INFO ] Input system was already deterministic with 702 transitions.
Starting structural reductions in LTL mode, iteration 0 : 492/492 places, 748/748 transitions.
Reduce places removed 95 places and 0 transitions.
Iterating post reduction 0 with 95 rules applied. Total rules applied 95 place count 397 transition count 748
Discarding 25 places :
Symmetric choice reduction at 1 with 25 rule applications. Total rules 120 place count 372 transition count 698
Iterating global reduction 1 with 25 rules applied. Total rules applied 145 place count 372 transition count 698
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 154 place count 372 transition count 689
Applied a total of 154 rules in 7 ms. Remains 372 /492 variables (removed 120) and now considering 689/748 (removed 59) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 372/492 places, 689/748 transitions.
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 9 ms
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 10 ms
[2023-03-08 07:27:02] [INFO ] Input system was already deterministic with 689 transitions.
Starting structural reductions in LTL mode, iteration 0 : 492/492 places, 748/748 transitions.
Reduce places removed 89 places and 0 transitions.
Iterating post reduction 0 with 89 rules applied. Total rules applied 89 place count 403 transition count 748
Discarding 25 places :
Symmetric choice reduction at 1 with 25 rule applications. Total rules 114 place count 378 transition count 698
Iterating global reduction 1 with 25 rules applied. Total rules applied 139 place count 378 transition count 698
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 148 place count 378 transition count 689
Applied a total of 148 rules in 11 ms. Remains 378 /492 variables (removed 114) and now considering 689/748 (removed 59) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 378/492 places, 689/748 transitions.
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 10 ms
[2023-03-08 07:27:02] [INFO ] Flatten gal took : 10 ms
[2023-03-08 07:27:02] [INFO ] Input system was already deterministic with 689 transitions.
Starting structural reductions in LTL mode, iteration 0 : 492/492 places, 748/748 transitions.
Reduce places removed 95 places and 0 transitions.
Iterating post reduction 0 with 95 rules applied. Total rules applied 95 place count 397 transition count 748
Discarding 25 places :
Symmetric choice reduction at 1 with 25 rule applications. Total rules 120 place count 372 transition count 698
Iterating global reduction 1 with 25 rules applied. Total rules applied 145 place count 372 transition count 698
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 1 with 7 rules applied. Total rules applied 152 place count 372 transition count 691
Applied a total of 152 rules in 8 ms. Remains 372 /492 variables (removed 120) and now considering 691/748 (removed 57) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 372/492 places, 691/748 transitions.
[2023-03-08 07:27:03] [INFO ] Flatten gal took : 10 ms
[2023-03-08 07:27:03] [INFO ] Flatten gal took : 10 ms
[2023-03-08 07:27:03] [INFO ] Input system was already deterministic with 691 transitions.
[2023-03-08 07:27:03] [INFO ] Flatten gal took : 14 ms
[2023-03-08 07:27:03] [INFO ] Flatten gal took : 14 ms
[2023-03-08 07:27:03] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-08 07:27:03] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 492 places, 748 transitions and 1662 arcs took 3 ms.
Total runtime 10945 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DLCflexbar-PT-5a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA DLCflexbar-PT-5a-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-5a-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-5a-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-5a-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-5a-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-5a-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678261904966

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: LAUNCH task # 48 (type EXCL) for 6 DLCflexbar-PT-5a-CTLFireability-02
lola: time limit : 138 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for DLCflexbar-PT-5a-CTLFireability-02
lola: result : true
lola: markings : 4
lola: fired transitions : 141
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 49 (type SKEL/SRCH) for 45 DLCflexbar-PT-5a-CTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 16 (type EXCL) for 15 DLCflexbar-PT-5a-CTLFireability-05
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type SKEL/SRCH) for DLCflexbar-PT-5a-CTLFireability-15
lola: result : true
lola: markings : 77
lola: fired transitions : 134
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 16 (type EXCL) for DLCflexbar-PT-5a-CTLFireability-05
lola: result : true
lola: markings : 2504
lola: fired transitions : 4977
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 10 (type EXCL) for 9 DLCflexbar-PT-5a-CTLFireability-03
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 10 (type EXCL) for DLCflexbar-PT-5a-CTLFireability-03
lola: result : false
lola: markings : 93
lola: fired transitions : 126
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 DLCflexbar-PT-5a-CTLFireability-00
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
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43 CTL EXCL 35/318 12/32 DLCflexbar-PT-5a-CTLFireability-14 2831867 m, 83509 m/sec, 16271446 t fired, .

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43 CTL EXCL 40/318 14/32 DLCflexbar-PT-5a-CTLFireability-14 3236837 m, 80994 m/sec, 18568990 t fired, .

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43 CTL EXCL 45/318 16/32 DLCflexbar-PT-5a-CTLFireability-14 3655408 m, 83714 m/sec, 20840156 t fired, .

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43 CTL EXCL 50/318 17/32 DLCflexbar-PT-5a-CTLFireability-14 4076106 m, 84139 m/sec, 23106102 t fired, .

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43 CTL EXCL 60/318 21/32 DLCflexbar-PT-5a-CTLFireability-14 4907559 m, 83058 m/sec, 27644325 t fired, .

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43 CTL EXCL 75/318 26/32 DLCflexbar-PT-5a-CTLFireability-14 6103508 m, 79114 m/sec, 34696981 t fired, .

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43 CTL EXCL 80/318 27/32 DLCflexbar-PT-5a-CTLFireability-14 6508416 m, 80981 m/sec, 37009117 t fired, .

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43 CTL EXCL 90/318 31/32 DLCflexbar-PT-5a-CTLFireability-14 7314446 m, 78301 m/sec, 41584395 t fired, .

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43 CTL EXCL 95/318 32/32 DLCflexbar-PT-5a-CTLFireability-14 7723561 m, 81823 m/sec, 43891550 t fired, .

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37 CTL EXCL 70/378 4/32 DLCflexbar-PT-5a-CTLFireability-12 893446 m, 5361 m/sec, 30261560 t fired, .

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37 CTL EXCL 75/378 4/32 DLCflexbar-PT-5a-CTLFireability-12 930684 m, 7447 m/sec, 32462969 t fired, .

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37 CTL EXCL 80/378 5/32 DLCflexbar-PT-5a-CTLFireability-12 966184 m, 7100 m/sec, 34587723 t fired, .

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37 CTL EXCL 85/378 5/32 DLCflexbar-PT-5a-CTLFireability-12 1009243 m, 8611 m/sec, 36708101 t fired, .

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37 CTL EXCL 90/378 5/32 DLCflexbar-PT-5a-CTLFireability-12 1055157 m, 9182 m/sec, 38865646 t fired, .

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37 CTL EXCL 95/378 5/32 DLCflexbar-PT-5a-CTLFireability-12 1101530 m, 9274 m/sec, 41049519 t fired, .

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37 CTL EXCL 100/378 5/32 DLCflexbar-PT-5a-CTLFireability-12 1161988 m, 12091 m/sec, 43224180 t fired, .

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37 CTL EXCL 105/378 5/32 DLCflexbar-PT-5a-CTLFireability-12 1204770 m, 8556 m/sec, 45374464 t fired, .

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37 CTL EXCL 110/378 6/32 DLCflexbar-PT-5a-CTLFireability-12 1258208 m, 10687 m/sec, 47526828 t fired, .

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37 CTL EXCL 120/378 6/32 DLCflexbar-PT-5a-CTLFireability-12 1404862 m, 19821 m/sec, 51834730 t fired, .

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37 CTL EXCL 125/378 7/32 DLCflexbar-PT-5a-CTLFireability-12 1490652 m, 17158 m/sec, 53996853 t fired, .

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37 CTL EXCL 140/378 8/32 DLCflexbar-PT-5a-CTLFireability-12 1770978 m, 21027 m/sec, 60430665 t fired, .

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37 CTL EXCL 145/378 8/32 DLCflexbar-PT-5a-CTLFireability-12 1843306 m, 14465 m/sec, 62604593 t fired, .

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37 CTL EXCL 150/378 8/32 DLCflexbar-PT-5a-CTLFireability-12 1925307 m, 16400 m/sec, 64778903 t fired, .

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37 CTL EXCL 155/378 9/32 DLCflexbar-PT-5a-CTLFireability-12 1996834 m, 14305 m/sec, 66920062 t fired, .

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37 CTL EXCL 160/378 9/32 DLCflexbar-PT-5a-CTLFireability-12 2087315 m, 18096 m/sec, 69083987 t fired, .

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37 CTL EXCL 165/378 9/32 DLCflexbar-PT-5a-CTLFireability-12 2152138 m, 12964 m/sec, 71237716 t fired, .

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37 CTL EXCL 170/378 10/32 DLCflexbar-PT-5a-CTLFireability-12 2214588 m, 12490 m/sec, 73385661 t fired, .

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37 CTL EXCL 175/378 10/32 DLCflexbar-PT-5a-CTLFireability-12 2273139 m, 11710 m/sec, 75509397 t fired, .

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37 CTL EXCL 180/378 10/32 DLCflexbar-PT-5a-CTLFireability-12 2331166 m, 11605 m/sec, 77618730 t fired, .

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37 CTL EXCL 185/378 10/32 DLCflexbar-PT-5a-CTLFireability-12 2388315 m, 11429 m/sec, 79724062 t fired, .

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37 CTL EXCL 190/378 11/32 DLCflexbar-PT-5a-CTLFireability-12 2442893 m, 10915 m/sec, 81841738 t fired, .

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37 CTL EXCL 210/378 12/32 DLCflexbar-PT-5a-CTLFireability-12 2724134 m, 12130 m/sec, 90488721 t fired, .

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37 CTL EXCL 215/378 12/32 DLCflexbar-PT-5a-CTLFireability-12 2783983 m, 11969 m/sec, 92639309 t fired, .

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37 CTL EXCL 240/378 13/32 DLCflexbar-PT-5a-CTLFireability-12 3116612 m, 16577 m/sec, 103351411 t fired, .

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37 CTL EXCL 245/378 14/32 DLCflexbar-PT-5a-CTLFireability-12 3182600 m, 13197 m/sec, 105486554 t fired, .

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37 CTL EXCL 375/378 24/32 DLCflexbar-PT-5a-CTLFireability-12 5627892 m, 23116 m/sec, 160911337 t fired, .

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34 CTL EXCL 5/377 2/32 DLCflexbar-PT-5a-CTLFireability-11 370963 m, 74192 m/sec, 2311857 t fired, .
37 CTL EXCL 5/3023 1/5 DLCflexbar-PT-5a-CTLFireability-12 57089 m, -1114160 m/sec, 2198560 t fired, .

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34 CTL EXCL 10/377 4/32 DLCflexbar-PT-5a-CTLFireability-11 781174 m, 82042 m/sec, 4639892 t fired, .
37 CTL EXCL 10/335 1/5 DLCflexbar-PT-5a-CTLFireability-12 143376 m, 17257 m/sec, 4400164 t fired, .

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34 CTL EXCL 15/377 6/32 DLCflexbar-PT-5a-CTLFireability-11 1207864 m, 85338 m/sec, 6906125 t fired, .
37 CTL EXCL 15/335 1/5 DLCflexbar-PT-5a-CTLFireability-12 184346 m, 8194 m/sec, 6590030 t fired, .

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34 CTL EXCL 20/377 7/32 DLCflexbar-PT-5a-CTLFireability-11 1592570 m, 76941 m/sec, 9245735 t fired, .
37 CTL EXCL 20/335 1/5 DLCflexbar-PT-5a-CTLFireability-12 240833 m, 11297 m/sec, 8797151 t fired, .

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34 CTL EXCL 25/377 9/32 DLCflexbar-PT-5a-CTLFireability-11 1993193 m, 80124 m/sec, 11554523 t fired, .
37 CTL EXCL 25/335 2/5 DLCflexbar-PT-5a-CTLFireability-12 282820 m, 8397 m/sec, 10995355 t fired, .

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34 CTL EXCL 30/377 11/32 DLCflexbar-PT-5a-CTLFireability-11 2389151 m, 79191 m/sec, 13859457 t fired, .
37 CTL EXCL 30/335 2/5 DLCflexbar-PT-5a-CTLFireability-12 329549 m, 9345 m/sec, 13186484 t fired, .

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34 CTL EXCL 35/377 12/32 DLCflexbar-PT-5a-CTLFireability-11 2803732 m, 82916 m/sec, 16128164 t fired, .
37 CTL EXCL 35/335 2/5 DLCflexbar-PT-5a-CTLFireability-12 435106 m, 21111 m/sec, 15378726 t fired, .

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34 CTL EXCL 40/377 14/32 DLCflexbar-PT-5a-CTLFireability-11 3205367 m, 80327 m/sec, 18412516 t fired, .
37 CTL EXCL 40/335 3/5 DLCflexbar-PT-5a-CTLFireability-12 519726 m, 16924 m/sec, 17542015 t fired, .

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34 CTL EXCL 45/377 16/32 DLCflexbar-PT-5a-CTLFireability-11 3624161 m, 83758 m/sec, 20669668 t fired, .
37 CTL EXCL 45/335 3/5 DLCflexbar-PT-5a-CTLFireability-12 613584 m, 18771 m/sec, 19688368 t fired, .

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34 CTL EXCL 50/377 18/32 DLCflexbar-PT-5a-CTLFireability-11 4044178 m, 84003 m/sec, 22919873 t fired, .
37 CTL EXCL 50/335 3/5 DLCflexbar-PT-5a-CTLFireability-12 708730 m, 19029 m/sec, 21824245 t fired, .

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34 CTL EXCL 55/377 19/32 DLCflexbar-PT-5a-CTLFireability-11 4454227 m, 82009 m/sec, 25175246 t fired, .
37 CTL EXCL 55/335 4/5 DLCflexbar-PT-5a-CTLFireability-12 787970 m, 15848 m/sec, 23932042 t fired, .

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34 CTL EXCL 60/377 21/32 DLCflexbar-PT-5a-CTLFireability-11 4870601 m, 83274 m/sec, 27420970 t fired, .
37 CTL EXCL 60/335 4/5 DLCflexbar-PT-5a-CTLFireability-12 845394 m, 11484 m/sec, 26061102 t fired, .

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34 CTL EXCL 65/377 23/32 DLCflexbar-PT-5a-CTLFireability-11 5252261 m, 76332 m/sec, 29776312 t fired, .
37 CTL EXCL 65/335 4/5 DLCflexbar-PT-5a-CTLFireability-12 867687 m, 4458 m/sec, 28191700 t fired, .

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34 CTL EXCL 70/377 24/32 DLCflexbar-PT-5a-CTLFireability-11 5662836 m, 82115 m/sec, 32086829 t fired, .
37 CTL EXCL 70/335 4/5 DLCflexbar-PT-5a-CTLFireability-12 895746 m, 5611 m/sec, 30346663 t fired, .

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34 CTL EXCL 75/377 26/32 DLCflexbar-PT-5a-CTLFireability-11 6056812 m, 78795 m/sec, 34414570 t fired, .
37 CTL EXCL 75/335 4/5 DLCflexbar-PT-5a-CTLFireability-12 931535 m, 7157 m/sec, 32548349 t fired, .

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34 CTL EXCL 80/377 28/32 DLCflexbar-PT-5a-CTLFireability-11 6455573 m, 79752 m/sec, 36719018 t fired, .
37 CTL EXCL 80/335 5/5 DLCflexbar-PT-5a-CTLFireability-12 968018 m, 7296 m/sec, 34691057 t fired, .

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34 CTL EXCL 85/377 29/32 DLCflexbar-PT-5a-CTLFireability-11 6865604 m, 82006 m/sec, 39000986 t fired, .
37 CTL EXCL 85/335 5/5 DLCflexbar-PT-5a-CTLFireability-12 1011607 m, 8717 m/sec, 36823100 t fired, .

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34 CTL EXCL 90/377 31/32 DLCflexbar-PT-5a-CTLFireability-11 7258545 m, 78588 m/sec, 41286813 t fired, .
37 CTL EXCL 90/335 5/5 DLCflexbar-PT-5a-CTLFireability-12 1058845 m, 9447 m/sec, 38977398 t fired, .

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37 CTL EXCL 100/377 5/5 DLCflexbar-PT-5a-CTLFireability-12 1164238 m, 12207 m/sec, 43326609 t fired, .

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DLCflexbar-PT-5a-CTLFireability-09: SP ACTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-5a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
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DLCflexbar-PT-5a-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
DLCflexbar-PT-5a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 200/486 8/32 DLCflexbar-PT-5a-CTLFireability-06 1809958 m, 8685 m/sec, 88105586 t fired, .

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DLCflexbar-PT-5a-CTLFireability-05: CTL true CTL model checker
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DLCflexbar-PT-5a-CTLFireability-15: CTL true CTL model checker

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DLCflexbar-PT-5a-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
DLCflexbar-PT-5a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 205/486 8/32 DLCflexbar-PT-5a-CTLFireability-06 1853321 m, 8672 m/sec, 90239318 t fired, .

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DLCflexbar-PT-5a-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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DLCflexbar-PT-5a-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
DLCflexbar-PT-5a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 210/486 8/32 DLCflexbar-PT-5a-CTLFireability-06 1896807 m, 8697 m/sec, 92383708 t fired, .

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DLCflexbar-PT-5a-CTLFireability-15: CTL true CTL model checker

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DLCflexbar-PT-5a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 215/486 9/32 DLCflexbar-PT-5a-CTLFireability-06 1941322 m, 8903 m/sec, 94555508 t fired, .

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DLCflexbar-PT-5a-CTLFireability-15: CTL true CTL model checker

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DLCflexbar-PT-5a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 220/486 9/32 DLCflexbar-PT-5a-CTLFireability-06 1988157 m, 9367 m/sec, 96797293 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 225/486 9/32 DLCflexbar-PT-5a-CTLFireability-06 2035409 m, 9450 m/sec, 99042919 t fired, .

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DLCflexbar-PT-5a-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
DLCflexbar-PT-5a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 230/486 9/32 DLCflexbar-PT-5a-CTLFireability-06 2082974 m, 9513 m/sec, 101271975 t fired, .

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DLCflexbar-PT-5a-CTLFireability-15: CTL true CTL model checker

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DLCflexbar-PT-5a-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
DLCflexbar-PT-5a-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 235/486 9/32 DLCflexbar-PT-5a-CTLFireability-06 2128384 m, 9082 m/sec, 103461304 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 240/486 10/32 DLCflexbar-PT-5a-CTLFireability-06 2174372 m, 9197 m/sec, 105678285 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 245/486 10/32 DLCflexbar-PT-5a-CTLFireability-06 2221238 m, 9373 m/sec, 107906847 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 250/486 10/32 DLCflexbar-PT-5a-CTLFireability-06 2267316 m, 9215 m/sec, 110096956 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 255/486 10/32 DLCflexbar-PT-5a-CTLFireability-06 2314216 m, 9380 m/sec, 112303537 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 260/486 10/32 DLCflexbar-PT-5a-CTLFireability-06 2359990 m, 9154 m/sec, 114502564 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 265/486 11/32 DLCflexbar-PT-5a-CTLFireability-06 2405497 m, 9101 m/sec, 116716017 t fired, .

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19 CTL EXCL 485/486 19/32 DLCflexbar-PT-5a-CTLFireability-06 4391365 m, 9289 m/sec, 213517775 t fired, .

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13 CTL EXCL 25/485 1/32 DLCflexbar-PT-5a-CTLFireability-04 236031 m, 9198 m/sec, 11388180 t fired, .
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13 CTL EXCL 30/485 2/32 DLCflexbar-PT-5a-CTLFireability-04 281708 m, 9135 m/sec, 13605536 t fired, .
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13 CTL EXCL 40/485 2/32 DLCflexbar-PT-5a-CTLFireability-04 376594 m, 9342 m/sec, 18050657 t fired, .
19 CTL EXCL 40/404 2/5 DLCflexbar-PT-5a-CTLFireability-06 368272 m, 9159 m/sec, 18028177 t fired, .

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13 CTL EXCL 45/485 2/32 DLCflexbar-PT-5a-CTLFireability-04 422983 m, 9277 m/sec, 20256561 t fired, .
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13 CTL EXCL 120/485 5/32 DLCflexbar-PT-5a-CTLFireability-04 1071195 m, 8432 m/sec, 51376978 t fired, .
19 CTL EXCL 120/404 5/5 DLCflexbar-PT-5a-CTLFireability-06 1040947 m, 8091 m/sec, 51029238 t fired, .

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13 CTL EXCL 125/485 5/32 DLCflexbar-PT-5a-CTLFireability-04 1111917 m, 8144 m/sec, 53263964 t fired, .
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13 CTL EXCL 130/485 5/32 DLCflexbar-PT-5a-CTLFireability-04 1157942 m, 9205 m/sec, 55418887 t fired, .
19 CTL EXCL 130/404 5/5 DLCflexbar-PT-5a-CTLFireability-06 1133197 m, 9090 m/sec, 55399736 t fired, .

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13 CTL EXCL 135/485 5/32 DLCflexbar-PT-5a-CTLFireability-04 1195638 m, 7539 m/sec, 57206205 t fired, .
19 CTL EXCL 135/404 5/5 DLCflexbar-PT-5a-CTLFireability-06 1171626 m, 7685 m/sec, 57240099 t fired, .

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13 CTL EXCL 140/485 6/32 DLCflexbar-PT-5a-CTLFireability-04 1240114 m, 8895 m/sec, 59317297 t fired, .

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13 CTL EXCL 145/485 6/32 DLCflexbar-PT-5a-CTLFireability-04 1288764 m, 9730 m/sec, 61563885 t fired, .

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13 CTL EXCL 150/485 6/32 DLCflexbar-PT-5a-CTLFireability-04 1337682 m, 9783 m/sec, 63818407 t fired, .

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13 CTL EXCL 155/485 6/32 DLCflexbar-PT-5a-CTLFireability-04 1385064 m, 9476 m/sec, 66033171 t fired, .

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13 CTL EXCL 160/485 6/32 DLCflexbar-PT-5a-CTLFireability-04 1427118 m, 8410 m/sec, 68023840 t fired, .

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13 CTL EXCL 165/485 7/32 DLCflexbar-PT-5a-CTLFireability-04 1474822 m, 9540 m/sec, 70251742 t fired, .

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13 CTL EXCL 170/485 7/32 DLCflexbar-PT-5a-CTLFireability-04 1522045 m, 9444 m/sec, 72471869 t fired, .

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13 CTL EXCL 175/485 7/32 DLCflexbar-PT-5a-CTLFireability-04 1567610 m, 9113 m/sec, 74644171 t fired, .

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13 CTL EXCL 180/485 7/32 DLCflexbar-PT-5a-CTLFireability-04 1612555 m, 8989 m/sec, 76797985 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 255/485 10/32 DLCflexbar-PT-5a-CTLFireability-04 2301808 m, 9586 m/sec, 109415052 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 260/485 10/32 DLCflexbar-PT-5a-CTLFireability-04 2348151 m, 9268 m/sec, 111580433 t fired, .

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DLCflexbar-PT-5a-CTLFireability-15: CTL true CTL model checker

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 265/485 10/32 DLCflexbar-PT-5a-CTLFireability-04 2393940 m, 9157 m/sec, 113763292 t fired, .

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DLCflexbar-PT-5a-CTLFireability-15: CTL true CTL model checker

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 270/485 11/32 DLCflexbar-PT-5a-CTLFireability-04 2440540 m, 9320 m/sec, 115953436 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 275/485 11/32 DLCflexbar-PT-5a-CTLFireability-04 2487165 m, 9325 m/sec, 118131374 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 280/485 11/32 DLCflexbar-PT-5a-CTLFireability-04 2532853 m, 9137 m/sec, 120295136 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 285/485 11/32 DLCflexbar-PT-5a-CTLFireability-04 2577636 m, 8956 m/sec, 122448660 t fired, .

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DLCflexbar-PT-5a-CTLFireability-15: CTL true CTL model checker

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 290/485 11/32 DLCflexbar-PT-5a-CTLFireability-04 2621970 m, 8866 m/sec, 124589905 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 295/485 12/32 DLCflexbar-PT-5a-CTLFireability-04 2666390 m, 8884 m/sec, 126718311 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 300/485 12/32 DLCflexbar-PT-5a-CTLFireability-04 2706778 m, 8077 m/sec, 128672811 t fired, .

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13 CTL EXCL 305/485 12/32 DLCflexbar-PT-5a-CTLFireability-04 2736677 m, 5979 m/sec, 130114119 t fired, .

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/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 471 Killed lola --conf=$BIN_DIR/configfiles/ctlfireabilityconf --formula=$DIR/CTLFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml