Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r103-tall-167814478400538.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is DLCflexbar-PT-4a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r103-tall-167814478400538
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.1M
-rw-r--r-- 1 mcc users 7.3K Feb 25 16:05 CTLCardinality.txt
-rw-r--r-- 1 mcc users 80K Feb 25 16:05 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Feb 25 15:30 CTLFireability.txt
-rw-r--r-- 1 mcc users 58K Feb 25 15:30 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:51 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 15:51 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 15:51 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 15:51 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.1K Feb 25 16:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 81K Feb 25 16:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.6K Feb 25 16:32 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 62K Feb 25 16:32 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:51 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:51 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 1.7M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-00
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-01
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-02
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-03
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-04
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-05
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-06
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-07
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-08
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-09
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-10
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-11
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-12
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-13
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-14
FORMULA_NAME DLCflexbar-PT-4a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678259621051

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCflexbar-PT-4a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 07:13:42] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-08 07:13:42] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 07:13:42] [INFO ] Load time of PNML (sax parser for PT used): 228 ms
[2023-03-08 07:13:42] [INFO ] Transformed 927 places.
[2023-03-08 07:13:42] [INFO ] Transformed 6615 transitions.
[2023-03-08 07:13:42] [INFO ] Found NUPN structural information;
[2023-03-08 07:13:43] [INFO ] Parsed PT model containing 927 places and 6615 transitions and 25705 arcs in 488 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 11 ms.
Ensure Unique test removed 752 transitions
Reduce redundant transitions removed 752 transitions.
Support contains 195 out of 927 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 927/927 places, 5863/5863 transitions.
Discarding 71 places :
Symmetric choice reduction at 0 with 71 rule applications. Total rules 71 place count 856 transition count 5322
Iterating global reduction 0 with 71 rules applied. Total rules applied 142 place count 856 transition count 5322
Ensure Unique test removed 30 transitions
Reduce isomorphic transitions removed 30 transitions.
Iterating post reduction 0 with 30 rules applied. Total rules applied 172 place count 856 transition count 5292
Drop transitions removed 1949 transitions
Redundant transition composition rules discarded 1949 transitions
Iterating global reduction 1 with 1949 rules applied. Total rules applied 2121 place count 856 transition count 3343
Applied a total of 2121 rules in 315 ms. Remains 856 /927 variables (removed 71) and now considering 3343/5863 (removed 2520) transitions.
[2023-03-08 07:13:43] [INFO ] Flow matrix only has 437 transitions (discarded 2906 similar events)
// Phase 1: matrix 437 rows 856 cols
[2023-03-08 07:13:43] [INFO ] Computed 608 place invariants in 20 ms
[2023-03-08 07:13:46] [INFO ] Implicit Places using invariants in 2929 ms returned [298, 300, 302, 303, 304, 305, 306, 307, 308, 309, 310, 311, 312, 313, 314, 316, 317, 318, 319, 320, 323, 324, 326, 328, 329, 330, 331, 332, 333, 334, 335, 336, 337, 338, 339, 340, 341, 342, 343, 344, 348, 350, 351, 352, 354, 355, 356, 357, 358, 360, 362, 363, 364, 366, 367, 368, 370, 371, 372, 374, 376, 377, 378, 381, 382, 383, 384, 385, 386, 387, 388, 391, 392, 393, 394, 395, 396, 397, 398, 399, 400, 401, 402, 403, 404, 405, 406, 407, 408, 409, 411, 412, 413, 414, 415, 416, 417, 418, 421, 422, 423, 424, 425, 426, 429, 430, 431, 432, 434, 435, 436, 437, 438, 439, 440, 441, 442, 443, 444, 446, 447, 448, 449, 450, 451, 452, 453, 455, 458, 459, 460, 461, 462, 463, 464, 466, 467, 468, 469, 470, 471, 472, 474, 475, 476, 477, 478, 480, 481, 482, 483, 484, 485, 486, 487, 488, 489, 492, 493, 495, 496, 497, 498, 499, 500, 501, 502, 503, 504, 505, 506, 507, 508, 509, 510, 512, 513, 514, 515, 516, 517, 518, 519, 521, 522, 523, 525, 526, 527, 528, 530, 534, 535, 536, 537, 538, 539, 540, 541, 542, 543, 544, 546, 548, 549, 551, 552, 553, 554, 555, 556, 557, 558, 560, 561, 562, 563, 564, 565, 566, 568, 570, 571, 572, 573, 574, 575, 576, 577, 578, 580, 581, 582, 583, 584, 585, 586, 588, 589, 590, 592, 593, 594, 596, 597, 598, 599, 600, 603, 606, 607, 608, 609, 610, 612, 613, 614, 615, 616, 617, 618, 621, 622, 623, 624, 625, 626, 627, 628, 629, 630, 632, 633, 634, 635, 636, 639, 640, 641, 642, 643, 644, 645, 646, 647, 648, 649, 650, 651, 652, 655, 656, 658, 659, 660, 661, 663, 665, 666, 667, 668, 669, 670, 671, 672, 674, 676, 678, 679, 680, 682, 683, 684, 686, 687, 688, 689, 690, 691, 692, 693, 695, 696, 699, 700, 701, 702, 703, 704, 706, 707, 708, 709, 712, 713, 714, 715, 716, 717, 720, 721, 722, 723, 724, 725, 726, 727, 728, 730, 731, 732, 733, 734, 736, 737, 738, 739, 742, 743, 744, 746, 747, 748, 749, 751, 752, 753, 755, 756, 757, 758, 762, 763, 764, 766, 767, 769, 771, 773, 774, 775, 776, 777, 778, 779, 780, 781, 782, 783, 784, 786, 787, 789, 790, 791, 792, 793, 794, 795, 797, 798, 799, 800, 801, 802, 803, 804, 805, 806, 807, 809, 810, 811, 812, 813, 814, 816, 817, 818, 819, 820, 822, 823, 825, 826, 827, 828, 830, 832, 833, 835, 836, 838, 839, 840, 841, 842, 843, 844, 846, 847, 848, 849, 851, 852, 853, 855]
Discarding 447 places :
Ensure Unique test removed 2108 transitions
Reduce isomorphic transitions removed 2108 transitions.
Implicit Place search using SMT only with invariants took 2979 ms to find 447 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 409/927 places, 1235/5863 transitions.
Drop transitions removed 658 transitions
Redundant transition composition rules discarded 658 transitions
Iterating global reduction 0 with 658 rules applied. Total rules applied 658 place count 409 transition count 577
Applied a total of 658 rules in 11 ms. Remains 409 /409 variables (removed 0) and now considering 577/1235 (removed 658) transitions.
[2023-03-08 07:13:46] [INFO ] Flow matrix only has 437 transitions (discarded 140 similar events)
// Phase 1: matrix 437 rows 409 cols
[2023-03-08 07:13:46] [INFO ] Computed 161 place invariants in 3 ms
[2023-03-08 07:13:46] [INFO ] Implicit Places using invariants in 320 ms returned []
[2023-03-08 07:13:46] [INFO ] Flow matrix only has 437 transitions (discarded 140 similar events)
[2023-03-08 07:13:46] [INFO ] Invariant cache hit.
[2023-03-08 07:13:46] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-08 07:13:46] [INFO ] Implicit Places using invariants and state equation in 237 ms returned []
Implicit Place search using SMT with State Equation took 561 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 409/927 places, 577/5863 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 3868 ms. Remains : 409/927 places, 577/5863 transitions.
Support contains 195 out of 409 places after structural reductions.
[2023-03-08 07:13:47] [INFO ] Flatten gal took : 83 ms
[2023-03-08 07:13:47] [INFO ] Flatten gal took : 37 ms
[2023-03-08 07:13:47] [INFO ] Input system was already deterministic with 577 transitions.
Finished random walk after 4941 steps, including 1 resets, run visited all 102 properties in 367 ms. (steps per millisecond=13 )
[2023-03-08 07:13:47] [INFO ] Flatten gal took : 23 ms
[2023-03-08 07:13:47] [INFO ] Flatten gal took : 24 ms
[2023-03-08 07:13:47] [INFO ] Input system was already deterministic with 577 transitions.
Computed a total of 112 stabilizing places and 1 stable transitions
Graph (complete) has 737 edges and 409 vertex of which 298 are kept as prefixes of interest. Removing 111 places using SCC suffix rule.4 ms
Starting structural reductions in SI_CTL mode, iteration 0 : 409/409 places, 577/577 transitions.
Graph (trivial) has 548 edges and 409 vertex of which 278 / 409 are part of one of the 50 SCC in 3 ms
Free SCC test removed 228 places
Ensure Unique test removed 482 transitions
Reduce isomorphic transitions removed 482 transitions.
Graph (complete) has 255 edges and 181 vertex of which 78 are kept as prefixes of interest. Removing 103 places using SCC suffix rule.1 ms
Discarding 103 places :
Also discarding 0 output transitions
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 78 transition count 94
Reduce places removed 1 places and 0 transitions.
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Iterating post reduction 1 with 5 rules applied. Total rules applied 8 place count 77 transition count 90
Reduce places removed 4 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 5 rules applied. Total rules applied 13 place count 73 transition count 89
Discarding 41 places :
Symmetric choice reduction at 3 with 41 rule applications. Total rules 54 place count 32 transition count 48
Iterating global reduction 3 with 41 rules applied. Total rules applied 95 place count 32 transition count 48
Drop transitions removed 4 transitions
Redundant transition composition rules discarded 4 transitions
Iterating global reduction 3 with 4 rules applied. Total rules applied 99 place count 32 transition count 44
Applied a total of 99 rules in 23 ms. Remains 32 /409 variables (removed 377) and now considering 44/577 (removed 533) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 23 ms. Remains : 32/409 places, 44/577 transitions.
[2023-03-08 07:13:47] [INFO ] Flatten gal took : 1 ms
[2023-03-08 07:13:47] [INFO ] Flatten gal took : 1 ms
[2023-03-08 07:13:47] [INFO ] Input system was already deterministic with 44 transitions.
Starting structural reductions in LTL mode, iteration 0 : 409/409 places, 577/577 transitions.
Reduce places removed 109 places and 0 transitions.
Iterating post reduction 0 with 109 rules applied. Total rules applied 109 place count 300 transition count 577
Discarding 29 places :
Symmetric choice reduction at 1 with 29 rule applications. Total rules 138 place count 271 transition count 519
Iterating global reduction 1 with 29 rules applied. Total rules applied 167 place count 271 transition count 519
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 1 with 14 rules applied. Total rules applied 181 place count 271 transition count 505
Applied a total of 181 rules in 10 ms. Remains 271 /409 variables (removed 138) and now considering 505/577 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 271/409 places, 505/577 transitions.
[2023-03-08 07:13:47] [INFO ] Flatten gal took : 12 ms
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 12 ms
[2023-03-08 07:13:48] [INFO ] Input system was already deterministic with 505 transitions.
Starting structural reductions in LTL mode, iteration 0 : 409/409 places, 577/577 transitions.
Reduce places removed 100 places and 0 transitions.
Iterating post reduction 0 with 100 rules applied. Total rules applied 100 place count 309 transition count 577
Discarding 26 places :
Symmetric choice reduction at 1 with 26 rule applications. Total rules 126 place count 283 transition count 525
Iterating global reduction 1 with 26 rules applied. Total rules applied 152 place count 283 transition count 525
Ensure Unique test removed 13 transitions
Reduce isomorphic transitions removed 13 transitions.
Iterating post reduction 1 with 13 rules applied. Total rules applied 165 place count 283 transition count 512
Applied a total of 165 rules in 9 ms. Remains 283 /409 variables (removed 126) and now considering 512/577 (removed 65) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 283/409 places, 512/577 transitions.
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 11 ms
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 11 ms
[2023-03-08 07:13:48] [INFO ] Input system was already deterministic with 512 transitions.
Starting structural reductions in LTL mode, iteration 0 : 409/409 places, 577/577 transitions.
Reduce places removed 103 places and 0 transitions.
Iterating post reduction 0 with 103 rules applied. Total rules applied 103 place count 306 transition count 577
Discarding 26 places :
Symmetric choice reduction at 1 with 26 rule applications. Total rules 129 place count 280 transition count 525
Iterating global reduction 1 with 26 rules applied. Total rules applied 155 place count 280 transition count 525
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 12 transitions.
Iterating post reduction 1 with 12 rules applied. Total rules applied 167 place count 280 transition count 513
Applied a total of 167 rules in 10 ms. Remains 280 /409 variables (removed 129) and now considering 513/577 (removed 64) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 280/409 places, 513/577 transitions.
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 11 ms
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 11 ms
[2023-03-08 07:13:48] [INFO ] Input system was already deterministic with 513 transitions.
Starting structural reductions in LTL mode, iteration 0 : 409/409 places, 577/577 transitions.
Reduce places removed 104 places and 0 transitions.
Iterating post reduction 0 with 104 rules applied. Total rules applied 104 place count 305 transition count 577
Discarding 26 places :
Symmetric choice reduction at 1 with 26 rule applications. Total rules 130 place count 279 transition count 525
Iterating global reduction 1 with 26 rules applied. Total rules applied 156 place count 279 transition count 525
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 1 with 11 rules applied. Total rules applied 167 place count 279 transition count 514
Applied a total of 167 rules in 9 ms. Remains 279 /409 variables (removed 130) and now considering 514/577 (removed 63) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 279/409 places, 514/577 transitions.
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 11 ms
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 10 ms
[2023-03-08 07:13:48] [INFO ] Input system was already deterministic with 514 transitions.
Starting structural reductions in LTL mode, iteration 0 : 409/409 places, 577/577 transitions.
Reduce places removed 104 places and 0 transitions.
Iterating post reduction 0 with 104 rules applied. Total rules applied 104 place count 305 transition count 577
Discarding 26 places :
Symmetric choice reduction at 1 with 26 rule applications. Total rules 130 place count 279 transition count 525
Iterating global reduction 1 with 26 rules applied. Total rules applied 156 place count 279 transition count 525
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 1 with 14 rules applied. Total rules applied 170 place count 279 transition count 511
Applied a total of 170 rules in 9 ms. Remains 279 /409 variables (removed 130) and now considering 511/577 (removed 66) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 279/409 places, 511/577 transitions.
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 11 ms
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 10 ms
[2023-03-08 07:13:48] [INFO ] Input system was already deterministic with 511 transitions.
Starting structural reductions in LTL mode, iteration 0 : 409/409 places, 577/577 transitions.
Reduce places removed 106 places and 0 transitions.
Iterating post reduction 0 with 106 rules applied. Total rules applied 106 place count 303 transition count 577
Discarding 26 places :
Symmetric choice reduction at 1 with 26 rule applications. Total rules 132 place count 277 transition count 525
Iterating global reduction 1 with 26 rules applied. Total rules applied 158 place count 277 transition count 525
Ensure Unique test removed 13 transitions
Reduce isomorphic transitions removed 13 transitions.
Iterating post reduction 1 with 13 rules applied. Total rules applied 171 place count 277 transition count 512
Applied a total of 171 rules in 9 ms. Remains 277 /409 variables (removed 132) and now considering 512/577 (removed 65) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 277/409 places, 512/577 transitions.
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 9 ms
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 9 ms
[2023-03-08 07:13:48] [INFO ] Input system was already deterministic with 512 transitions.
Starting structural reductions in LTL mode, iteration 0 : 409/409 places, 577/577 transitions.
Reduce places removed 103 places and 0 transitions.
Iterating post reduction 0 with 103 rules applied. Total rules applied 103 place count 306 transition count 577
Discarding 28 places :
Symmetric choice reduction at 1 with 28 rule applications. Total rules 131 place count 278 transition count 521
Iterating global reduction 1 with 28 rules applied. Total rules applied 159 place count 278 transition count 521
Ensure Unique test removed 13 transitions
Reduce isomorphic transitions removed 13 transitions.
Iterating post reduction 1 with 13 rules applied. Total rules applied 172 place count 278 transition count 508
Applied a total of 172 rules in 14 ms. Remains 278 /409 variables (removed 131) and now considering 508/577 (removed 69) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 14 ms. Remains : 278/409 places, 508/577 transitions.
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 9 ms
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 8 ms
[2023-03-08 07:13:48] [INFO ] Input system was already deterministic with 508 transitions.
Starting structural reductions in LTL mode, iteration 0 : 409/409 places, 577/577 transitions.
Reduce places removed 94 places and 0 transitions.
Iterating post reduction 0 with 94 rules applied. Total rules applied 94 place count 315 transition count 577
Discarding 25 places :
Symmetric choice reduction at 1 with 25 rule applications. Total rules 119 place count 290 transition count 527
Iterating global reduction 1 with 25 rules applied. Total rules applied 144 place count 290 transition count 527
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 1 with 14 rules applied. Total rules applied 158 place count 290 transition count 513
Applied a total of 158 rules in 8 ms. Remains 290 /409 variables (removed 119) and now considering 513/577 (removed 64) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 290/409 places, 513/577 transitions.
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 9 ms
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 10 ms
[2023-03-08 07:13:48] [INFO ] Input system was already deterministic with 513 transitions.
Starting structural reductions in LTL mode, iteration 0 : 409/409 places, 577/577 transitions.
Reduce places removed 103 places and 0 transitions.
Iterating post reduction 0 with 103 rules applied. Total rules applied 103 place count 306 transition count 577
Discarding 28 places :
Symmetric choice reduction at 1 with 28 rule applications. Total rules 131 place count 278 transition count 521
Iterating global reduction 1 with 28 rules applied. Total rules applied 159 place count 278 transition count 521
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 1 with 14 rules applied. Total rules applied 173 place count 278 transition count 507
Applied a total of 173 rules in 9 ms. Remains 278 /409 variables (removed 131) and now considering 507/577 (removed 70) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 278/409 places, 507/577 transitions.
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 9 ms
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 8 ms
[2023-03-08 07:13:48] [INFO ] Input system was already deterministic with 507 transitions.
Starting structural reductions in LTL mode, iteration 0 : 409/409 places, 577/577 transitions.
Reduce places removed 102 places and 0 transitions.
Iterating post reduction 0 with 102 rules applied. Total rules applied 102 place count 307 transition count 577
Discarding 27 places :
Symmetric choice reduction at 1 with 27 rule applications. Total rules 129 place count 280 transition count 523
Iterating global reduction 1 with 27 rules applied. Total rules applied 156 place count 280 transition count 523
Ensure Unique test removed 13 transitions
Reduce isomorphic transitions removed 13 transitions.
Iterating post reduction 1 with 13 rules applied. Total rules applied 169 place count 280 transition count 510
Applied a total of 169 rules in 9 ms. Remains 280 /409 variables (removed 129) and now considering 510/577 (removed 67) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 280/409 places, 510/577 transitions.
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 9 ms
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 9 ms
[2023-03-08 07:13:48] [INFO ] Input system was already deterministic with 510 transitions.
Starting structural reductions in LTL mode, iteration 0 : 409/409 places, 577/577 transitions.
Reduce places removed 105 places and 0 transitions.
Iterating post reduction 0 with 105 rules applied. Total rules applied 105 place count 304 transition count 577
Discarding 26 places :
Symmetric choice reduction at 1 with 26 rule applications. Total rules 131 place count 278 transition count 525
Iterating global reduction 1 with 26 rules applied. Total rules applied 157 place count 278 transition count 525
Ensure Unique test removed 13 transitions
Reduce isomorphic transitions removed 13 transitions.
Iterating post reduction 1 with 13 rules applied. Total rules applied 170 place count 278 transition count 512
Applied a total of 170 rules in 8 ms. Remains 278 /409 variables (removed 131) and now considering 512/577 (removed 65) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 278/409 places, 512/577 transitions.
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 8 ms
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 8 ms
[2023-03-08 07:13:48] [INFO ] Input system was already deterministic with 512 transitions.
Starting structural reductions in LTL mode, iteration 0 : 409/409 places, 577/577 transitions.
Reduce places removed 110 places and 0 transitions.
Iterating post reduction 0 with 110 rules applied. Total rules applied 110 place count 299 transition count 577
Discarding 29 places :
Symmetric choice reduction at 1 with 29 rule applications. Total rules 139 place count 270 transition count 519
Iterating global reduction 1 with 29 rules applied. Total rules applied 168 place count 270 transition count 519
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 1 with 14 rules applied. Total rules applied 182 place count 270 transition count 505
Applied a total of 182 rules in 6 ms. Remains 270 /409 variables (removed 139) and now considering 505/577 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 270/409 places, 505/577 transitions.
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 8 ms
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 7 ms
[2023-03-08 07:13:48] [INFO ] Input system was already deterministic with 505 transitions.
Starting structural reductions in LTL mode, iteration 0 : 409/409 places, 577/577 transitions.
Reduce places removed 102 places and 0 transitions.
Iterating post reduction 0 with 102 rules applied. Total rules applied 102 place count 307 transition count 577
Discarding 27 places :
Symmetric choice reduction at 1 with 27 rule applications. Total rules 129 place count 280 transition count 523
Iterating global reduction 1 with 27 rules applied. Total rules applied 156 place count 280 transition count 523
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 1 with 14 rules applied. Total rules applied 170 place count 280 transition count 509
Applied a total of 170 rules in 7 ms. Remains 280 /409 variables (removed 129) and now considering 509/577 (removed 68) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 280/409 places, 509/577 transitions.
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 8 ms
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 8 ms
[2023-03-08 07:13:48] [INFO ] Input system was already deterministic with 509 transitions.
Starting structural reductions in LTL mode, iteration 0 : 409/409 places, 577/577 transitions.
Reduce places removed 110 places and 0 transitions.
Iterating post reduction 0 with 110 rules applied. Total rules applied 110 place count 299 transition count 577
Discarding 29 places :
Symmetric choice reduction at 1 with 29 rule applications. Total rules 139 place count 270 transition count 519
Iterating global reduction 1 with 29 rules applied. Total rules applied 168 place count 270 transition count 519
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 1 with 14 rules applied. Total rules applied 182 place count 270 transition count 505
Applied a total of 182 rules in 7 ms. Remains 270 /409 variables (removed 139) and now considering 505/577 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 270/409 places, 505/577 transitions.
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 13 ms
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 8 ms
[2023-03-08 07:13:48] [INFO ] Input system was already deterministic with 505 transitions.
Starting structural reductions in LTL mode, iteration 0 : 409/409 places, 577/577 transitions.
Reduce places removed 101 places and 0 transitions.
Iterating post reduction 0 with 101 rules applied. Total rules applied 101 place count 308 transition count 577
Discarding 26 places :
Symmetric choice reduction at 1 with 26 rule applications. Total rules 127 place count 282 transition count 525
Iterating global reduction 1 with 26 rules applied. Total rules applied 153 place count 282 transition count 525
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 12 transitions.
Iterating post reduction 1 with 12 rules applied. Total rules applied 165 place count 282 transition count 513
Applied a total of 165 rules in 8 ms. Remains 282 /409 variables (removed 127) and now considering 513/577 (removed 64) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 282/409 places, 513/577 transitions.
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 7 ms
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 7 ms
[2023-03-08 07:13:48] [INFO ] Input system was already deterministic with 513 transitions.
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 11 ms
[2023-03-08 07:13:48] [INFO ] Flatten gal took : 12 ms
[2023-03-08 07:13:48] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-08 07:13:48] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 409 places, 577 transitions and 1314 arcs took 2 ms.
Total runtime 6331 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT DLCflexbar-PT-4a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA DLCflexbar-PT-4a-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-4a-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-4a-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-4a-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-4a-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-4a-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678260692300

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 60 (type SKEL/SRCH) for 3 DLCflexbar-PT-4a-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 60 (type SKEL/SRCH) for DLCflexbar-PT-4a-CTLFireability-01
lola: result : true
lola: markings : 47
lola: fired transitions : 121
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 14 (type EXCL) for 13 DLCflexbar-PT-4a-CTLFireability-03
lola: time limit : 119 sec
lola: memory limit: 32 pages
lola: FINISHED task # 14 (type EXCL) for DLCflexbar-PT-4a-CTLFireability-03
lola: result : false
lola: markings : 2
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 9 (type EXCL) for 6 DLCflexbar-PT-4a-CTLFireability-02
lola: time limit : 124 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 9 (type EXCL) for DLCflexbar-PT-4a-CTLFireability-02
lola: result : false
lola: markings : 2
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 36 (type EXCL) for 35 DLCflexbar-PT-4a-CTLFireability-09
lola: time limit : 128 sec
lola: memory limit: 32 pages
lola: FINISHED task # 36 (type EXCL) for DLCflexbar-PT-4a-CTLFireability-09
lola: result : true
lola: markings : 2
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 38 DLCflexbar-PT-4a-CTLFireability-10
lola: time limit : 138 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCflexbar-PT-4a-CTLFireability-03: CTL false CTL model checker
DLCflexbar-PT-4a-CTLFireability-09: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCflexbar-PT-4a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-4a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-4a-CTLFireability-02: DISJ 0 1 0 0 3 0 0 0
DLCflexbar-PT-4a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-4a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-4a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-4a-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-4a-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
DLCflexbar-PT-4a-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
DLCflexbar-PT-4a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-4a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
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39 CTL EXCL 5/224 1/32 DLCflexbar-PT-4a-CTLFireability-10 79019 m, 15803 m/sec, 2616671 t fired, .

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39 CTL EXCL 10/224 1/32 DLCflexbar-PT-4a-CTLFireability-10 161841 m, 16564 m/sec, 5314385 t fired, .

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39 CTL EXCL 15/224 2/32 DLCflexbar-PT-4a-CTLFireability-10 244958 m, 16623 m/sec, 8003620 t fired, .

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39 CTL EXCL 20/224 2/32 DLCflexbar-PT-4a-CTLFireability-10 327904 m, 16589 m/sec, 10660195 t fired, .

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39 CTL EXCL 25/224 2/32 DLCflexbar-PT-4a-CTLFireability-10 409241 m, 16267 m/sec, 13326408 t fired, .

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39 CTL EXCL 30/224 3/32 DLCflexbar-PT-4a-CTLFireability-10 491128 m, 16377 m/sec, 15956968 t fired, .

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39 CTL EXCL 35/224 3/32 DLCflexbar-PT-4a-CTLFireability-10 572909 m, 16356 m/sec, 18600048 t fired, .

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39 CTL EXCL 40/224 3/32 DLCflexbar-PT-4a-CTLFireability-10 654043 m, 16226 m/sec, 21258873 t fired, .

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39 CTL EXCL 45/224 4/32 DLCflexbar-PT-4a-CTLFireability-10 731121 m, 15415 m/sec, 23859119 t fired, .

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39 CTL EXCL 50/224 4/32 DLCflexbar-PT-4a-CTLFireability-10 806971 m, 15170 m/sec, 26474184 t fired, .

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39 CTL EXCL 55/224 4/32 DLCflexbar-PT-4a-CTLFireability-10 883141 m, 15234 m/sec, 29088274 t fired, .

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39 CTL EXCL 60/224 5/32 DLCflexbar-PT-4a-CTLFireability-10 958349 m, 15041 m/sec, 31698932 t fired, .

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39 CTL EXCL 65/224 5/32 DLCflexbar-PT-4a-CTLFireability-10 1036053 m, 15540 m/sec, 34314738 t fired, .

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39 CTL EXCL 70/224 5/32 DLCflexbar-PT-4a-CTLFireability-10 1111103 m, 15010 m/sec, 36926050 t fired, .

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39 CTL EXCL 75/224 5/32 DLCflexbar-PT-4a-CTLFireability-10 1184666 m, 14712 m/sec, 39509953 t fired, .

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39 CTL EXCL 80/224 6/32 DLCflexbar-PT-4a-CTLFireability-10 1258102 m, 14687 m/sec, 42079756 t fired, .

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39 CTL EXCL 85/224 6/32 DLCflexbar-PT-4a-CTLFireability-10 1333128 m, 15005 m/sec, 44670669 t fired, .

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39 CTL EXCL 90/224 6/32 DLCflexbar-PT-4a-CTLFireability-10 1407180 m, 14810 m/sec, 47253040 t fired, .

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39 CTL EXCL 95/224 7/32 DLCflexbar-PT-4a-CTLFireability-10 1482866 m, 15137 m/sec, 49837494 t fired, .

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39 CTL EXCL 100/224 7/32 DLCflexbar-PT-4a-CTLFireability-10 1556666 m, 14760 m/sec, 52414560 t fired, .

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39 CTL EXCL 105/224 7/32 DLCflexbar-PT-4a-CTLFireability-10 1632510 m, 15168 m/sec, 55010080 t fired, .

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39 CTL EXCL 110/224 8/32 DLCflexbar-PT-4a-CTLFireability-10 1710499 m, 15597 m/sec, 57634057 t fired, .

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39 CTL EXCL 115/224 8/32 DLCflexbar-PT-4a-CTLFireability-10 1792919 m, 16484 m/sec, 60289343 t fired, .

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39 CTL EXCL 120/224 8/32 DLCflexbar-PT-4a-CTLFireability-10 1873326 m, 16081 m/sec, 62913777 t fired, .

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39 CTL EXCL 125/224 9/32 DLCflexbar-PT-4a-CTLFireability-10 1954699 m, 16274 m/sec, 65560189 t fired, .

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39 CTL EXCL 130/224 9/32 DLCflexbar-PT-4a-CTLFireability-10 2037124 m, 16485 m/sec, 68181224 t fired, .

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39 CTL EXCL 135/224 9/32 DLCflexbar-PT-4a-CTLFireability-10 2120992 m, 16773 m/sec, 70810592 t fired, .

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39 CTL EXCL 140/224 10/32 DLCflexbar-PT-4a-CTLFireability-10 2202600 m, 16321 m/sec, 73411001 t fired, .

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39 CTL EXCL 145/224 10/32 DLCflexbar-PT-4a-CTLFireability-10 2285554 m, 16590 m/sec, 76052083 t fired, .

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39 CTL EXCL 150/224 10/32 DLCflexbar-PT-4a-CTLFireability-10 2368872 m, 16663 m/sec, 78707018 t fired, .

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39 CTL EXCL 155/224 11/32 DLCflexbar-PT-4a-CTLFireability-10 2445528 m, 15331 m/sec, 81309434 t fired, .

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39 CTL EXCL 160/224 11/32 DLCflexbar-PT-4a-CTLFireability-10 2522257 m, 15345 m/sec, 83915466 t fired, .

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39 CTL EXCL 170/224 12/32 DLCflexbar-PT-4a-CTLFireability-10 2676846 m, 15659 m/sec, 89064349 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 CTL EXCL 210/224 14/32 DLCflexbar-PT-4a-CTLFireability-10 3319873 m, 16641 m/sec, 109871560 t fired, .

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39 CTL EXCL 215/224 15/32 DLCflexbar-PT-4a-CTLFireability-10 3398712 m, 15767 m/sec, 112448810 t fired, .

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39 CTL EXCL 220/224 15/32 DLCflexbar-PT-4a-CTLFireability-10 3478577 m, 15973 m/sec, 115037937 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 CTL EXCL 5/224 1/5 DLCflexbar-PT-4a-CTLFireability-10 84192 m, -678877 m/sec, 2792678 t fired, .

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39 CTL EXCL 10/224 1/5 DLCflexbar-PT-4a-CTLFireability-10 169033 m, 16968 m/sec, 5541478 t fired, .

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39 CTL EXCL 15/224 2/5 DLCflexbar-PT-4a-CTLFireability-10 252532 m, 16699 m/sec, 8238100 t fired, .

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39 CTL EXCL 20/224 2/5 DLCflexbar-PT-4a-CTLFireability-10 335065 m, 16506 m/sec, 10902530 t fired, .

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39 CTL EXCL 25/224 2/5 DLCflexbar-PT-4a-CTLFireability-10 417580 m, 16503 m/sec, 13590232 t fired, .

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39 CTL EXCL 30/224 3/5 DLCflexbar-PT-4a-CTLFireability-10 500379 m, 16559 m/sec, 16255651 t fired, .

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39 CTL EXCL 35/224 3/5 DLCflexbar-PT-4a-CTLFireability-10 584021 m, 16728 m/sec, 18956429 t fired, .

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39 CTL EXCL 40/224 3/5 DLCflexbar-PT-4a-CTLFireability-10 665305 m, 16256 m/sec, 21630733 t fired, .

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39 CTL EXCL 45/224 4/5 DLCflexbar-PT-4a-CTLFireability-10 743889 m, 15716 m/sec, 24295322 t fired, .

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39 CTL EXCL 50/224 4/5 DLCflexbar-PT-4a-CTLFireability-10 820746 m, 15371 m/sec, 26942772 t fired, .

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DLCflexbar-PT-4a-CTLFireability-13: CONJ 0 2 0 0 2 0 0 0
DLCflexbar-PT-4a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 CTL EXCL 55/224 4/5 DLCflexbar-PT-4a-CTLFireability-10 897469 m, 15344 m/sec, 29579274 t fired, .

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DLCflexbar-PT-4a-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 CTL EXCL 60/224 5/5 DLCflexbar-PT-4a-CTLFireability-10 972194 m, 14945 m/sec, 32171438 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 CTL EXCL 65/224 5/5 DLCflexbar-PT-4a-CTLFireability-10 1049091 m, 15379 m/sec, 34768966 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 CTL EXCL 70/224 5/5 DLCflexbar-PT-4a-CTLFireability-10 1123082 m, 14798 m/sec, 37345627 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 5/253 1/32 DLCflexbar-PT-4a-CTLFireability-13 95742 m, 19148 m/sec, 3089507 t fired, .

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52 CTL EXCL 10/253 1/32 DLCflexbar-PT-4a-CTLFireability-13 192615 m, 19374 m/sec, 6120713 t fired, .

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52 CTL EXCL 15/253 2/32 DLCflexbar-PT-4a-CTLFireability-13 289690 m, 19415 m/sec, 9123132 t fired, .

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52 CTL EXCL 20/253 2/32 DLCflexbar-PT-4a-CTLFireability-13 382740 m, 18610 m/sec, 12095337 t fired, .

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52 CTL EXCL 25/253 3/32 DLCflexbar-PT-4a-CTLFireability-13 479481 m, 19348 m/sec, 15097245 t fired, .

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52 CTL EXCL 30/253 3/32 DLCflexbar-PT-4a-CTLFireability-13 574257 m, 18955 m/sec, 18068675 t fired, .

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52 CTL EXCL 35/253 3/32 DLCflexbar-PT-4a-CTLFireability-13 668117 m, 18772 m/sec, 21056356 t fired, .

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52 CTL EXCL 40/253 4/32 DLCflexbar-PT-4a-CTLFireability-13 757143 m, 17805 m/sec, 23997663 t fired, .

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52 CTL EXCL 45/253 4/32 DLCflexbar-PT-4a-CTLFireability-13 845103 m, 17592 m/sec, 26938729 t fired, .

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52 CTL EXCL 50/253 4/32 DLCflexbar-PT-4a-CTLFireability-13 932904 m, 17560 m/sec, 29879375 t fired, .

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52 CTL EXCL 55/253 5/32 DLCflexbar-PT-4a-CTLFireability-13 1022216 m, 17862 m/sec, 32826069 t fired, .

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52 CTL EXCL 60/253 5/32 DLCflexbar-PT-4a-CTLFireability-13 1109148 m, 17386 m/sec, 35747737 t fired, .

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52 CTL EXCL 65/253 6/32 DLCflexbar-PT-4a-CTLFireability-13 1193886 m, 16947 m/sec, 38635260 t fired, .

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52 CTL EXCL 70/253 6/32 DLCflexbar-PT-4a-CTLFireability-13 1277601 m, 16743 m/sec, 41487877 t fired, .

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52 CTL EXCL 75/253 6/32 DLCflexbar-PT-4a-CTLFireability-13 1363349 m, 17149 m/sec, 44355061 t fired, .

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52 CTL EXCL 80/253 7/32 DLCflexbar-PT-4a-CTLFireability-13 1449850 m, 17300 m/sec, 47239854 t fired, .

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52 CTL EXCL 85/253 7/32 DLCflexbar-PT-4a-CTLFireability-13 1533708 m, 16771 m/sec, 50071710 t fired, .

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52 CTL EXCL 90/253 7/32 DLCflexbar-PT-4a-CTLFireability-13 1617156 m, 16689 m/sec, 52874270 t fired, .

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52 CTL EXCL 95/253 8/32 DLCflexbar-PT-4a-CTLFireability-13 1705061 m, 17581 m/sec, 55751102 t fired, .

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52 CTL EXCL 100/253 8/32 DLCflexbar-PT-4a-CTLFireability-13 1799588 m, 18905 m/sec, 58696916 t fired, .

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52 CTL EXCL 105/253 8/32 DLCflexbar-PT-4a-CTLFireability-13 1891083 m, 18299 m/sec, 61591242 t fired, .

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52 CTL EXCL 110/253 9/32 DLCflexbar-PT-4a-CTLFireability-13 1984641 m, 18711 m/sec, 64517377 t fired, .

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52 CTL EXCL 115/253 9/32 DLCflexbar-PT-4a-CTLFireability-13 2078606 m, 18793 m/sec, 67418810 t fired, .

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52 CTL EXCL 120/253 10/32 DLCflexbar-PT-4a-CTLFireability-13 2177194 m, 19717 m/sec, 70406242 t fired, .

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52 CTL EXCL 125/253 10/32 DLCflexbar-PT-4a-CTLFireability-13 2272458 m, 19052 m/sec, 73363800 t fired, .

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52 CTL EXCL 130/253 10/32 DLCflexbar-PT-4a-CTLFireability-13 2368454 m, 19199 m/sec, 76324644 t fired, .

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52 CTL EXCL 135/253 11/32 DLCflexbar-PT-4a-CTLFireability-13 2456653 m, 17639 m/sec, 79230771 t fired, .

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52 CTL EXCL 140/253 11/32 DLCflexbar-PT-4a-CTLFireability-13 2545132 m, 17695 m/sec, 82132654 t fired, .

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52 CTL EXCL 145/253 12/32 DLCflexbar-PT-4a-CTLFireability-13 2634295 m, 17832 m/sec, 85019077 t fired, .

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52 CTL EXCL 150/253 12/32 DLCflexbar-PT-4a-CTLFireability-13 2722230 m, 17587 m/sec, 87894994 t fired, .

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52 CTL EXCL 155/253 12/32 DLCflexbar-PT-4a-CTLFireability-13 2809372 m, 17428 m/sec, 90762817 t fired, .

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52 CTL EXCL 160/253 13/32 DLCflexbar-PT-4a-CTLFireability-13 2905353 m, 19196 m/sec, 93758069 t fired, .

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52 CTL EXCL 165/253 13/32 DLCflexbar-PT-4a-CTLFireability-13 3003686 m, 19666 m/sec, 96800503 t fired, .

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52 CTL EXCL 170/253 14/32 DLCflexbar-PT-4a-CTLFireability-13 3101173 m, 19497 m/sec, 99836801 t fired, .

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52 CTL EXCL 175/253 14/32 DLCflexbar-PT-4a-CTLFireability-13 3201063 m, 19978 m/sec, 102864920 t fired, .

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52 CTL EXCL 180/253 14/32 DLCflexbar-PT-4a-CTLFireability-13 3297157 m, 19218 m/sec, 105850031 t fired, .

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DLCflexbar-PT-4a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
DLCflexbar-PT-4a-CTLFireability-13: CONJ 0 1 1 0 2 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 185/253 15/32 DLCflexbar-PT-4a-CTLFireability-13 3391890 m, 18946 m/sec, 108827943 t fired, .

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52 CTL EXCL 190/253 15/32 DLCflexbar-PT-4a-CTLFireability-13 3485323 m, 18686 m/sec, 111761550 t fired, .

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52 CTL EXCL 195/253 16/32 DLCflexbar-PT-4a-CTLFireability-13 3577943 m, 18524 m/sec, 114663576 t fired, .

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52 CTL EXCL 200/253 16/32 DLCflexbar-PT-4a-CTLFireability-13 3666705 m, 17752 m/sec, 117538376 t fired, .

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52 CTL EXCL 205/253 16/32 DLCflexbar-PT-4a-CTLFireability-13 3754224 m, 17503 m/sec, 120399458 t fired, .

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52 CTL EXCL 210/253 17/32 DLCflexbar-PT-4a-CTLFireability-13 3843466 m, 17848 m/sec, 123271606 t fired, .

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52 CTL EXCL 215/253 17/32 DLCflexbar-PT-4a-CTLFireability-13 3929745 m, 17255 m/sec, 126163448 t fired, .

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52 CTL EXCL 220/253 17/32 DLCflexbar-PT-4a-CTLFireability-13 4014780 m, 17007 m/sec, 129023029 t fired, .

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52 CTL EXCL 225/253 18/32 DLCflexbar-PT-4a-CTLFireability-13 4095802 m, 16204 m/sec, 131811165 t fired, .

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52 CTL EXCL 230/253 18/32 DLCflexbar-PT-4a-CTLFireability-13 4179887 m, 16817 m/sec, 134647393 t fired, .

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52 CTL EXCL 235/253 18/32 DLCflexbar-PT-4a-CTLFireability-13 4282023 m, 20427 m/sec, 137663944 t fired, .

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52 CTL EXCL 240/253 19/32 DLCflexbar-PT-4a-CTLFireability-13 4378988 m, 19393 m/sec, 140646783 t fired, .

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52 CTL EXCL 245/253 19/32 DLCflexbar-PT-4a-CTLFireability-13 4480069 m, 20216 m/sec, 143635861 t fired, .

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52 CTL EXCL 250/253 20/32 DLCflexbar-PT-4a-CTLFireability-13 4576648 m, 19315 m/sec, 146587595 t fired, .

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lola: FINISHED task # 50 (type EXCL) for DLCflexbar-PT-4a-CTLFireability-13
lola: result : true
lola: markings : 37
lola: fired transitions : 98
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 5/253 1/5 DLCflexbar-PT-4a-CTLFireability-13 96414 m, -896046 m/sec, 3110100 t fired, .

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52 CTL EXCL 10/253 1/5 DLCflexbar-PT-4a-CTLFireability-13 194477 m, 19612 m/sec, 6179400 t fired, .

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52 CTL EXCL 15/253 2/5 DLCflexbar-PT-4a-CTLFireability-13 293158 m, 19736 m/sec, 9230200 t fired, .

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52 CTL EXCL 20/253 2/5 DLCflexbar-PT-4a-CTLFireability-13 387889 m, 18946 m/sec, 12253063 t fired, .

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52 CTL EXCL 25/253 3/5 DLCflexbar-PT-4a-CTLFireability-13 485979 m, 19618 m/sec, 15306846 t fired, .

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52 CTL EXCL 30/253 3/5 DLCflexbar-PT-4a-CTLFireability-13 582380 m, 19280 m/sec, 18319822 t fired, .

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52 CTL EXCL 35/253 3/5 DLCflexbar-PT-4a-CTLFireability-13 677191 m, 18962 m/sec, 21356386 t fired, .

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52 CTL EXCL 40/253 4/5 DLCflexbar-PT-4a-CTLFireability-13 767776 m, 18117 m/sec, 24355034 t fired, .

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52 CTL EXCL 45/253 4/5 DLCflexbar-PT-4a-CTLFireability-13 856999 m, 17844 m/sec, 27328038 t fired, .

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52 CTL EXCL 50/253 4/5 DLCflexbar-PT-4a-CTLFireability-13 944990 m, 17598 m/sec, 30289622 t fired, .

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52 CTL EXCL 55/253 5/5 DLCflexbar-PT-4a-CTLFireability-13 1035713 m, 18144 m/sec, 33267416 t fired, .

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52 CTL EXCL 60/253 5/5 DLCflexbar-PT-4a-CTLFireability-13 1122542 m, 17365 m/sec, 36203656 t fired, .

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33 CTL EXCL 5/330 1/32 DLCflexbar-PT-4a-CTLFireability-08 97594 m, 19518 m/sec, 3146418 t fired, .

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33 CTL EXCL 10/330 1/32 DLCflexbar-PT-4a-CTLFireability-08 195922 m, 19665 m/sec, 6224655 t fired, .

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33 CTL EXCL 15/330 2/32 DLCflexbar-PT-4a-CTLFireability-08 294352 m, 19686 m/sec, 9266567 t fired, .

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33 CTL EXCL 20/330 2/32 DLCflexbar-PT-4a-CTLFireability-08 389256 m, 18980 m/sec, 12293835 t fired, .

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33 CTL EXCL 25/330 3/32 DLCflexbar-PT-4a-CTLFireability-08 487474 m, 19643 m/sec, 15352520 t fired, .

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33 CTL EXCL 30/330 3/32 DLCflexbar-PT-4a-CTLFireability-08 583800 m, 19265 m/sec, 18365356 t fired, .

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33 CTL EXCL 35/330 3/32 DLCflexbar-PT-4a-CTLFireability-08 678794 m, 18998 m/sec, 21407911 t fired, .

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33 CTL EXCL 40/330 4/32 DLCflexbar-PT-4a-CTLFireability-08 769644 m, 18170 m/sec, 24415869 t fired, .

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33 CTL EXCL 45/330 4/32 DLCflexbar-PT-4a-CTLFireability-08 859115 m, 17894 m/sec, 27397471 t fired, .

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33 CTL EXCL 50/330 4/32 DLCflexbar-PT-4a-CTLFireability-08 946810 m, 17539 m/sec, 30351072 t fired, .

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33 CTL EXCL 55/330 5/32 DLCflexbar-PT-4a-CTLFireability-08 1037057 m, 18049 m/sec, 33311845 t fired, .

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33 CTL EXCL 60/330 5/32 DLCflexbar-PT-4a-CTLFireability-08 1123724 m, 17333 m/sec, 36244753 t fired, .

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33 CTL EXCL 65/330 6/32 DLCflexbar-PT-4a-CTLFireability-08 1209620 m, 17179 m/sec, 39172612 t fired, .

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33 CTL EXCL 70/330 6/32 DLCflexbar-PT-4a-CTLFireability-08 1295491 m, 17174 m/sec, 42081622 t fired, .

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33 CTL EXCL 75/330 6/32 DLCflexbar-PT-4a-CTLFireability-08 1381741 m, 17250 m/sec, 44981853 t fired, .

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33 CTL EXCL 80/330 7/32 DLCflexbar-PT-4a-CTLFireability-08 1470410 m, 17733 m/sec, 47930140 t fired, .

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33 CTL EXCL 85/330 7/32 DLCflexbar-PT-4a-CTLFireability-08 1556156 m, 17149 m/sec, 50840268 t fired, .

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33 CTL EXCL 90/330 7/32 DLCflexbar-PT-4a-CTLFireability-08 1643898 m, 17548 m/sec, 53768012 t fired, .

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33 CTL EXCL 95/330 8/32 DLCflexbar-PT-4a-CTLFireability-08 1738379 m, 18896 m/sec, 56794664 t fired, .

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33 CTL EXCL 100/330 8/32 DLCflexbar-PT-4a-CTLFireability-08 1835778 m, 19479 m/sec, 59822441 t fired, .

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33 CTL EXCL 105/330 9/32 DLCflexbar-PT-4a-CTLFireability-08 1930777 m, 18999 m/sec, 62841027 t fired, .

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33 CTL EXCL 110/330 9/32 DLCflexbar-PT-4a-CTLFireability-08 2026521 m, 19148 m/sec, 65803333 t fired, .

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33 CTL EXCL 115/330 9/32 DLCflexbar-PT-4a-CTLFireability-08 2125379 m, 19771 m/sec, 68821159 t fired, .

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33 CTL EXCL 120/330 10/32 DLCflexbar-PT-4a-CTLFireability-08 2221861 m, 19296 m/sec, 71820185 t fired, .

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33 CTL EXCL 130/330 11/32 DLCflexbar-PT-4a-CTLFireability-08 2413198 m, 18504 m/sec, 77792735 t fired, .

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33 CTL EXCL 205/330 16/32 DLCflexbar-PT-4a-CTLFireability-08 3807667 m, 17978 m/sec, 122127924 t fired, .

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33 CTL EXCL 210/330 17/32 DLCflexbar-PT-4a-CTLFireability-08 3896535 m, 17773 m/sec, 125066634 t fired, .

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33 CTL EXCL 215/330 17/32 DLCflexbar-PT-4a-CTLFireability-08 3985269 m, 17746 m/sec, 128012483 t fired, .

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33 CTL EXCL 230/330 18/32 DLCflexbar-PT-4a-CTLFireability-08 4254957 m, 20019 m/sec, 136849705 t fired, .

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33 CTL EXCL 240/330 19/32 DLCflexbar-PT-4a-CTLFireability-08 4455721 m, 20203 m/sec, 142915054 t fired, .

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33 CTL EXCL 280/330 22/32 DLCflexbar-PT-4a-CTLFireability-08 5212167 m, 17866 m/sec, 166381618 t fired, .

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33 CTL EXCL 5/2643 1/5 DLCflexbar-PT-4a-CTLFireability-08 96419 m, -1219118 m/sec, 3110302 t fired, .

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31 CTL EXCL 10/330 1/32 DLCflexbar-PT-4a-CTLFireability-08 14493 m, 1432 m/sec, 453214 t fired, .
33 CTL EXCL 10/293 1/5 DLCflexbar-PT-4a-CTLFireability-08 193692 m, 19454 m/sec, 6154547 t fired, .

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31 CTL EXCL 15/330 1/32 DLCflexbar-PT-4a-CTLFireability-08 21267 m, 1354 m/sec, 669339 t fired, .
33 CTL EXCL 15/293 2/5 DLCflexbar-PT-4a-CTLFireability-08 291229 m, 19507 m/sec, 9170486 t fired, .

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31 CTL EXCL 25/330 1/32 DLCflexbar-PT-4a-CTLFireability-08 32163 m, 1209 m/sec, 1015998 t fired, .
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31 CTL EXCL 42/330 1/32 DLCflexbar-PT-4a-CTLFireability-08 46244 m, 1153 m/sec, 1464405 t fired, .
33 CTL EXCL 42/293 3/5 DLCflexbar-PT-4a-CTLFireability-08 636517 m, 15676 m/sec, 20050346 t fired, .

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31 CTL EXCL 53/330 1/32 DLCflexbar-PT-4a-CTLFireability-08 56691 m, 1137 m/sec, 1803431 t fired, .
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31 CTL EXCL 58/330 1/32 DLCflexbar-PT-4a-CTLFireability-08 62032 m, 1068 m/sec, 1980498 t fired, .
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DLCflexbar-PT-4a-CTLFireability-14: CTL true CTL model checker
DLCflexbar-PT-4a-CTLFireability-15: CTL false CTL model checker

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DLCflexbar-PT-4a-CTLFireability-08: DISJ 0 0 2 0 2 0 0 0
DLCflexbar-PT-4a-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
DLCflexbar-PT-4a-CTLFireability-13: CONJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 78/330 1/32 DLCflexbar-PT-4a-CTLFireability-08 80117 m, 866 m/sec, 2572815 t fired, .
33 CTL EXCL 78/293 5/5 DLCflexbar-PT-4a-CTLFireability-08 1075316 m, 11201 m/sec, 34606529 t fired, .

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DLCflexbar-PT-4a-CTLFireability-11: CTL true CTL model checker
DLCflexbar-PT-4a-CTLFireability-12: CTL true CTL model checker
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DLCflexbar-PT-4a-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
DLCflexbar-PT-4a-CTLFireability-13: CONJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 83/330 1/32 DLCflexbar-PT-4a-CTLFireability-08 83791 m, 734 m/sec, 2695008 t fired, .
33 CTL EXCL 83/293 5/5 DLCflexbar-PT-4a-CTLFireability-08 1123454 m, 9627 m/sec, 36235134 t fired, .

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DLCflexbar-PT-4a-CTLFireability-12: CTL true CTL model checker
DLCflexbar-PT-4a-CTLFireability-14: CTL true CTL model checker
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DLCflexbar-PT-4a-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
DLCflexbar-PT-4a-CTLFireability-13: CONJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 88/330 1/32 DLCflexbar-PT-4a-CTLFireability-08 88798 m, 1001 m/sec, 2861177 t fired, .
33 CTL EXCL 88/293 5/5 DLCflexbar-PT-4a-CTLFireability-08 1185252 m, 12359 m/sec, 38345344 t fired, .

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DLCflexbar-PT-4a-CTLFireability-12: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 93/330 1/32 DLCflexbar-PT-4a-CTLFireability-08 93827 m, 1005 m/sec, 3027969 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 98/330 1/32 DLCflexbar-PT-4a-CTLFireability-08 99199 m, 1074 m/sec, 3194926 t fired, .

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31 CTL EXCL 103/330 1/32 DLCflexbar-PT-4a-CTLFireability-08 102694 m, 699 m/sec, 3303121 t fired, .

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/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 465 Killed lola --conf=$BIN_DIR/configfiles/ctlfireabilityconf --formula=$DIR/CTLFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-4a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is DLCflexbar-PT-4a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r103-tall-167814478400538"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-4a.tgz
mv DLCflexbar-PT-4a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;