About the Execution of LoLA for DLCround-PT-10b
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16226.052 | 668142.00 | 690162.00 | 10831.60 | ??????FFTF??TFT? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r102-tall-167814477300738.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is DLCround-PT-10b, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r102-tall-167814477300738
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.9M
-rw-r--r-- 1 mcc users 5.4K Feb 25 18:52 CTLCardinality.txt
-rw-r--r-- 1 mcc users 52K Feb 25 18:52 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 25 18:52 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Feb 25 18:52 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 15:53 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 25 15:53 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:53 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 15:53 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.9K Feb 25 18:53 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 103K Feb 25 18:53 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.3K Feb 25 18:53 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 80K Feb 25 18:53 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 1.5M Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-10b-CTLFireability-00
FORMULA_NAME DLCround-PT-10b-CTLFireability-01
FORMULA_NAME DLCround-PT-10b-CTLFireability-02
FORMULA_NAME DLCround-PT-10b-CTLFireability-03
FORMULA_NAME DLCround-PT-10b-CTLFireability-04
FORMULA_NAME DLCround-PT-10b-CTLFireability-05
FORMULA_NAME DLCround-PT-10b-CTLFireability-06
FORMULA_NAME DLCround-PT-10b-CTLFireability-07
FORMULA_NAME DLCround-PT-10b-CTLFireability-08
FORMULA_NAME DLCround-PT-10b-CTLFireability-09
FORMULA_NAME DLCround-PT-10b-CTLFireability-10
FORMULA_NAME DLCround-PT-10b-CTLFireability-11
FORMULA_NAME DLCround-PT-10b-CTLFireability-12
FORMULA_NAME DLCround-PT-10b-CTLFireability-13
FORMULA_NAME DLCround-PT-10b-CTLFireability-14
FORMULA_NAME DLCround-PT-10b-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678322267984
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-10b
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT DLCround-PT-10b
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability
FORMULA DLCround-PT-10b-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-10b-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-10b-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-10b-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-10b-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-10b-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-10b-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678322936126
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-10b-CTLFireability-00: CONJ 0 0 0 0 2 0 0 0
DLCround-PT-10b-CTLFireability-01: AGEF 0 0 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-08: EF 0 0 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-09: AG 0 0 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
DLCround-PT-10b-CTLFireability-12: DISJ 0 0 0 0 0 0 0 0
DLCround-PT-10b-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
DLCround-PT-10b-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
DLCround-PT-10b-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 15 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 3 (type EXCL) for 0 DLCround-PT-10b-CTLFireability-00
lola: time limit : 155 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:746
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 64 (type FNDP) for 31 DLCround-PT-10b-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type EQUN) for 31 DLCround-PT-10b-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SRCH) for 31 DLCround-PT-10b-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 67 (type SRCH) for DLCround-PT-10b-CTLFireability-09
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 58 (type FNDP) for 28 DLCround-PT-10b-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/CTLFireability-65.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 65 (type EQUN) for DLCround-PT-10b-CTLFireability-09
lola: result : true
lola: CANCELED task # 64 (type FNDP) for DLCround-PT-10b-CTLFireability-09 (obsolete)
lola: LAUNCH task # 57 (type FNDP) for 40 DLCround-PT-10b-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type EQUN) for 40 DLCround-PT-10b-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 58 (type FNDP) for DLCround-PT-10b-CTLFireability-08
lola: result : true
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: LAUNCH task # 70 (type SRCH) for 40 DLCround-PT-10b-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 64 (type FNDP) for DLCround-PT-10b-CTLFireability-09
lola: result : true
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: FINISHED task # 70 (type SRCH) for DLCround-PT-10b-CTLFireability-12
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/CTLFireability-68.sara.
lola: FINISHED task # 57 (type FNDP) for DLCround-PT-10b-CTLFireability-12
lola: result : true
lola: fired transitions : 3
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lola: CANCELED task # 68 (type EQUN) for DLCround-PT-10b-CTLFireability-12 (obsolete)
lola: FINISHED task # 68 (type EQUN) for DLCround-PT-10b-CTLFireability-12
lola: result : true
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lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
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lola: rewrite Frontend/Parser/formula_rewrite.k:811
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lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
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lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
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lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-10b-CTLFireability-08: EF true findpath
DLCround-PT-10b-CTLFireability-09: AG false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-10b-CTLFireability-08: EF true findpath
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-10b-CTLFireability-08: EF true findpath
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-10b-CTLFireability-08: EF true findpath
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DLCround-PT-10b-CTLFireability-13: CTL false CTL model checker
DLCround-PT-10b-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-10b-CTLFireability-00: CONJ 0 0 0 0 2 0 2 0
DLCround-PT-10b-CTLFireability-01: AGEF 0 0 1 0 1 0 0 0
DLCround-PT-10b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 AGEF EXCL 79/1012 25/32 DLCround-PT-10b-CTLFireability-01 5190500 m, 64943 m/sec, 8590064 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-10b-CTLFireability-08: EF true findpath
DLCround-PT-10b-CTLFireability-09: AG false state equation
DLCround-PT-10b-CTLFireability-12: DISJ true state space / EG
DLCround-PT-10b-CTLFireability-13: CTL false CTL model checker
DLCround-PT-10b-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-10b-CTLFireability-00: CONJ 0 0 0 0 2 0 2 0
DLCround-PT-10b-CTLFireability-01: AGEF 0 0 1 0 1 0 0 0
DLCround-PT-10b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 AGEF EXCL 84/1012 27/32 DLCround-PT-10b-CTLFireability-01 5514286 m, 64757 m/sec, 9149863 t fired, .
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DLCround-PT-10b-CTLFireability-08: EF true findpath
DLCround-PT-10b-CTLFireability-09: AG false state equation
DLCround-PT-10b-CTLFireability-12: DISJ true state space / EG
DLCround-PT-10b-CTLFireability-13: CTL false CTL model checker
DLCround-PT-10b-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-10b-CTLFireability-00: CONJ 0 0 0 0 2 0 2 0
DLCround-PT-10b-CTLFireability-01: AGEF 0 0 1 0 1 0 0 0
DLCround-PT-10b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 AGEF EXCL 89/1012 28/32 DLCround-PT-10b-CTLFireability-01 5900834 m, 77309 m/sec, 9799187 t fired, .
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DLCround-PT-10b-CTLFireability-08: EF true findpath
DLCround-PT-10b-CTLFireability-09: AG false state equation
DLCround-PT-10b-CTLFireability-12: DISJ true state space / EG
DLCround-PT-10b-CTLFireability-13: CTL false CTL model checker
DLCround-PT-10b-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-10b-CTLFireability-00: CONJ 0 0 0 0 2 0 2 0
DLCround-PT-10b-CTLFireability-01: AGEF 0 0 1 0 1 0 0 0
DLCround-PT-10b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 AGEF EXCL 94/1012 30/32 DLCround-PT-10b-CTLFireability-01 6232047 m, 66242 m/sec, 10362549 t fired, .
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DLCround-PT-10b-CTLFireability-08: EF true findpath
DLCround-PT-10b-CTLFireability-09: AG false state equation
DLCround-PT-10b-CTLFireability-12: DISJ true state space / EG
DLCround-PT-10b-CTLFireability-13: CTL false CTL model checker
DLCround-PT-10b-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-10b-CTLFireability-00: CONJ 0 0 0 0 2 0 2 0
DLCround-PT-10b-CTLFireability-01: AGEF 0 0 1 0 1 0 0 0
DLCround-PT-10b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 AGEF EXCL 99/1012 31/32 DLCround-PT-10b-CTLFireability-01 6568507 m, 67292 m/sec, 10940580 t fired, .
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# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 8 (type EXCL) for DLCround-PT-10b-CTLFireability-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-10b-CTLFireability-08: EF true findpath
DLCround-PT-10b-CTLFireability-09: AG false state equation
DLCround-PT-10b-CTLFireability-12: DISJ true state space / EG
DLCround-PT-10b-CTLFireability-13: CTL false CTL model checker
DLCround-PT-10b-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-10b-CTLFireability-00: CONJ 0 0 0 0 2 0 2 0
DLCround-PT-10b-CTLFireability-01: AGEF 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
DLCround-PT-10b-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
DLCround-PT-10b-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 667 secs. Pages in use: 32
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lola: LAUNCH task # 23 (type EXCL) for 22 DLCround-PT-10b-CTLFireability-06
lola: time limit : 1466 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for DLCround-PT-10b-CTLFireability-06
lola: result : false
lola: markings : 21
lola: fired transitions : 84
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 DLCround-PT-10b-CTLFireability-07
lola: time limit : 2933 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for DLCround-PT-10b-CTLFireability-07
lola: result : false
lola: markings : 145
lola: fired transitions : 378
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-10b-CTLFireability-00: CONJ unknown CONJ
DLCround-PT-10b-CTLFireability-01: AGEF unknown AGGR
DLCround-PT-10b-CTLFireability-02: CTL unknown AGGR
DLCround-PT-10b-CTLFireability-03: CTL unknown AGGR
DLCround-PT-10b-CTLFireability-04: CTL unknown AGGR
DLCround-PT-10b-CTLFireability-05: CTL unknown AGGR
DLCround-PT-10b-CTLFireability-06: CTL false CTL model checker
DLCround-PT-10b-CTLFireability-07: CTL false CTL model checker
DLCround-PT-10b-CTLFireability-08: EF true findpath
DLCround-PT-10b-CTLFireability-09: AG false state equation
DLCround-PT-10b-CTLFireability-10: CTL unknown AGGR
DLCround-PT-10b-CTLFireability-11: CTL unknown AGGR
DLCround-PT-10b-CTLFireability-12: DISJ true state space / EG
DLCround-PT-10b-CTLFireability-13: CTL false CTL model checker
DLCround-PT-10b-CTLFireability-14: CTL true CTL model checker
DLCround-PT-10b-CTLFireability-15: CTL unknown AGGR
Time elapsed: 667 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-10b"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is DLCround-PT-10b, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r102-tall-167814477300738"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-10b.tgz
mv DLCround-PT-10b execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;