MCC'2023- Execution of r102-tall-167814477200666

About the Execution of LoLA for DLCround-PT-06a

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
16225.812	415373.00	395939.00	11327.50	???F???????????F	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.
Waiting for the VM to be
..................................
============
Generated by BenchKit 2-5348
Executing tool lola
Input is DLCround-PT-06a,
Time confinement is 3600
Memory confinement is
Number of cores is 4
Run identifier is r102-tall-16
==================================

--------------------
preparation of the directory
/home/mcc/execution
total 796K
-rw-r--r-- 1 mcc users 6.8K
-rw-r--r-- 1 mcc users 72K
-rw-r--r-- 1 mcc users 6.0K
-rw-r--r-- 1 mcc users 57K
-rw-r--r-- 1 mcc users 4.2K
-rw-r--r-- 1 mcc users 6.4K
-rw-r--r-- 1 mcc users 3.6K
-rw-r--r-- 1 mcc users 28K
-rw-r--r-- 1 mcc users 2.2K
-rw-r--r-- 1 mcc users 17K
-rw-r--r-- 1 mcc users 12K
-rw-r--r-- 1 mcc users 127K
-rw-r--r-- 1 mcc users 8.5K
-rw-r--r-- 1 mcc users 73K
-rw-r--r-- 1 mcc users 1.6K
-rw-r--r-- 1 mcc users 3.6K
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users 325K Mar

--------------------
content from stdout:

=== Data for post analysis

The expected result is a
BOOL_VECTOR

here is the order used to
FORMULA_NAME DLCround-PT-06a-CTLFi
FORMULA_NAME DLCround-PT-06a-CTLFi
FORMULA_NAME DLCround-PT-06a-CTLFi
FORMULA_NAME DLCround-PT-06a-CTLFi
FORMULA_NAME DLCround-PT-06a-CTLFi
FORMULA_NAME DLCround-PT-06a-CTLFi
FORMULA_NAME DLCround-PT-06a-CTLFi
FORMULA_NAME DLCround-PT-06a-CTLFi
FORMULA_NAME DLCround-PT-06a-CTLFi
FORMULA_NAME DLCround-PT-06a-CTLFi
FORMULA_NAME DLCround-PT-06a-CTLFi
FORMULA_NAME DLCround-PT-06a-CTLFi
FORMULA_NAME DLCround-PT-06a-CTLFi
FORMULA_NAME DLCround-PT-06a-CTLFi
FORMULA_NAME DLCround-PT-06a-CTLFi
FORMULA_NAME DLCround-PT-06a-CTLFi

=== Now, execution of the

BK_START 1678314834034

bash -c /home/mcc/BenchKit/BenchKit_head.sh
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCround-PT-06a
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT DLCround-PT-06a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/
current directory: /home/mcc/execu
CTLFireability

FORMULA DLCround-PT-06a-CTLFireability-03

FORMULA DLCround-PT-06a-CTLFireability-15

BK_STOP 1678315249407

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file
lola: reading net from
lola: reading pnml
lola: PNML file contains
lola: finished parsing
lola: closed net file /home/mcc/
lola: Reading formula.
lola: Using XML format
lola: reading XML formula
lola: reading formula from
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
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lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: RELEASE
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
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lola: RELEASE
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lola: RELEASE
lola: RELEASE
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lola: RELEASE
lola: RELEASE
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lola: RELEASE
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lola: RELEASE
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lola: RELEASE
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
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lola: rewrite Frontend/Parser/fo
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lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: RELEASE
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Rule S: 0 transitions
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: LAUNCH task # 58
lola: time limit : 32000000
lola: memory limit: 5 pages
lola: LAUNCH task # 59
lola: time limit : 32000000
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: LAUNCH task # 60
lola: time limit : 32000000
lola: memory limit: 5 pages
lola: LAUNCH task # 61
lola: time limit : 32000000
lola: memory limit: 5 pages
lola: FINISHED task # 58
lola: result
lola: fired transitions :
lola: tried executions :
lola: time used :
lola: memory pages used :
lola: CANCELED task # 59
lola: CANCELED task # 60
lola: CANCELED task # 61
lola: FINISHED task # 60
lola: result
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: FINISHED task # 61
lola: result
lola: time used :
lola: memory pages used :
lola: FINISHED task # 59
lola: result
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: LAUNCH task # 63
lola: time limit : 32000000
lola: memory limit: 5 pages
lola: LAUNCH task # 64
lola: time limit : 32000000
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/fo
lola: LAUNCH task # 65
lola: time limit : 32000000
lola: memory limit: 5 pages
lola: LAUNCH task # 66
lola: time limit : 32000000
lola: memory limit: 5 pages
lola: FINISHED task # 65
lola: result
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: CANCELED task # 63
lola: CANCELED task # 64
lola: CANCELED task # 66
lola: Created skeleton
lola: FINISHED task # 63
lola: result
lola: fired transitions :
lola: tried executions :
lola: time used :
lola: memory pages used :
sara: try reading problem
lola: Created skeleton
lola: FINISHED task # 66
lola: result
lola: time used :
lola: memory pages used :
lola: Created skeleton
sara: place or transition

lola: Created skeleton
lola: FINISHED task # 64
lola: result
lola: Created skeleton
lola: Created skeleton
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: LAUNCH task # 7 (type
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: LAUNCH task # 68
lola: time limit : 32000000
lola: memory limit: 5 pages
lola: LAUNCH task # 69
lola: time limit : 32000000
lola: memory limit: 5 pages
lola: LAUNCH task # 71
lola: time limit : 32000000
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: FINISHED task # 71
lola: result
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 72
lola: time limit : 32000000
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: FINISHED task # 68
lola: result
lola: fired transitions :
lola: tried executions :
lola: time used :
lola: memory pages used :
lola: CANCELED task # 69
lola: LAUNCH task # 73
lola: time limit : 32000000
lola: memory limit: 5 pages
lola: LAUNCH task # 75
lola: time limit : 32000000
lola: memory limit: 5 pages
lola: FINISHED task # 69
lola: result
lola: FINISHED task # 75
lola: result
lola: time used :
lola: memory pages used :
lola: FINISHED task # 72
lola: result
lola: fired transitions :
lola: tried executions :
lola: time used :
lola: memory pages used :
lola: CANCELED task # 73
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
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lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
sara: try reading problem
sara: place or transition

lola: FINISHED task # 73
lola: result
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
lola: rewrite Frontend/Parser/fo
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========================================================= examination is CTLFireability seconds 16384 MBytes 7814477200666 =================================== to be used: Feb 25 18:46 CTLCardinality.txt Feb 25 18:46 CTLCardinality.xml Feb 25 18:37 CTLFireability.txt Feb 25 18:37 CTLFireability.xml Jan 29 11:40 GenericPropertiesDefinition.xml Jan 29 11:40 GenericPropertiesVerdict.xml Feb 25 15:52 LTLCardinality.txt Feb 25 15:52 LTLCardinality.xml Feb 25 15:52 LTLFireability.txt Feb 25 15:52 LTLFireability.xml Feb 25 19:03 ReachabilityCardinality.txt Feb 25 19:03 ReachabilityCardinality.xml Feb 25 18:56 ReachabilityFireability.txt Feb 25 18:56 ReachabilityFireability.xml Feb 25 15:52 UpperBounds.txt Feb 25 15:52 UpperBounds.xml 6 Mar 5 18:22 equiv_col 4 Mar 5 18:22 instance 6 Mar 5 18:22 iscolored 5 18:22 model.pnml generated by BenchKit (invocation template) vector of booleans build the result vector(from text file) reability-00 reability-01 reability-02 reability-03 reability-04 reability-05 reability-06 reability-07 reability-08 reability-09 reability-10 reability-11 reability-12 reability-13 reability-14 reability-15 tool begins 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N / bin//../lola/bin/ tion FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT (--pnmlnet) /home/mcc/execution/model.pnml place/transition net execution/model.pnml (--xmlformula) /home/mcc/execution/CTLFireability.xml rmula_rewrite.k:322 rmula_rewrite.k:334 rmula_rewrite.k:296 rmula_rewrite.k:250 rmula_rewrite.k:250 rmula_rewrite.k:325 rmula_rewrite.k:337 rmula_rewrite.k:296 rmula_rewrite.k:322 rmula_rewrite.k:331 rmula_rewrite.k:296 rmula_rewrite.k:253 rmula_rewrite.k:250 rmula_rewrite.k:475 rmula_rewrite.k:250 rmula_rewrite.k:250 rmula_rewrite.k:550 rmula_rewrite.k:550 rmula_rewrite.k:550 rmula_rewrite.k:322 rmula_rewrite.k:337 rmula_rewrite.k:314 rmula_rewrite.k:322 rmula_rewrite.k:334 rmula_rewrite.k:325 rmula_rewrite.k:328 rmula_rewrite.k:296 rmula_rewrite.k:314 rmula_rewrite.k:322 rmula_rewrite.k:334 rmula_rewrite.k:296 rmula_rewrite.k:314 rmula_rewrite.k:322 rmula_rewrite.k:334 rmula_rewrite.k:322 rmula_rewrite.k:328 rmula_rewrite.k:296 rmula_rewrite.k:322 rmula_rewrite.k:334 rmula_rewrite.k:322 rmula_rewrite.k:328 rmula_rewrite.k:296 rmula_rewrite.k:317 rmula_rewrite.k:322 rmula_rewrite.k:328 rmula_rewrite.k:325 rmula_rewrite.k:334 rmula_rewrite.k:296 rmula_rewrite.k:322 rmula_rewrite.k:334 rmula_rewrite.k:322 rmula_rewrite.k:328 rmula_rewrite.k:296 rmula_rewrite.k:314 rmula_rewrite.k:322 rmula_rewrite.k:337 rmula_rewrite.k:322 rmula_rewrite.k:334 rmula_rewrite.k:296 rmula_rewrite.k:322 rmula_rewrite.k:337 rmula_rewrite.k:296 rmula_rewrite.k:296 rmula_rewrite.k:322 rmula_rewrite.k:331 rmula_rewrite.k:296 rmula_rewrite.k:550 rmula_rewrite.k:314 rmula_rewrite.k:325 rmula_rewrite.k:331 rmula_rewrite.k:296 rmula_rewrite.k:322 rmula_rewrite.k:328 rmula_rewrite.k:296 rmula_rewrite.k:547 rmula_rewrite.k:400 rmula_rewrite.k:317 rmula_rewrite.k:325 rmula_rewrite.k:331 rmula_rewrite.k:322 rmula_rewrite.k:328 rmula_rewrite.k:299 rmula_rewrite.k:325 rmula_rewrite.k:331 rmula_rewrite.k:299 rmula_rewrite.k:250 rmula_rewrite.k:250 rmula_rewrite.k:250 rmula_rewrite.k:322 rmula_rewrite.k:331 rmula_rewrite.k:322 rmula_rewrite.k:334 rmula_rewrite.k:296 rmula_rewrite.k:253 rmula_rewrite.k:250 rmula_rewrite.k:314 rmula_rewrite.k:325 rmula_rewrite.k:328 rmula_rewrite.k:296 rmula_rewrite.k:314 rmula_rewrite.k:325 rmula_rewrite.k:334 rmula_rewrite.k:296 rmula_rewrite.k:296 rmula_rewrite.k:322 rmula_rewrite.k:328 rmula_rewrite.k:296 rmula_rewrite.k:250 rmula_rewrite.k:394 rmula_rewrite.k:250 rmula_rewrite.k:250 rmula_rewrite.k:250 rmula_rewrite.k:250 rmula_rewrite.k:250 rmula_rewrite.k:250 rmula_rewrite.k:317 rmula_rewrite.k:314 rmula_rewrite.k:325 rmula_rewrite.k:334 rmula_rewrite.k:322 rmula_rewrite.k:337 rmula_rewrite.k:296 rmula_rewrite.k:296 rmula_rewrite.k:314 rmula_rewrite.k:322 rmula_rewrite.k:337 rmula_rewrite.k:296 rmula_rewrite.k:296 rmula_rewrite.k:322 rmula_rewrite.k:334 rmula_rewrite.k:322 rmula_rewrite.k:337 rmula_rewrite.k:296 rmula_rewrite.k:296 rmula_rewrite.k:314 rmula_rewrite.k:322 rmula_rewrite.k:337 rmula_rewrite.k:296 rmula_rewrite.k:296 rmula_rewrite.k:314 rmula_rewrite.k:322 rmula_rewrite.k:328 rmula_rewrite.k:296 rmula_rewrite.k:314 rmula_rewrite.k:322 rmula_rewrite.k:334 rmula_rewrite.k:296 rmula_rewrite.k:314 rmula_rewrite.k:325 rmula_rewrite.k:334 rmula_rewrite.k:325 rmula_rewrite.k:331 rmula_rewrite.k:296 rmula_rewrite.k:317 rmula_rewrite.k:314 rmula_rewrite.k:296 rmula_rewrite.k:314 rmula_rewrite.k:325 rmula_rewrite.k:334 rmula_rewrite.k:296 rmula_rewrite.k:317 rmula_rewrite.k:322 rmula_rewrite.k:334 rmula_rewrite.k:296 rmula_rewrite.k:296 rmula_rewrite.k:322 rmula_rewrite.k:337 rmula_rewrite.k:296 rmula_rewrite.k:322 rmula_rewrite.k:334 rmula_rewrite.k:296 rmula_rewrite.k:544 rmula_rewrite.k:325 rmula_rewrite.k:334 rmula_rewrite.k:296 rmula_rewrite.k:547 rmula_rewrite.k:454 rmula_rewrite.k:325 rmula_rewrite.k:328 rmula_rewrite.k:296 rmula_rewrite.k:460 rmula_rewrite.k:253 rmula_rewrite.k:322 rmula_rewrite.k:337 rmula_rewrite.k:296 rmula_rewrite.k:296 rmula_rewrite.k:322 rmula_rewrite.k:331 rmula_rewrite.k:325 rmula_rewrite.k:328 rmula_rewrite.k:296 rmula_rewrite.k:325 rmula_rewrite.k:337 rmula_rewrite.k:325 rmula_rewrite.k:328 rmula_rewrite.k:322 rmula_rewrite.k:331 rmula_rewrite.k:299 rmula_rewrite.k:296 rmula_rewrite.k:322 rmula_rewrite.k:334 rmula_rewrite.k:296 rmula_rewrite.k:250 rmula_rewrite.k:250 rmula_rewrite.k:325 rmula_rewrite.k:337 rmula_rewrite.k:296 rmula_rewrite.k:296 rmula_rewrite.k:397 rmula_rewrite.k:397 in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. removed,0 places removed rmula_rewrite.k:721 rmula_rewrite.k:787 rmula_rewrite.k:721 rmula_rewrite.k:787 rmula_rewrite.k:721 rmula_rewrite.k:787 (type SKEL/FNDP) for 9 DLCround-PT-06a-CTLFireability-03 sec (type SKEL/EQUN) for 9 DLCround-PT-06a-CTLFireability-03 sec rmula_rewrite.k:721 rmula_rewrite.k:787 (type SKEL/SRCH) for 9 DLCround-PT-06a-CTLFireability-03 sec (type SKEL/SRCH) for 9 DLCround-PT-06a-CTLFireability-03 sec (type SKEL/FNDP) for DLCround-PT-06a-CTLFireability-03 : true 4 1 0.000000 0 (type EQUN) for DLCround-PT-06a-CTLFireability-03 (obsolete) (type SRCH) for DLCround-PT-06a-CTLFireability-03 (obsolete) (type SRCH) for DLCround-PT-06a-CTLFireability-03 (obsolete) (type SKEL/SRCH) for DLCround-PT-06a-CTLFireability-03 : true 6 5 0.000000 1 (type SKEL/SRCH) for DLCround-PT-06a-CTLFireability-03 : unknown 0.000000 1 (type SKEL/EQUN) for DLCround-PT-06a-CTLFireability-03 : unknown rmula_rewrite.k:711 rmula_rewrite.k:711 rmula_rewrite.k:711 (type SKEL/FNDP) for 34 DLCround-PT-06a-CTLFireability-10 sec (type SKEL/EQUN) for 34 DLCround-PT-06a-CTLFireability-10 sec rmula_rewrite.k:711 (type SKEL/SRCH) for 34 DLCround-PT-06a-CTLFireability-10 sec (type SKEL/SRCH) for 34 DLCround-PT-06a-CTLFireability-10 sec (type SKEL/SRCH) for DLCround-PT-06a-CTLFireability-10 : true 5 4 0.000000 1 (type FNDP) for DLCround-PT-06a-CTLFireability-10 (obsolete) (type EQUN) for DLCround-PT-06a-CTLFireability-10 (obsolete) (type SRCH) for DLCround-PT-06a-CTLFireability-10 (obsolete) in 0.000000 secs. (type SKEL/FNDP) for DLCround-PT-06a-CTLFireability-10 : true 3 1 0.000000 0 file /home/mcc/execution/CTLFireability-64.sara. in 0.000000 secs. (type SKEL/SRCH) for DLCround-PT-06a-CTLFireability-10 : unknown 0.000000 1 in 0.000000 secs. ordering is non-deterministic in 0.000000 secs. (type SKEL/EQUN) for DLCround-PT-06a-CTLFireability-10 : true in 0.000000 secs. in 0.000000 secs. rmula_rewrite.k:807 rmula_rewrite.k:810 rmula_rewrite.k:810 rmula_rewrite.k:808 rmula_rewrite.k:811 rmula_rewrite.k:812 rmula_rewrite.k:806 rmula_rewrite.k:812 rmula_rewrite.k:809 rmula_rewrite.k:809 rmula_rewrite.k:721 rmula_rewrite.k:787 EXCL) for 6 DLCround-PT-06a-CTLFireability-02 rmula_rewrite.k:721 rmula_rewrite.k:787 rmula_rewrite.k:721 rmula_rewrite.k:787 rmula_rewrite.k:711 rmula_rewrite.k:711 rmula_rewrite.k:711 rmula_rewrite.k:703 (type FNDP) for 9 DLCround-PT-06a-CTLFireability-03 sec (type EQUN) for 9 DLCround-PT-06a-CTLFireability-03 sec (type SRCH) for 9 DLCround-PT-06a-CTLFireability-03 sec rmula_rewrite.k:721 rmula_rewrite.k:787 (type SRCH) for DLCround-PT-06a-CTLFireability-03 : unknown 0.000000 1 (type FNDP) for 34 DLCround-PT-06a-CTLFireability-10 sec rmula_rewrite.k:806 rmula_rewrite.k:814 rmula_rewrite.k:814 rmula_rewrite.k:807 rmula_rewrite.k:813 rmula_rewrite.k:809 (type FNDP) for DLCround-PT-06a-CTLFireability-03 : true 1 1 0.000000 0 (type EQUN) for DLCround-PT-06a-CTLFireability-03 (obsolete) (type EQUN) for 34 DLCround-PT-06a-CTLFireability-10 sec (type SRCH) for 34 DLCround-PT-06a-CTLFireability-10 sec (type EQUN) for DLCround-PT-06a-CTLFireability-03 : unknown (type SRCH) for DLCround-PT-06a-CTLFireability-10 : unknown 0.000000 1 (type FNDP) for DLCround-PT-06a-CTLFireability-10 : true 1 1 0.000000 0 (type EQUN) for DLCround-PT-06a-CTLFireability-10 (obsolete) rmula_rewrite.k:811 rmula_rewrite.k:812 rmula_rewrite.k:813 rmula_rewrite.k:812 rmula_rewrite.k:808 rmula_rewrite.k:809 rmula_rewrite.k:811 rmula_rewrite.k:812 rmula_rewrite.k:813 rmula_rewrite.k:811 rmula_rewrite.k:807 rmula_rewrite.k:808 rmula_rewrite.k:813 rmula_rewrite.k:711 rmula_rewrite.k:807 rmula_rewrite.k:812 rmula_rewrite.k:813 rmula_rewrite.k:811 rmula_rewrite.k:813 rmula_rewrite.k:809 rmula_rewrite.k:810 rmula_rewrite.k:812 rmula_rewrite.k:810 rmula_rewrite.k:810 rmula_rewrite.k:807 rmula_rewrite.k:813 rmula_rewrite.k:810 rmula_rewrite.k:806 rmula_rewrite.k:807 rmula_rewrite.k:813 rmula_rewrite.k:812 rmula_rewrite.k:812 rmula_rewrite.k:807 rmula_rewrite.k:807 rmula_rewrite.k:810 rmula_rewrite.k:813 file /home/mcc/execution/CTLFireability-73.sara. ordering is non-deterministic (type EQUN) for DLCround-PT-06a-CTLFireability-10 : true rmula_rewrite.k:808 rmula_rewrite.k:806 rmula_rewrite.k:808 rmula_rewrite.k:814 rmula_rewrite.k:808 rmula_rewrite.k:812 rmula_rewrite.k:814 rmula_rewrite.k:811 rmula_rewrite.k:814 rmula_rewrite.k:806 rmula_rewrite.k:808 rmula_rewrite.k:806 rmula_rewrite.k:808 rmula_rewrite.k:811 rmula_rewrite.k:815 rmula_rewrite.k:807 rmula_rewrite.k:814 rmula_rewrite.k:806 rmula_rewrite.k:811 rmula_rewrite.k:806 rmula_rewrite.k:808 rmula_rewrite.k:814 rmula_rewrite.k:813 rmula_rewrite.k:808 rmula_rewrite.k:807 rmula_rewrite.k:807 rmula_rewrite.k:806 rmula_rewrite.k:812 rmula_rewrite.k:814 rmula_rewrite.k:807 rmula_rewrite.k:809 rmula_rewrite.k:807 rmula_rewrite.k:811 rmula_rewrite.k:814 rmula_rewrite.k:808 rmula_rewrite.k:815 rmula_rewrite.k:806 rmula_rewrite.k:736 rmula_rewrite.k:696 rmula_rewrite.k:811 rmula_rewrite.k:807 rmula_rewrite.k:807 rmula_rewrite.k:806 rmula_rewrite.k:807 rmula_rewrite.k:806 rmula_rewrite.k:807 rmula_rewrite.k:812 rmula_rewrite.k:806 rmula_rewrite.k:806 rmula_rewrite.k:807 rmula_rewrite.k:810 rmula_rewrite.k:815 rmula_rewrite.k:813 rmula_rewrite.k:812 rmula_rewrite.k:812 rmula_rewrite.k:811 rmula_rewrite.k:806 rmula_rewrite.k:809 rmula_rewrite.k:814 rmula_rewrite.k:814 rmula_rewrite.k:806 rmula_rewrite.k:812 rmula_rewrite.k:806 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 DLCround-PT-06a-CTLFireability-02 245946 m, 49189 m/sec, 7725708 t fired, . Pages in use: 2 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 DLCround-PT-06a-CTLFireability-02 510170 m, 52844 m/sec, 16039330 t fired, . Pages in use: 3 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 DLCround-PT-06a-CTLFireability-02 755413 m, 49048 m/sec, 24368818 t fired, . Pages in use: 4 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 DLCround-PT-06a-CTLFireability-02 987828 m, 46483 m/sec, 32561000 t fired, . Pages in use: 5 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 DLCround-PT-06a-CTLFireability-02 1197118 m, 41858 m/sec, 41300813 t fired, . Pages in use: 5 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 DLCround-PT-06a-CTLFireability-02 1400383 m, 40653 m/sec, 49593611 t fired, . Pages in use: 6 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 DLCround-PT-06a-CTLFireability-02 1601310 m, 40185 m/sec, 57771628 t fired, . Pages in use: 7 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 DLCround-PT-06a-CTLFireability-02 1805433 m, 40824 m/sec, 65935947 t fired, . Pages in use: 8 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 DLCround-PT-06a-CTLFireability-02 1998530 m, 38619 m/sec, 74061880 t fired, . Pages in use: 9 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 DLCround-PT-06a-CTLFireability-02 2206308 m, 41555 m/sec, 82606774 t fired, . Pages in use: 10 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 DLCround-PT-06a-CTLFireability-02 2438221 m, 46382 m/sec, 90620716 t fired, . Pages in use: 11 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 DLCround-PT-06a-CTLFireability-02 2655391 m, 43434 m/sec, 98787071 t fired, . Pages in use: 11 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 DLCround-PT-06a-CTLFireability-02 2857414 m, 40404 m/sec, 106923148 t fired, . Pages in use: 12 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 DLCround-PT-06a-CTLFireability-02 3076830 m, 43883 m/sec, 114713713 t fired, . Pages in use: 13 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 DLCround-PT-06a-CTLFireability-02 3287261 m, 42086 m/sec, 122767104 t fired, . Pages in use: 14 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 DLCround-PT-06a-CTLFireability-02 3482940 m, 39135 m/sec, 130917839 t fired, . Pages in use: 15 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 DLCround-PT-06a-CTLFireability-02 3689406 m, 41293 m/sec, 138848306 t fired, . Pages in use: 16 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 DLCround-PT-06a-CTLFireability-02 3888329 m, 39784 m/sec, 146781503 t fired, . Pages in use: 17 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 DLCround-PT-06a-CTLFireability-02 4151339 m, 52602 m/sec, 154718016 t fired, . Pages in use: 18 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 DLCround-PT-06a-CTLFireability-02 4389515 m, 47635 m/sec, 162742680 t fired, . Pages in use: 19 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 DLCround-PT-06a-CTLFireability-02 4616286 m, 45354 m/sec, 170459393 t fired, . Pages in use: 20 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 DLCround-PT-06a-CTLFireability-02 4819148 m, 40572 m/sec, 178306577 t fired, . Pages in use: 20 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 DLCround-PT-06a-CTLFireability-02 5055679 m, 47306 m/sec, 185876314 t fired, . Pages in use: 21 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 DLCround-PT-06a-CTLFireability-02 5284727 m, 45809 m/sec, 193860070 t fired, . Pages in use: 22 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 DLCround-PT-06a-CTLFireability-02 5486117 m, 40278 m/sec, 202128965 t fired, . Pages in use: 23 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 DLCround-PT-06a-CTLFireability-02 5693480 m, 41472 m/sec, 210375442 t fired, . Pages in use: 24 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 DLCround-PT-06a-CTLFireability-02 5910997 m, 43503 m/sec, 218195785 t fired, . Pages in use: 25 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 DLCround-PT-06a-CTLFireability-02 6134308 m, 44662 m/sec, 225656790 t fired, . Pages in use: 26 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 DLCround-PT-06a-CTLFireability-02 6341530 m, 41444 m/sec, 233038080 t fired, . Pages in use: 27 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 DLCround-PT-06a-CTLFireability-02 6542909 m, 40275 m/sec, 240848181 t fired, . Pages in use: 28 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 DLCround-PT-06a-CTLFireability-02 6744077 m, 40233 m/sec, 248680122 t fired, . Pages in use: 28 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 DLCround-PT-06a-CTLFireability-02 6935040 m, 38192 m/sec, 256267125 t fired, . Pages in use: 29 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 DLCround-PT-06a-CTLFireability-02 7128291 m, 38650 m/sec, 264404326 t fired, . Pages in use: 30 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 DLCround-PT-06a-CTLFireability-02 7322791 m, 38900 m/sec, 272292535 t fired, . Pages in use: 31 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 DLCround-PT-06a-CTLFireability-02 7507067 m, 36855 m/sec, 280199809 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 DLCround-PT-06a-CTLFireability-02 7723620 m, 43310 m/sec, 287607968 t fired, . Pages in use: 32 16 (type EXCL) for DLCround-PT-06a-CTLFireability-02 (memory limit exceeded) VALUE PRODUCED BY CONJ false findpath IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 16 (type EXCL) for 53 DLCround-PT-06a-CTLFireability-15 (type EXCL) for DLCround-PT-06a-CTLFireability-15 : false 53428 1030649 0.000000 1 (type EXCL) for 50 DLCround-PT-06a-CTLFireability-14 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 DLCround-PT-06a-CTLFireability-14 480118 m, 96023 m/sec, 8872321 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 DLCround-PT-06a-CTLFireability-14 841203 m, 72217 m/sec, 15915130 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 DLCround-PT-06a-CTLFireability-14 1298927 m, 91544 m/sec, 22470886 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 DLCround-PT-06a-CTLFireability-14 1724169 m, 85048 m/sec, 29332449 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 DLCround-PT-06a-CTLFireability-14 2030539 m, 61274 m/sec, 36384266 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 DLCround-PT-06a-CTLFireability-14 2338728 m, 61637 m/sec, 43053243 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 DLCround-PT-06a-CTLFireability-14 2635448 m, 59344 m/sec, 49808236 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 DLCround-PT-06a-CTLFireability-14 2851495 m, 43209 m/sec, 57344300 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 DLCround-PT-06a-CTLFireability-14 2988962 m, 27493 m/sec, 65923384 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 DLCround-PT-06a-CTLFireability-14 3136331 m, 29473 m/sec, 73818089 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 DLCround-PT-06a-CTLFireability-14 3290863 m, 30906 m/sec, 81652254 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 DLCround-PT-06a-CTLFireability-14 3539141 m, 49655 m/sec, 89476377 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 DLCround-PT-06a-CTLFireability-14 3720884 m, 36348 m/sec, 97137742 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 DLCround-PT-06a-CTLFireability-14 3900579 m, 35939 m/sec, 105403039 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 DLCround-PT-06a-CTLFireability-14 4150239 m, 49932 m/sec, 112776380 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 DLCround-PT-06a-CTLFireability-14 4445750 m, 59102 m/sec, 119892757 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 DLCround-PT-06a-CTLFireability-14 4732927 m, 57435 m/sec, 126434878 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 DLCround-PT-06a-CTLFireability-14 4983432 m, 50101 m/sec, 133857590 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 DLCround-PT-06a-CTLFireability-14 5198668 m, 43047 m/sec, 141406332 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 DLCround-PT-06a-CTLFireability-14 5487846 m, 57835 m/sec, 148079176 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 DLCround-PT-06a-CTLFireability-14 5795889 m, 61608 m/sec, 154972211 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 DLCround-PT-06a-CTLFireability-14 6025773 m, 45976 m/sec, 162507241 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 DLCround-PT-06a-CTLFireability-14 6236209 m, 42087 m/sec, 170448235 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 DLCround-PT-06a-CTLFireability-14 6478490 m, 48456 m/sec, 177871471 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 DLCround-PT-06a-CTLFireability-14 6695206 m, 43343 m/sec, 185401686 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 DLCround-PT-06a-CTLFireability-14 6960295 m, 53017 m/sec, 192394149 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 DLCround-PT-06a-CTLFireability-14 7316817 m, 71304 m/sec, 198423840 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 DLCround-PT-06a-CTLFireability-14 7667788 m, 70194 m/sec, 204274599 t fired, . Pages in use: 32 16 (type EXCL) for DLCround-PT-06a-CTLFireability-14 (memory limit exceeded) VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 16 (type EXCL) for 44 DLCround-PT-06a-CTLFireability-12 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 1/32 DLCround-PT-06a-CTLFireability-12 59247 m, 11849 m/sec, 938415 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 1/32 DLCround-PT-06a-CTLFireability-12 116557 m, 11462 m/sec, 1854181 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 1/32 DLCround-PT-06a-CTLFireability-12 171523 m, 10993 m/sec, 2754080 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 1/32 DLCround-PT-06a-CTLFireability-12 217794 m, 9254 m/sec, 3640585 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 DLCround-PT-06a-CTLFireability-12 281706 m, 12782 m/sec, 4598681 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 DLCround-PT-06a-CTLFireability-12 342879 m, 12234 m/sec, 5383412 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 DLCround-PT-06a-CTLFireability-12 394654 m, 10355 m/sec, 5942740 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 DLCround-PT-06a-CTLFireability-12 432005 m, 7470 m/sec, 6431549 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 DLCround-PT-06a-CTLFireability-12 459501 m, 5499 m/sec, 6779246 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 DLCround-PT-06a-CTLFireability-12 496603 m, 7420 m/sec, 7251884 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 DLCround-PT-06a-CTLFireability-12 539982 m, 8675 m/sec, 7833963 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 DLCround-PT-06a-CTLFireability-12 580916 m, 8186 m/sec, 8297527 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 DLCround-PT-06a-CTLFireability-12 656442 m, 15105 m/sec, 9048445 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 DLCround-PT-06a-CTLFireability-12 695032 m, 7718 m/sec, 9535044 t fired, . Pages in use: 32 16 VALUE PRODUCED BY CONJ false findpath CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 1 0 0 8 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 DLCround-PT-06a-CTLFireability-12 735079 m, 8009 m/sec, 10037120 t fired, . Pages in use: 32 16 VALUE PRODUCED BY/home/mcc/BenchKit/bin//../lola/bin//../BenchKit_head.sh: line 63: 377 Killed lola --conf=$BIN_DIR/configfiles/ctlfireabilityconf --formula=$DIR/CTLFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-06a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is DLCround-PT-06a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r102-tall-167814477200666"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-06a.tgz
mv DLCround-PT-06a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;