fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r102-tall-167814477100606
Last Updated
May 14, 2023

About the Execution of LoLA for DLCflexbar-PT-8a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
5095.004 449565.00 584854.00 2595.00 TTTTTFTTTTTFTTTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r102-tall-167814477100606.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is DLCflexbar-PT-8a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r102-tall-167814477100606
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 9.2M
-rw-r--r-- 1 mcc users 7.8K Feb 26 07:53 CTLCardinality.txt
-rw-r--r-- 1 mcc users 84K Feb 26 07:53 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.9K Feb 25 18:01 CTLFireability.txt
-rw-r--r-- 1 mcc users 66K Feb 25 18:01 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 15:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 15:52 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 15:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 18K Feb 27 06:24 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 203K Feb 27 06:24 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Feb 26 21:28 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 45K Feb 26 21:28 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:52 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:52 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 8.7M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-00
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-01
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-02
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-03
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-04
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-05
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-06
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-07
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-08
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-09
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-10
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-11
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-12
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-13
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-14
FORMULA_NAME DLCflexbar-PT-8a-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678306245243

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DLCflexbar-PT-8a
Not applying reductions.
Model is PT
ReachabilityCardinality PT
starting LoLA
BK_INPUT DLCflexbar-PT-8a
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-8a-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678306694808

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 49 (type SKEL/FNDP) for 0 DLCflexbar-PT-8a-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type SKEL/EQUN) for 0 DLCflexbar-PT-8a-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type SKEL/SRCH) for 0 DLCflexbar-PT-8a-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/SRCH) for 0 DLCflexbar-PT-8a-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 52 (type SKEL/SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-00
lola: result : true
lola: markings : 7
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for DLCflexbar-PT-8a-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 50 (type EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 53 (type SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-00 (obsolete)
lola: FINISHED task # 49 (type SKEL/FNDP) for DLCflexbar-PT-8a-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 5
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 50 (type SKEL/EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-00
lola: result : true
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 57 (type SKEL/FNDP) for 18 DLCflexbar-PT-8a-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/EQUN) for 18 DLCflexbar-PT-8a-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SKEL/SRCH) for 18 DLCflexbar-PT-8a-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type SKEL/SRCH) for 18 DLCflexbar-PT-8a-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Rule S: 0 transitions removed,0 places removed
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 61 (type SKEL/SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-06
lola: result : false
lola: markings : 760
lola: fired transitions : 2630
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 57 (type FNDP) for DLCflexbar-PT-8a-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 58 (type EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 60 (type SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-06 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-58.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 58 (type SKEL/EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-06
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 65 (type SKEL/FNDP) for 9 DLCflexbar-PT-8a-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SKEL/EQUN) for 9 DLCflexbar-PT-8a-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type SKEL/SRCH) for 9 DLCflexbar-PT-8a-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SKEL/SRCH) for 9 DLCflexbar-PT-8a-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 68 (type SKEL/SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-03
lola: result : false
lola: markings : 61
lola: fired transitions : 2296
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 65 (type FNDP) for DLCflexbar-PT-8a-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 66 (type EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 69 (type SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-03 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-66.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCflexbar-PT-8a-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-06: AG true skeleton: tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCflexbar-PT-8a-ReachabilityCardinality-00: EF 0 0 0 0 3 0 0 2
DLCflexbar-PT-8a-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-02: INITIAL 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-04: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-05: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-07: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-08: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-09: INITIAL 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-10: INITIAL 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-11: INITIAL 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-12: INITIAL 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-13: INITIAL 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-15: AG 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 405 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16

lola: FINISHED task # 66 (type SKEL/EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-03
lola: result : false
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCflexbar-PT-8a-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-06: AG true skeleton: tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCflexbar-PT-8a-ReachabilityCardinality-00: EF 0 0 0 0 3 0 0 2
DLCflexbar-PT-8a-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-02: INITIAL 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-04: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-05: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-07: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-08: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-09: INITIAL 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-10: INITIAL 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-11: INITIAL 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-12: INITIAL 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-13: INITIAL 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-15: AG 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 410 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 73 (type SKEL/FNDP) for 21 DLCflexbar-PT-8a-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type SKEL/EQUN) for 21 DLCflexbar-PT-8a-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type SKEL/SRCH) for 21 DLCflexbar-PT-8a-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 77 (type SKEL/SRCH) for 21 DLCflexbar-PT-8a-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 7 (type CNST) for 6 DLCflexbar-PT-8a-ReachabilityCardinality-02
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 40 (type CNST) for 39 DLCflexbar-PT-8a-ReachabilityCardinality-13
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 31 (type CNST) for 30 DLCflexbar-PT-8a-ReachabilityCardinality-10
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 7 (type CNST) for DLCflexbar-PT-8a-ReachabilityCardinality-02
lola: result : true
lola: LAUNCH INITIAL
lola: LAUNCH task # 34 (type CNST) for 33 DLCflexbar-PT-8a-ReachabilityCardinality-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 37 (type CNST) for 36 DLCflexbar-PT-8a-ReachabilityCardinality-12
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 40 (type CNST) for DLCflexbar-PT-8a-ReachabilityCardinality-13
lola: result : true
lola: FINISHED task # 76 (type SKEL/SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-07
lola: result : false
lola: markings : 7
lola: fired transitions : 14
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 73 (type FNDP) for DLCflexbar-PT-8a-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 74 (type EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 77 (type SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-07 (obsolete)
lola: FINISHED task # 73 (type SKEL/FNDP) for DLCflexbar-PT-8a-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 30806
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 37 (type CNST) for DLCflexbar-PT-8a-ReachabilityCardinality-12
lola: result : true
lola: FINISHED task # 34 (type CNST) for DLCflexbar-PT-8a-ReachabilityCardinality-11
lola: result : false
lola: FINISHED task # 31 (type CNST) for DLCflexbar-PT-8a-ReachabilityCardinality-10
lola: result : true
lola: FINISHED task # 74 (type SKEL/EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-07
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
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DLCflexbar-PT-8a-ReachabilityCardinality-13: INITIAL true preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-14: AG true skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCflexbar-PT-8a-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-05: AG 0 0 0 0 3 0 0 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 440 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
lola: planning for DLCflexbar-PT-8a-ReachabilityCardinality-14 stopped (result already fixed).
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCflexbar-PT-8a-ReachabilityCardinality-00: EF true tandem / relaxed
DLCflexbar-PT-8a-ReachabilityCardinality-02: INITIAL true preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-06: AG true skeleton: tandem / relaxed
DLCflexbar-PT-8a-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-08: AG true skeleton: tandem / relaxed
DLCflexbar-PT-8a-ReachabilityCardinality-09: INITIAL true preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-10: INITIAL true preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-11: INITIAL false preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-12: INITIAL true preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-13: INITIAL true preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-14: AG true skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCflexbar-PT-8a-ReachabilityCardinality-01: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-8a-ReachabilityCardinality-05: AG 0 0 0 0 3 0 0 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 445 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 130 (type EXCL) for 15 DLCflexbar-PT-8a-ReachabilityCardinality-05
lola: time limit : 1577 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 126 (type FNDP) for 15 DLCflexbar-PT-8a-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 127 (type EQUN) for 15 DLCflexbar-PT-8a-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 129 (type SRCH) for 15 DLCflexbar-PT-8a-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 129 (type SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-05
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 126 (type FNDP) for DLCflexbar-PT-8a-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 127 (type EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 130 (type EXCL) for DLCflexbar-PT-8a-ReachabilityCardinality-05 (obsolete)
lola: FINISHED task # 126 (type FNDP) for DLCflexbar-PT-8a-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-127.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 127 (type EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-05
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 137 (type EXCL) for 3 DLCflexbar-PT-8a-ReachabilityCardinality-01
lola: time limit : 3151 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 133 (type FNDP) for 3 DLCflexbar-PT-8a-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 134 (type EQUN) for 3 DLCflexbar-PT-8a-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 136 (type SRCH) for 3 DLCflexbar-PT-8a-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 136 (type SRCH) for DLCflexbar-PT-8a-ReachabilityCardinality-01
lola: result : false
lola: markings : 8
lola: fired transitions : 38
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 133 (type FNDP) for DLCflexbar-PT-8a-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 134 (type EQUN) for DLCflexbar-PT-8a-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 137 (type EXCL) for DLCflexbar-PT-8a-ReachabilityCardinality-01 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCflexbar-PT-8a-ReachabilityCardinality-00: EF true tandem / relaxed
DLCflexbar-PT-8a-ReachabilityCardinality-01: AG true tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-02: INITIAL true preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-05: AG false tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-06: AG true skeleton: tandem / relaxed
DLCflexbar-PT-8a-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-08: AG true skeleton: tandem / relaxed
DLCflexbar-PT-8a-ReachabilityCardinality-09: INITIAL true preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-10: INITIAL true preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-11: INITIAL false preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-12: INITIAL true preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-13: INITIAL true preprocessing
DLCflexbar-PT-8a-ReachabilityCardinality-14: AG true skeleton: tandem / insertion
DLCflexbar-PT-8a-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed


Time elapsed: 449 secs. Pages in use: 2

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-8a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is DLCflexbar-PT-8a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r102-tall-167814477100606"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-8a.tgz
mv DLCflexbar-PT-8a execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;