fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r097-tall-167814469400322
Last Updated
May 14, 2023

About the Execution of Marcie for DBSingleClientW-PT-d2m08

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
9439.855 3600000.00 3599928.00 191.60 [undef] Time out reached

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r097-tall-167814469400322.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool marcie
Input is DBSingleClientW-PT-d2m08, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r097-tall-167814469400322
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.0M
-rw-r--r-- 1 mcc users 8.4K Feb 26 15:29 CTLCardinality.txt
-rw-r--r-- 1 mcc users 94K Feb 26 15:29 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.6K Feb 26 15:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 61K Feb 26 15:28 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 15:49 LTLCardinality.txt
-rw-r--r-- 1 mcc users 21K Feb 25 15:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 15:49 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 15:49 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.6K Feb 26 15:31 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 97K Feb 26 15:31 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.1K Feb 26 15:30 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 26 15:30 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 1.6M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DBSingleClientW-PT-d2m08-CTLFireability-00
FORMULA_NAME DBSingleClientW-PT-d2m08-CTLFireability-01
FORMULA_NAME DBSingleClientW-PT-d2m08-CTLFireability-02
FORMULA_NAME DBSingleClientW-PT-d2m08-CTLFireability-03
FORMULA_NAME DBSingleClientW-PT-d2m08-CTLFireability-04
FORMULA_NAME DBSingleClientW-PT-d2m08-CTLFireability-05
FORMULA_NAME DBSingleClientW-PT-d2m08-CTLFireability-06
FORMULA_NAME DBSingleClientW-PT-d2m08-CTLFireability-07
FORMULA_NAME DBSingleClientW-PT-d2m08-CTLFireability-08
FORMULA_NAME DBSingleClientW-PT-d2m08-CTLFireability-09
FORMULA_NAME DBSingleClientW-PT-d2m08-CTLFireability-10
FORMULA_NAME DBSingleClientW-PT-d2m08-CTLFireability-11
FORMULA_NAME DBSingleClientW-PT-d2m08-CTLFireability-12
FORMULA_NAME DBSingleClientW-PT-d2m08-CTLFireability-13
FORMULA_NAME DBSingleClientW-PT-d2m08-CTLFireability-14
FORMULA_NAME DBSingleClientW-PT-d2m08-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678245513166

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=marcie
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=DBSingleClientW-PT-d2m08
Not applying reductions.
Model is PT
CTLFireability PT
timeout --kill-after=10s --signal=SIGINT 1m for testing only

Marcie built on Linux at 2019-11-18.
A model checker for Generalized Stochastic Petri nets

authors: Alex Tovchigrechko (IDD package and CTL model checking)

Martin Schwarick (Symbolic numerical analysis and CSL model checking)

Christian Rohr (Simulative and approximative numerical model checking)

marcie@informatik.tu-cottbus.de

called as: /home/mcc/BenchKit/bin//../marcie/bin/marcie --net-file=model.pnml --mcc-file=CTLFireability.xml --memory=6 --mcc-mode

parse successfull
net created successfully

Net: DBSingleClientW_PT_d2m08
(NrP: 4763 NrTr: 2478 NrArc: 9912)

parse formulas
formulas created successfully
place and transition orderings generation:0m 1.900sec

net check time: 0m 0.001sec

init dd package: 0m 2.886sec

TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393916 kB
MemFree: 6786504 kB
After kill :
MemTotal: 16393916 kB
MemFree: 16182200 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

check for maximal unmarked siphon
found
The net has a maximal unmarked siphon:
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l631
l632
l634
l635
l636
l637
l638
l639
l640
l641
l642
l643
l645
l646
l647
l648
l649
l650
l651
l652
l653
l654
l656
l657
l658
l659
l660
l661
l662
l663
l664
l665
l667
l668
l669
l670
l671
l672
l673
l674
l675
l676
l678
l679
l680
l681
l682
l683
l684
l685
l686
l687
l689
l690
l691
l692
l693
l694
l695
l696
l697
l698
l702
l703
l704
l705
l706
l707
l708
l709
l710
l711
l713
l714
l715
l716
l717
l718
l719
l720
l721
l722
l724
l725
l726
l727
l728
l729
l730
l731
l732
l733
l735
l736
l737
l738
l739
l740
l741
l742
l743
l744
l746
l747
l748
l749
l750
l751
l752
l753
l754
l755
l757
l758
l759
l760
l761
l762
l763
l764
l765
l766
l768
l769
l770
l771
l772
l773
l774
l775
l776
l777
l779
l780
l781
l782
l783
l784
l785
l786
l787
l788
l790
l791
l792
l793
l794
l795
l796
l797
l798
l799
l801
l802
l803
l804
l805
l806
l807
l808
l809
l810
l813
l814
l815
l816
l817
l818
l819
l820
l821
l822
l824
l825
l826
l827
l828
l829
l830
l831
l832
l833
l835
l836
l837
l838
l839
l840
l841
l842
l843
l844
l846
l847
l848
l849
l850
l851
l852
l853
l854
l855
l857
l858
l859
l860
l861
l862
l863
l864
l865
l866
l868
l869
l870
l871
l872
l873
l874
l875
l876
l877
l879
l880
l881
l882
l883
l884
l885
l886
l887
l888
l890
l891
l892
l893
l894
l895
l896
l897
l898
l899
l901
l902
l903
l904
l905
l906
l907
l908
l909
l910
l912
l913
l914
l915
l916
l917
l918
l919
l920
l921
l924
l925
l926
l927
l928
l929
l930
l931
l932
l933
l935
l936
l937
l938
l939
l940
l941
l942
l943
l944
l946
l947
l948
l949
l950
l951
l952
l953
l954
l955
l957
l958
l959
l960
l961
l962
l963
l964
l965
l966
l968
l969
l970
l971
l972
l973
l974
l975
l976
l977
l979
l980
l981
l982
l983
l984
l985
l986
l987
l988
l990
l991
l992
l993
l994
l995
l996
l997
l998
l999
l1001
l1002
l1003
l1004
l1005
l1006
l1007
l1008
l1009
l1010
l1012
l1013
l1014
l1015
l1016
l1017
l1018
l1019
l1020
l1021
l1023
l1024
l1025
l1026
l1027
l1028
l1029
l1030
l1031
l1032
l1034
l1035
l1036
l1037
l1038
l1039
l1040
l1041
l1042
l1043
l1045
l1046
l1047
l1048
l1049
l1050
l1051
l1052
l1053
l1054
l1056
l1057
l1058
l1059
l1060
l1061
l1062
l1063
l1064
l1065
l1067
l1068
l1069
l1070
l1071
l1072
l1073
l1074
l1075
l1076
l1078
l1079
l1080
l1081
l1082
l1083
l1084
l1085
l1086
l1087
l1089
l1090
l1091
l1092
l1093
l1094
l1095
l1096
l1097
l1098
l1100
l1101
l1102
l1103
l1104
l1105
l1106
l1107
l1108
l1109
l1111
l1112
l1113
l1114
l1115
l1116
l1117
l1118
l1119
l1120
l1122
l1123
l1124
l1125
l1126
l1127
l1128
l1129
l1130
l1131
l1133
l1134
l1135
l1136
l1137
l1138
l1139
l1140
l1141
l1142
l1145
l1146
l1147
l1148
l1149
l1150
l1151
l1152
l1153
l1154
l1156
l1157
l1158
l1159
l1160
l1161
l1162
l1163
l1164
l1165
l1167
l1168
l1169
l1170
l1171
l1172
l1173
l1174
l1175
l1176
l1178
l1179
l1180
l1181
l1182
l1183
l1184
l1185
l1186
l1187
l1189
l1190
l1191
l1192
l1193
l1194
l1195
l1196
l1197
l1198
l1200
l1201
l1202
l1203
l1204
l1205
l1206
l1207
l1208
l1209
l1211
l1212
l1213
l1214
l1215
l1216
l1217
l1218
l1219
l1220
l1222
l1223
l1224
l1225
l1226
l1227
l1228
l1229

The net has transition(s) that can never fire:


check for constant places
l2
l4
l5
l6
l8
l9
l10
l11
l12
l13
l14
l15
l16
l17
l18
l19
l20
l21
l22
l23
l24
l25
l26
l27
l28
l30
l32
l33
l34
l37
l38
l41
l42
l43
l44
l45
l46
l47
l48
l49
l50
l51
l52
l53
l54
l55
l56
l57
l58
l59
l60
l61
l62
l63
l64
l65
l66
l67
l68
l69
l70
l71
l72
l73
l74
l75
l76
l77
l78
l79
l80
l81
l82
l83
l84
l85
l86
l87
l88
l89
l90
l91
l92
l93
l94
l95
l96
l97
l98
l99
l100
l101
l102
l103
l104
l105
l106
l107
l108
l109
l110
l111
l112
l113
l114
l115
l116
l117
l118
l119
l120
l121
l122
l123
l124
l125
l126
l127
l128
l129
l130
l131
l132
l133
l134
l135
l136
l137
l138
l139
l140
l141
l142
l143
l144
l145
l146
l147
l148
l149
l150
l151
l152
l153
l154
l155
l156
l157
l158
l159
l160
l161
l162
l163
l164
l165
l166
l167
l168
l169
l170
l171
l172
l173
l174
l175
l176
l177
l178
l179
l180
l181
l182
l183
l184
l185
l186
l187
l188
l189
l190
l191
l192
l193
l194
l195
l196
l197
l198
l199
l200
l201
l202
l203
l204
l205
l206
l207
l208
l209
l210
l211
l212
l213
l214
l215
l216
l217
l218
l219
l220
l221
l222
l223
l224
l225
l226
l227
l228
l229
l230
l231
l232
l233
l234
l235
l236
l237
l238
l239
l240
l241
l242
l243
l244
l245
l246
l247
l248
l249
l250
l251
l252
l253
l254
l255
l256
l257
l258
l259
l260
l261
l262
l263
l264
l265
l266
l267
l268
l269
l270
l271
l272
l273
l274
l275
l276
l277
l278
l279
l280
l281
l282
l283
l284
l285
l286
l287
l288
l289
l290
l291
l292
l293
l294
l295
l296
l297
l298
l299
l300
l301
l302
l303
l304
l305
l306
l307
l308
l309
l310
l311
l312
l313
l314
l315
l316
l317
l318
l319
l320
l321
l322
l323
l324
l325
l326
l327
l328
l329
l330
l331
l332
l333
l334
l335
l336
l337
l338
l339
l340
l341
l342
l343
l344
l345
l346
l347
l348
l349
l350
l351
l352
l353
l354
l355
l356
l357
l358
l359
l360
l361
l362
l363
l364
l365
l366
l367
l368
l369
l370
l371
l372
l373
l374
l375
l376
l377
l378
l379
l380
l381
l382
l383
l384
l385
l386
l387
l388
l389
l390
l391
l392
l393
l394
l395
l396
l397
l398
l399
l400
l401
l402
l403
l404
l405
l406
l407
l408
l409
l410
l411
l412
l413
l414
l415
l416
l417
l418
l419
l420
l421
l422
l423
l424
l425
l426
l427
l428
l429
l430
l431
l432
l433
l434
l435
l436
l437
l438
l439
l440
l441
l442
l443
l444
l445
l446
l447
l448
l449
l450
l451
l452
l453
l454
l455
l456
l457
l458
l459
l460
l461
l462
l463
l464
l465
l466
l467
l468
l469
l470
l471
l472
l473
l474
l475
l476
l477
l478
l479
l480
l481
l482
l483
l484
l485
l486
l487
l488
l489
l490
l491
l492
l493
l494
l495
l496
l497
l498
l499
l500
l501
l502
l503
l504
l505
l506
l507
l508
l509
l510
l511
l512
l513
l514
l515
l516
l517
l518
l519
l520
l521
l522
l523
l524
l525
l526
l527
l528
l529
l530
l531
l532
l533
l534
l535
l536
l537
l538
l539
l540
l541
l542
l543
l544
l545
l546
l547
l548
l549
l550
l551
l552
l553
l554
l555
l556
l557
l558
l559
l560
l561
l562
l563
l564
l565
l566
l567
l568
l569
l570
l571
l572
l573
l574
l575
l576
l577
l578
l579
l580
l581
l582
l583
l584
l585
l586
l587
l588
l589
l590
l591
l592
l593
l594
l595
l596
l597
l598
l599
l600
l601
l602
l603
l604
l605
l606
l607
l608
l609
l610
l611
l612
l613
l614
l615
l616
l617
l618
l619
l620
l621
l622
l623
l624
l625
l626
l627
l628
l629
l630
l631
l632
l633
l634
l635
l636
l637
l638
l639
l640
l641
l642
l643
l644
l645
l646
l647
l648
l649
l650
l651
l652
l653
l654
l655
l656
l657
l658
l659
l660
l661
l662
l663
l664
l665
l666
l667
l668
l669
l670
l671
l672
l673
l674
l675
l676
l677
l678
l679
l680
l681
l682
l683
l684
l685
l686
l687
l688
l689
l690
l691
l692
l693
l694
l695
l696
l697
l698
l699
l700
l701
l702
l703
l704
l705
l706
l707
l708
l709
l710
l711
l712
l713
l714
l715
l716
l717
l718
l719
l720
l721
l722
l723
l724
l725
l726
l727
l728
l729
l730
l731
l732
l733
l734
l735
l736
l737
l738
l739
l740
l741
l742
l743
l744
l745
l746
l747
l748
l749
l750
l751
l752
l753
l754
l755
l756
l757
l758
l759
l760
l761
l762
l763
l764
l765
l766
l767
l768
l769
l770
l771
l772
l773
l774
l775
l776
l777
l778
l779
l780
l781
l782
l783
l784
l785
l786
l787
l788
l789
l790
l791
l792
l793
l794
l795
l796
l797
l798
l799
l800
l801
l802
l803
l804
l805
l806
l807
l808
l809
l810
l811
l812
l813
l814
l815
l816
l817
l818
l819
l820
l821
l822
l823
l824
l825
l826
l827
l828
l829
l830
l831
l832
l833
l834
l835
l836
l837
l838
l839
l840
l841
l842
l843
l844
l845
l846
l847
l848
l849
l850
l851
l852
l853
l854
l855
l856
l857
l858
l859
l860
l861
l862
l863
l864
l865
l866
l867
l868
l869
l870
l871
l872
l873
l874
l875
l876
l877
l878
l879
l880
l881
l882
l883
l884
l885
l886
l887
l888
l889
l890
l891
l892
l893
l894
l895
l896
l897
l898
l899
l900
l901
l902
l903
l904
l905
l906
l907
l908
l909
l910
l911
l912
l913
l914
l915
l916
l917
l918
l919
l920
l921
l922
l923
l924
l925
l926
l927
l928
l929
l930
l931
l932
l933
l934
l935
l936
l937
l938
l939
l940
l941
l942
l943
l944
l945
l946
l947
l948
l949
l950
l951
l952
l953
l954
l955
l956
l957
l958
l959
l960
l961
l962
l963
l964
l965
l966
l967
l968
l969
l970
l971
l972
l973
l974
l975
l976
l977
l978
l979
l980
l981
l982
l983
l984
l985
l986
l987
l988
l989
l990
l991
l992
l993
l994
l995
l996
l997
l998
l999
l1000
l1001
l1002
l1003
l1004
l1005
l1006
l1007
l1008
l1009
l1010
l1011
l1012
l1013
l1014
l1015
l1016
l1017
l1018
l1019
l1020
l1021
l1022
l1023
l1024
l1025
l1026
l1027
l1028
l1029
l1030
l1031
l1032
l1033
l1034
l1035
l1036
l1037
l1038
l1039
l1040
l1041
l1042
l1043
l1044
l1045
l1046
l1047
l1048
l1049
l1050
l1051
l1052
l1053
l1054
l1055
l1056
l1057
l1058
l1059
l1060
l1061
l1062
l1063
l1064
l1065
l1066
l1067
l1068
l1069
l1070
l1071
l1072
l1073
l1074
l1075
l1076
l1077
l1078
l1079
l1080
l1081
l1082
l1083
l1084
l1085
l1086
l1087
l1088
l1089
l1090
l1091
l1092
l1093
l1094
l1095
l1096
l1097
l1098
l1099
l1100
l1101
l1102
l1103
l1104
l1105
l1106
l1107
l1108
l1109
l1110
l1111
l1112
l1113
l1114
l1115
l1116
l1117
l1118
l1119
l1120
l1121
l1122
l1123
l1124
l1125
l1126
l1127
l1128
l1129
l1130
l1131
l1132
l1133
l1134
l1135
l1136
l1137
l1138
l1139
l1140
l1141
l1142
l1143
l1144
l1145
l1146
l1147
l1148
l1149
l1150
l1151
l1152
l1153
l1154
l1155
l1156
l1157
l1158
l1159
l1160
l1161
l1162
l1163
l1164
l1165
l1166
l1167
l1168
l1169
l1170
l1171
l1172
l1173
l1174
l1175
l1176
l1177
l1178
l1179
l1180
l1181
l1182
l1183
l1184
l1185
l1186
l1187
l1188
l1189
l1190
l1191
l1192
l1193
l1194
l1195
l1196
l1197
l1198
l1199
l1200
l1201
l1202
l1203
l1204
l1205
l1206
l1207
l1208
l1209
l1210
l1211
l1212
l1213
l1214
l1215
l1216
l1217
l1218
l1219
l1220
l1221
l1222
l1223
l1224
l1225
l1226
l1227
l1228
l1229
l1230
l1231
l1232
l1233
l1234
l1235
l1236
l1237
l1238
l1239
l1240
l1241
l1242
l1243
l1244
l1245
l1246
l1247
l1248
l1249
l1250
l1251
l1252
l1253
l1254
l1255
l1256
l1257
l1258
l1259
l1260
l1261
l1262
l1263
l1264
l1265
l1266
l1267
l1268
l1269
l1270
l1271
l1272
l1273
l1274
l1275
l1276
l1277
l1278
l1279
l1280
l1281
l1282
l1283
l1284
l1285
l1286
l1287
l1288
l1289
l1290
l1291
l1292
l1293
l1294
l1295
l1296
l1297
l1298
l1299
l1300
l1301
l1302
l1303
l1304
l1305
l1306
l1307
l1308
l1309
l1310
l1311
l1312
l1313
l1314
l1315
l1316
l1317
l1318
l1319
l1320
l1321
l1322
l1323
l1324
l1325
l1326
l1327
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found 3580 constant places
check if there are places and transitions
ok
check if there are transitions without pre-places
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok


initing FirstDep: 0m 0.002sec

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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DBSingleClientW-PT-d2m08"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="marcie"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool marcie"
echo " Input is DBSingleClientW-PT-d2m08, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r097-tall-167814469400322"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DBSingleClientW-PT-d2m08.tgz
mv DBSingleClientW-PT-d2m08 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;