Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r071-smll-167814397500105.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is CircadianClock-PT-000010, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r071-smll-167814397500105
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 436K
-rw-r--r-- 1 mcc users 7.4K Feb 26 10:36 CTLCardinality.txt
-rw-r--r-- 1 mcc users 83K Feb 26 10:36 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K Feb 26 10:33 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 26 10:33 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 15:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 15:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 15:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 6.9K Feb 26 10:38 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 65K Feb 26 10:38 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 10:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 84K Feb 26 10:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 11K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CircadianClock-PT-000010-CTLCardinality-00
FORMULA_NAME CircadianClock-PT-000010-CTLCardinality-01
FORMULA_NAME CircadianClock-PT-000010-CTLCardinality-02
FORMULA_NAME CircadianClock-PT-000010-CTLCardinality-03
FORMULA_NAME CircadianClock-PT-000010-CTLCardinality-04
FORMULA_NAME CircadianClock-PT-000010-CTLCardinality-05
FORMULA_NAME CircadianClock-PT-000010-CTLCardinality-06
FORMULA_NAME CircadianClock-PT-000010-CTLCardinality-07
FORMULA_NAME CircadianClock-PT-000010-CTLCardinality-08
FORMULA_NAME CircadianClock-PT-000010-CTLCardinality-09
FORMULA_NAME CircadianClock-PT-000010-CTLCardinality-10
FORMULA_NAME CircadianClock-PT-000010-CTLCardinality-11
FORMULA_NAME CircadianClock-PT-000010-CTLCardinality-12
FORMULA_NAME CircadianClock-PT-000010-CTLCardinality-13
FORMULA_NAME CircadianClock-PT-000010-CTLCardinality-14
FORMULA_NAME CircadianClock-PT-000010-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678243616023

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=CircadianClock-PT-000010
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-08 02:46:58] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-08 02:46:58] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-08 02:46:58] [INFO ] Load time of PNML (sax parser for PT used): 48 ms
[2023-03-08 02:46:58] [INFO ] Transformed 14 places.
[2023-03-08 02:46:58] [INFO ] Transformed 16 transitions.
[2023-03-08 02:46:58] [INFO ] Parsed PT model containing 14 places and 16 transitions and 58 arcs in 366 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 20 ms.
Initial state reduction rules removed 3 formulas.
FORMULA CircadianClock-PT-000010-CTLCardinality-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA CircadianClock-PT-000010-CTLCardinality-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA CircadianClock-PT-000010-CTLCardinality-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 14 out of 14 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 16/16 transitions.
Applied a total of 0 rules in 13 ms. Remains 14 /14 variables (removed 0) and now considering 16/16 (removed 0) transitions.
[2023-03-08 02:46:58] [INFO ] Flow matrix only has 14 transitions (discarded 2 similar events)
// Phase 1: matrix 14 rows 14 cols
[2023-03-08 02:46:58] [INFO ] Computed 7 place invariants in 5 ms
[2023-03-08 02:46:59] [INFO ] Implicit Places using invariants in 186 ms returned []
[2023-03-08 02:46:59] [INFO ] Flow matrix only has 14 transitions (discarded 2 similar events)
[2023-03-08 02:46:59] [INFO ] Invariant cache hit.
[2023-03-08 02:46:59] [INFO ] State equation strengthened by 2 read => feed constraints.
[2023-03-08 02:46:59] [INFO ] Implicit Places using invariants and state equation in 55 ms returned []
Implicit Place search using SMT with State Equation took 286 ms to find 0 implicit places.
[2023-03-08 02:46:59] [INFO ] Flow matrix only has 14 transitions (discarded 2 similar events)
[2023-03-08 02:46:59] [INFO ] Invariant cache hit.
[2023-03-08 02:46:59] [INFO ] Dead Transitions using invariants and state equation in 43 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 345 ms. Remains : 14/14 places, 16/16 transitions.
Support contains 14 out of 14 places after structural reductions.
[2023-03-08 02:46:59] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-08 02:46:59] [INFO ] Flatten gal took : 23 ms
FORMULA CircadianClock-PT-000010-CTLCardinality-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-08 02:46:59] [INFO ] Flatten gal took : 7 ms
[2023-03-08 02:46:59] [INFO ] Input system was already deterministic with 16 transitions.
Incomplete random walk after 10002 steps, including 2 resets, run finished after 384 ms. (steps per millisecond=26 ) properties (out of 66) seen :48
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 18) seen :0
Running SMT prover for 18 properties.
[2023-03-08 02:47:00] [INFO ] Flow matrix only has 14 transitions (discarded 2 similar events)
[2023-03-08 02:47:00] [INFO ] Invariant cache hit.
[2023-03-08 02:47:00] [INFO ] [Real]Absence check using 7 positive place invariants in 2 ms returned sat
[2023-03-08 02:47:00] [INFO ] After 96ms SMT Verify possible using all constraints in real domain returned unsat :14 sat :0 real:4
[2023-03-08 02:47:00] [INFO ] [Nat]Absence check using 7 positive place invariants in 2 ms returned sat
[2023-03-08 02:47:00] [INFO ] After 65ms SMT Verify possible using all constraints in natural domain returned unsat :18 sat :0
Fused 18 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 18 atomic propositions for a total of 12 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA CircadianClock-PT-000010-CTLCardinality-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 7 ms
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 4 ms
[2023-03-08 02:47:00] [INFO ] Input system was already deterministic with 16 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 14/14 places, 16/16 transitions.
Applied a total of 0 rules in 7 ms. Remains 14 /14 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 14/14 places, 16/16 transitions.
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 3 ms
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 3 ms
[2023-03-08 02:47:00] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 14/14 places, 16/16 transitions.
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 3 ms
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 3 ms
[2023-03-08 02:47:00] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 16/16 transitions.
Applied a total of 0 rules in 0 ms. Remains 14 /14 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 14/14 places, 16/16 transitions.
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 2 ms
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 2 ms
[2023-03-08 02:47:00] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 14/14 places, 16/16 transitions.
Applied a total of 0 rules in 2 ms. Remains 14 /14 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 14/14 places, 16/16 transitions.
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 2 ms
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 2 ms
[2023-03-08 02:47:00] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 16/16 transitions.
Applied a total of 0 rules in 0 ms. Remains 14 /14 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 14/14 places, 16/16 transitions.
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 2 ms
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 2 ms
[2023-03-08 02:47:00] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 14/14 places, 16/16 transitions.
Applied a total of 0 rules in 2 ms. Remains 14 /14 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 14/14 places, 16/16 transitions.
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 2 ms
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 2 ms
[2023-03-08 02:47:00] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 16/16 transitions.
Applied a total of 0 rules in 0 ms. Remains 14 /14 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 14/14 places, 16/16 transitions.
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 2 ms
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 2 ms
[2023-03-08 02:47:00] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 14/14 places, 16/16 transitions.
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 2 ms
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 3 ms
[2023-03-08 02:47:00] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 16/16 transitions.
Applied a total of 0 rules in 0 ms. Remains 14 /14 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 14/14 places, 16/16 transitions.
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 2 ms
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 4 ms
[2023-03-08 02:47:00] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 14/14 places, 16/16 transitions.
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 1 ms
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 2 ms
[2023-03-08 02:47:00] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 14/14 places, 16/16 transitions.
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 2 ms
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 2 ms
[2023-03-08 02:47:00] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 2 ms
[2023-03-08 02:47:00] [INFO ] Flatten gal took : 2 ms
[2023-03-08 02:47:00] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 2 ms.
[2023-03-08 02:47:00] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 14 places, 16 transitions and 58 arcs took 0 ms.
Total runtime 2328 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT CircadianClock-PT-000010
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375

FORMULA CircadianClock-PT-000010-CTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CircadianClock-PT-000010-CTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CircadianClock-PT-000010-CTLCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CircadianClock-PT-000010-CTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CircadianClock-PT-000010-CTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CircadianClock-PT-000010-CTLCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CircadianClock-PT-000010-CTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CircadianClock-PT-000010-CTLCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CircadianClock-PT-000010-CTLCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CircadianClock-PT-000010-CTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CircadianClock-PT-000010-CTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678243703395

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 1 (type EXCL) for 0 CircadianClock-PT-000010-CTLCardinality-00
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
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lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
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1 CTL EXCL 5/276 3/32 CircadianClock-PT-000010-CTLCardinality-00 570332 m, 114066 m/sec, 6795418 t fired, .

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lola: fired transitions : 8727259
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CircadianClock-PT-000010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-13: DISJ 0 1 0 0 7 0 0 1

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29 CTL EXCL 4/326 2/32 CircadianClock-PT-000010-CTLCardinality-09 450730 m, 90146 m/sec, 4247224 t fired, .

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CircadianClock-PT-000010-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
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26 CTL EXCL 1/358 1/32 CircadianClock-PT-000010-CTLCardinality-07 18328 m, 3665 m/sec, 494920 t fired, .

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26 CTL EXCL 6/358 1/32 CircadianClock-PT-000010-CTLCardinality-07 130038 m, 22342 m/sec, 7153190 t fired, .

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26 CTL EXCL 11/358 1/32 CircadianClock-PT-000010-CTLCardinality-07 208331 m, 15658 m/sec, 13419049 t fired, .

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CircadianClock-PT-000010-CTLCardinality-03: CONJ 0 2 0 0 2 0 0 0
CircadianClock-PT-000010-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
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26 CTL EXCL 16/358 2/32 CircadianClock-PT-000010-CTLCardinality-07 275705 m, 13474 m/sec, 19535990 t fired, .

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CircadianClock-PT-000010-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
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26 CTL EXCL 21/358 2/32 CircadianClock-PT-000010-CTLCardinality-07 334186 m, 11696 m/sec, 25518831 t fired, .

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CircadianClock-PT-000010-CTLCardinality-03: CONJ 0 2 0 0 2 0 0 0
CircadianClock-PT-000010-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-07: CTL 0 0 1 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-13: DISJ 0 1 0 0 7 0 0 1

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26 CTL EXCL 26/358 2/32 CircadianClock-PT-000010-CTLCardinality-07 387469 m, 10656 m/sec, 31444708 t fired, .

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CircadianClock-PT-000010-CTLCardinality-03: CONJ 0 2 0 0 2 0 0 0
CircadianClock-PT-000010-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-07: CTL 0 0 1 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
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26 CTL EXCL 31/358 2/32 CircadianClock-PT-000010-CTLCardinality-07 437297 m, 9965 m/sec, 37356783 t fired, .

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CircadianClock-PT-000010-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
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CircadianClock-PT-000010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
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26 CTL EXCL 36/358 2/32 CircadianClock-PT-000010-CTLCardinality-07 480850 m, 8710 m/sec, 43384662 t fired, .

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CircadianClock-PT-000010-CTLCardinality-03: CONJ 0 2 0 0 2 0 0 0
CircadianClock-PT-000010-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
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CircadianClock-PT-000010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-13: DISJ 0 1 0 0 7 0 0 1

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26 CTL EXCL 41/358 3/32 CircadianClock-PT-000010-CTLCardinality-07 511953 m, 6220 m/sec, 49205586 t fired, .

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lola: markings : 515726
lola: fired transitions : 50794084
lola: time used : 42.000000
lola: memory pages used : 3
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lola: result : true
lola: markings : 3403
lola: fired transitions : 11232
lola: time used : 0.000000
lola: memory pages used : 1
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CircadianClock-PT-000010-CTLCardinality-03: CONJ 0 2 0 0 2 0 0 0
CircadianClock-PT-000010-CTLCardinality-04: CTL 0 0 1 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-13: DISJ 0 1 0 0 7 0 0 1

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17 CTL EXCL 4/442 3/32 CircadianClock-PT-000010-CTLCardinality-04 643555 m, 128711 m/sec, 4210872 t fired, .

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lola: markings : 644204
lola: fired transitions : 6766320
lola: time used : 5.000000
lola: memory pages used : 3
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lola: result : true
lola: markings : 167576
lola: fired transitions : 720900
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 CircadianClock-PT-000010-CTLCardinality-01
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lola: result : false
lola: markings : 1846
lola: fired transitions : 5694
lola: time used : 0.000000
lola: memory pages used : 1
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CircadianClock-PT-000010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-13: DISJ 0 1 0 0 7 0 0 1

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
12 AGEF EXCL 3/707 3/32 CircadianClock-PT-000010-CTLCardinality-03 642575 m, 128515 m/sec, 4090115 t fired, .

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# running tasks: 1 of 4 Visible: 11
lola: FINISHED task # 12 (type EXCL) for CircadianClock-PT-000010-CTLCardinality-03
lola: result : true
lola: markings : 642873
lola: fired transitions : 5196574
lola: time used : 3.000000
lola: memory pages used : 3
lola: LAUNCH task # 14 (type EXCL) for 9 CircadianClock-PT-000010-CTLCardinality-03
lola: time limit : 883 sec
lola: memory limit: 32 pages
lola: FINISHED task # 14 (type EXCL) for CircadianClock-PT-000010-CTLCardinality-03
lola: result : true
lola: markings : 642511
lola: fired transitions : 4966061
lola: time used : 3.000000
lola: memory pages used : 3
lola: LAUNCH task # 41 (type EXCL) for 34 CircadianClock-PT-000010-CTLCardinality-13
lola: time limit : 1177 sec
lola: memory limit: 32 pages
lola: FINISHED task # 41 (type EXCL) for CircadianClock-PT-000010-CTLCardinality-13
lola: result : false
lola: markings : 2
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 20 (type EXCL) for 19 CircadianClock-PT-000010-CTLCardinality-05
lola: time limit : 1765 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircadianClock-PT-000010-CTLCardinality-00: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-01: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-02: CTL true CTL model checker
CircadianClock-PT-000010-CTLCardinality-03: CONJ true CONJ
CircadianClock-PT-000010-CTLCardinality-04: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-06: CTL true CTL model checker
CircadianClock-PT-000010-CTLCardinality-07: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-09: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-13: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircadianClock-PT-000010-CTLCardinality-05: CTL 0 0 1 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 CTL EXCL 2/1765 1/32 CircadianClock-PT-000010-CTLCardinality-05 197103 m, 39420 m/sec, 1369541 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircadianClock-PT-000010-CTLCardinality-00: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-01: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-02: CTL true CTL model checker
CircadianClock-PT-000010-CTLCardinality-03: CONJ true CONJ
CircadianClock-PT-000010-CTLCardinality-04: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-06: CTL true CTL model checker
CircadianClock-PT-000010-CTLCardinality-07: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-09: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-13: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircadianClock-PT-000010-CTLCardinality-05: CTL 0 0 1 0 1 0 0 0
CircadianClock-PT-000010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 CTL EXCL 7/1765 3/32 CircadianClock-PT-000010-CTLCardinality-05 643939 m, 89367 m/sec, 7291530 t fired, .

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# running tasks: 1 of 4 Visible: 11
lola: FINISHED task # 20 (type EXCL) for CircadianClock-PT-000010-CTLCardinality-05
lola: result : false
lola: markings : 644204
lola: fired transitions : 8475333
lola: time used : 7.000000
lola: memory pages used : 3
lola: LAUNCH task # 32 (type EXCL) for 31 CircadianClock-PT-000010-CTLCardinality-10
lola: time limit : 3524 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircadianClock-PT-000010-CTLCardinality-00: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-01: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-02: CTL true CTL model checker
CircadianClock-PT-000010-CTLCardinality-03: CONJ true CONJ
CircadianClock-PT-000010-CTLCardinality-04: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-05: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-06: CTL true CTL model checker
CircadianClock-PT-000010-CTLCardinality-07: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-09: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-13: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircadianClock-PT-000010-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 5/3524 3/32 CircadianClock-PT-000010-CTLCardinality-10 643784 m, 128756 m/sec, 5714849 t fired, .

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# running tasks: 1 of 4 Visible: 11
lola: FINISHED task # 32 (type EXCL) for CircadianClock-PT-000010-CTLCardinality-10
lola: result : true
lola: markings : 644204
lola: fired transitions : 7527652
lola: time used : 6.000000
lola: memory pages used : 3
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircadianClock-PT-000010-CTLCardinality-00: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-01: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-02: CTL true CTL model checker
CircadianClock-PT-000010-CTLCardinality-03: CONJ true CONJ
CircadianClock-PT-000010-CTLCardinality-04: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-05: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-06: CTL true CTL model checker
CircadianClock-PT-000010-CTLCardinality-07: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-09: CTL false CTL model checker
CircadianClock-PT-000010-CTLCardinality-10: CTL true CTL model checker
CircadianClock-PT-000010-CTLCardinality-13: DISJ false DISJ


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CircadianClock-PT-000010"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is CircadianClock-PT-000010, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r071-smll-167814397500105"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CircadianClock-PT-000010.tgz
mv CircadianClock-PT-000010 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;