fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r071-smll-167814397400010
Last Updated
May 14, 2023

About the Execution of LoLa+red for CSRepetitions-COL-03

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1233.743 149059.00 152361.00 1160.80 TTF?TTFTTTTTFTTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r071-smll-167814397400010.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is CSRepetitions-COL-03, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r071-smll-167814397400010
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 452K
-rw-r--r-- 1 mcc users 11K Feb 25 11:53 CTLCardinality.txt
-rw-r--r-- 1 mcc users 92K Feb 25 11:53 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K Feb 25 11:51 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K Feb 25 11:51 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.4K Feb 25 15:41 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 15:41 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 15:41 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:41 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.8K Feb 25 11:56 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 75K Feb 25 11:56 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 11:55 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Feb 25 11:55 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 15:41 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 15:41 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 3 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 14K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CSRepetitions-COL-03-CTLFireability-00
FORMULA_NAME CSRepetitions-COL-03-CTLFireability-01
FORMULA_NAME CSRepetitions-COL-03-CTLFireability-02
FORMULA_NAME CSRepetitions-COL-03-CTLFireability-03
FORMULA_NAME CSRepetitions-COL-03-CTLFireability-04
FORMULA_NAME CSRepetitions-COL-03-CTLFireability-05
FORMULA_NAME CSRepetitions-COL-03-CTLFireability-06
FORMULA_NAME CSRepetitions-COL-03-CTLFireability-07
FORMULA_NAME CSRepetitions-COL-03-CTLFireability-08
FORMULA_NAME CSRepetitions-COL-03-CTLFireability-09
FORMULA_NAME CSRepetitions-COL-03-CTLFireability-10
FORMULA_NAME CSRepetitions-COL-03-CTLFireability-11
FORMULA_NAME CSRepetitions-COL-03-CTLFireability-12
FORMULA_NAME CSRepetitions-COL-03-CTLFireability-13
FORMULA_NAME CSRepetitions-COL-03-CTLFireability-14
FORMULA_NAME CSRepetitions-COL-03-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678218731344

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=CSRepetitions-COL-03
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-07 19:52:14] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-07 19:52:14] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-07 19:52:14] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-07 19:52:15] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-07 19:52:15] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 871 ms
[2023-03-07 19:52:15] [INFO ] Imported 6 HL places and 5 HL transitions for a total of 58 PT places and 81.0 transition bindings in 27 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 30 ms.
[2023-03-07 19:52:15] [INFO ] Built PT skeleton of HLPN with 6 places and 5 transitions 15 arcs in 7 ms.
[2023-03-07 19:52:15] [INFO ] Skeletonized 16 HLPN properties in 5 ms.
Computed a total of 0 stabilizing places and 1 stable transitions
Remains 4 properties that can be checked using skeleton over-approximation.
Computed a total of 0 stabilizing places and 1 stable transitions
Finished random walk after 53 steps, including 2 resets, run visited all 4 properties in 13 ms. (steps per millisecond=4 )
[2023-03-07 19:52:16] [INFO ] Flatten gal took : 24 ms
[2023-03-07 19:52:16] [INFO ] Flatten gal took : 3 ms
Transition Send_Answer forces synchronizations/join behavior on parameter c of sort Client
Symmetric sort wr.t. initial and guards and successors and join/free detected :Server
Symmetric sort wr.t. initial detected :Server
Symmetric sort wr.t. initial and guards detected :Server
Applying symmetric unfolding of full symmetric sort :Server domain size was 3
[2023-03-07 19:52:16] [INFO ] Unfolded HLPN to a Petri net with 38 places and 45 transitions 135 arcs in 16 ms.
[2023-03-07 19:52:16] [INFO ] Unfolded 16 HLPN properties in 1 ms.
Support contains 38 out of 38 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 45/45 transitions.
Applied a total of 0 rules in 11 ms. Remains 38 /38 variables (removed 0) and now considering 45/45 (removed 0) transitions.
// Phase 1: matrix 45 rows 38 cols
[2023-03-07 19:52:16] [INFO ] Computed 10 place invariants in 9 ms
[2023-03-07 19:52:16] [INFO ] Implicit Places using invariants in 259 ms returned []
[2023-03-07 19:52:16] [INFO ] Invariant cache hit.
[2023-03-07 19:52:16] [INFO ] State equation strengthened by 9 read => feed constraints.
[2023-03-07 19:52:16] [INFO ] Implicit Places using invariants and state equation in 132 ms returned []
Implicit Place search using SMT with State Equation took 448 ms to find 0 implicit places.
[2023-03-07 19:52:16] [INFO ] Invariant cache hit.
[2023-03-07 19:52:16] [INFO ] Dead Transitions using invariants and state equation in 126 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 587 ms. Remains : 38/38 places, 45/45 transitions.
Support contains 38 out of 38 places after structural reductions.
[2023-03-07 19:52:16] [INFO ] Flatten gal took : 32 ms
[2023-03-07 19:52:16] [INFO ] Flatten gal took : 28 ms
[2023-03-07 19:52:17] [INFO ] Input system was already deterministic with 45 transitions.
Finished random walk after 236 steps, including 8 resets, run visited all 25 properties in 17 ms. (steps per millisecond=13 )
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 12 ms
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 25 ms
[2023-03-07 19:52:17] [INFO ] Input system was already deterministic with 45 transitions.
Computed a total of 0 stabilizing places and 9 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 45/45 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 38/38 places, 45/45 transitions.
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 5 ms
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 8 ms
[2023-03-07 19:52:17] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 45/45 transitions.
Applied a total of 0 rules in 10 ms. Remains 38 /38 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 38/38 places, 45/45 transitions.
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 4 ms
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 5 ms
[2023-03-07 19:52:17] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 45/45 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 45/45 transitions.
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 4 ms
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 5 ms
[2023-03-07 19:52:17] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 45/45 transitions.
Applied a total of 0 rules in 4 ms. Remains 38 /38 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 38/38 places, 45/45 transitions.
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 4 ms
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 5 ms
[2023-03-07 19:52:17] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 45/45 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 45/45 transitions.
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 4 ms
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 6 ms
[2023-03-07 19:52:17] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 45/45 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 45/45 transitions.
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 3 ms
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 4 ms
[2023-03-07 19:52:17] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 45/45 transitions.
Applied a total of 0 rules in 0 ms. Remains 38 /38 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 45/45 transitions.
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 4 ms
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 5 ms
[2023-03-07 19:52:17] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 45/45 transitions.
Applied a total of 0 rules in 3 ms. Remains 38 /38 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 38/38 places, 45/45 transitions.
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 4 ms
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 4 ms
[2023-03-07 19:52:17] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 45/45 transitions.
Applied a total of 0 rules in 0 ms. Remains 38 /38 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 38/38 places, 45/45 transitions.
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 3 ms
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 5 ms
[2023-03-07 19:52:17] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 45/45 transitions.
Applied a total of 0 rules in 3 ms. Remains 38 /38 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 38/38 places, 45/45 transitions.
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 4 ms
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 5 ms
[2023-03-07 19:52:17] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 45/45 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 45/45 transitions.
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 4 ms
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 5 ms
[2023-03-07 19:52:17] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 45/45 transitions.
Applied a total of 0 rules in 2 ms. Remains 38 /38 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 38/38 places, 45/45 transitions.
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 3 ms
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 5 ms
[2023-03-07 19:52:17] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 45/45 transitions.
Applied a total of 0 rules in 0 ms. Remains 38 /38 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 45/45 transitions.
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 4 ms
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 5 ms
[2023-03-07 19:52:17] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 45/45 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 45/45 transitions.
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 4 ms
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 4 ms
[2023-03-07 19:52:17] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 45/45 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 45/45 transitions.
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 4 ms
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 5 ms
[2023-03-07 19:52:17] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 45/45 transitions.
Applied a total of 0 rules in 3 ms. Remains 38 /38 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 38/38 places, 45/45 transitions.
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 3 ms
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 4 ms
[2023-03-07 19:52:17] [INFO ] Input system was already deterministic with 45 transitions.
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 11 ms
[2023-03-07 19:52:17] [INFO ] Flatten gal took : 14 ms
[2023-03-07 19:52:18] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 15 ms.
[2023-03-07 19:52:18] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 38 places, 45 transitions and 135 arcs took 1 ms.
Total runtime 3292 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT CSRepetitions-COL-03
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/376
CTLFireability

FORMULA CSRepetitions-COL-03-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CSRepetitions-COL-03-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CSRepetitions-COL-03-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CSRepetitions-COL-03-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CSRepetitions-COL-03-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CSRepetitions-COL-03-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CSRepetitions-COL-03-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CSRepetitions-COL-03-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CSRepetitions-COL-03-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CSRepetitions-COL-03-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CSRepetitions-COL-03-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CSRepetitions-COL-03-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CSRepetitions-COL-03-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CSRepetitions-COL-03-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CSRepetitions-COL-03-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678218880403

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/376/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/376/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/376/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
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lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
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lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 7 (type EXCL) for 6 CSRepetitions-COL-03-CTLFireability-02
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
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lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 7 (type EXCL) for CSRepetitions-COL-03-CTLFireability-02
lola: result : false
lola: markings : 5764
lola: fired transitions : 13716
lola: time used : 0.000000
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lola: LAUNCH task # 47 (type EXCL) for 46 CSRepetitions-COL-03-CTLFireability-14
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lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 47 (type EXCL) for CSRepetitions-COL-03-CTLFireability-14
lola: result : true
lola: markings : 285
lola: fired transitions : 1626
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lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 44 (type EXCL) for CSRepetitions-COL-03-CTLFireability-13
lola: result : true
lola: markings : 478
lola: fired transitions : 3658
lola: time used : 0.000000
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lola: FINISHED task # 41 (type EXCL) for CSRepetitions-COL-03-CTLFireability-12
lola: result : false
lola: markings : 110
lola: fired transitions : 143
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lola: LAUNCH task # 35 (type EXCL) for 34 CSRepetitions-COL-03-CTLFireability-10
lola: time limit : 276 sec
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lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: FINISHED task # 35 (type EXCL) for CSRepetitions-COL-03-CTLFireability-10
lola: result : true
lola: markings : 104
lola: fired transitions : 273
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lola: FINISHED task # 29 (type EXCL) for CSRepetitions-COL-03-CTLFireability-08
lola: result : true
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CSRepetitions-COL-03-CTLFireability-02: CTL false CTL model checker
CSRepetitions-COL-03-CTLFireability-08: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-10: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-12: CTL false CTL model checker
CSRepetitions-COL-03-CTLFireability-13: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CSRepetitions-COL-03-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CSRepetitions-COL-03-CTLFireability-01: EG 0 1 0 0 1 0 0 0
CSRepetitions-COL-03-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CSRepetitions-COL-03-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CSRepetitions-COL-03-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
CSRepetitions-COL-03-CTLFireability-06: CONJ 0 1 1 0 2 0 0 0
CSRepetitions-COL-03-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CSRepetitions-COL-03-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
CSRepetitions-COL-03-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CSRepetitions-COL-03-CTLFireability-15: AGEF 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 5/327 3/32 CSRepetitions-COL-03-CTLFireability-06 606716 m, 121343 m/sec, 3211105 t fired, .

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lola: result : true
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lola: result : true
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lola: fired transitions : 138
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lola: LAUNCH task # 1 (type EXCL) for 0 CSRepetitions-COL-03-CTLFireability-00
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lola: FINISHED task # 1 (type EXCL) for CSRepetitions-COL-03-CTLFireability-00
lola: result : true
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lola: result : false
lola: markings : 61
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lola: result : true
lola: markings : 16
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lola: FINISHED task # 26 (type EXCL) for CSRepetitions-COL-03-CTLFireability-07
lola: result : true
lola: markings : 11313
lola: fired transitions : 18871
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lola: time limit : 1196 sec
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CSRepetitions-COL-03-CTLFireability-00: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-01: EG true state space / EG
CSRepetitions-COL-03-CTLFireability-02: CTL false CTL model checker
CSRepetitions-COL-03-CTLFireability-04: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-05: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-06: CONJ false CTL model checker
CSRepetitions-COL-03-CTLFireability-07: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-08: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-10: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-12: CTL false CTL model checker
CSRepetitions-COL-03-CTLFireability-13: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-14: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-15: AGEF false tscc_search

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CSRepetitions-COL-03-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
CSRepetitions-COL-03-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
CSRepetitions-COL-03-CTLFireability-11: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 1/1196 1/32 CSRepetitions-COL-03-CTLFireability-03 108722 m, 21744 m/sec, 895188 t fired, .

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CSRepetitions-COL-03-CTLFireability-00: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-01: EG true state space / EG
CSRepetitions-COL-03-CTLFireability-02: CTL false CTL model checker
CSRepetitions-COL-03-CTLFireability-04: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-05: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-06: CONJ false CTL model checker
CSRepetitions-COL-03-CTLFireability-07: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-08: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-10: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-12: CTL false CTL model checker
CSRepetitions-COL-03-CTLFireability-13: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-14: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-15: AGEF false tscc_search

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CSRepetitions-COL-03-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
CSRepetitions-COL-03-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
CSRepetitions-COL-03-CTLFireability-11: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 6/1196 3/32 CSRepetitions-COL-03-CTLFireability-03 578857 m, 94027 m/sec, 5592214 t fired, .

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CSRepetitions-COL-03-CTLFireability-00: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-01: EG true state space / EG
CSRepetitions-COL-03-CTLFireability-02: CTL false CTL model checker
CSRepetitions-COL-03-CTLFireability-04: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-05: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-06: CONJ false CTL model checker
CSRepetitions-COL-03-CTLFireability-07: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-08: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-10: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-12: CTL false CTL model checker
CSRepetitions-COL-03-CTLFireability-13: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-14: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-15: AGEF false tscc_search

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CSRepetitions-COL-03-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
CSRepetitions-COL-03-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
CSRepetitions-COL-03-CTLFireability-11: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 11/1196 4/32 CSRepetitions-COL-03-CTLFireability-03 872098 m, 58648 m/sec, 9999438 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CSRepetitions-COL-03-CTLFireability-00: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-01: EG true state space / EG
CSRepetitions-COL-03-CTLFireability-02: CTL false CTL model checker
CSRepetitions-COL-03-CTLFireability-04: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-05: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-06: CONJ false CTL model checker
CSRepetitions-COL-03-CTLFireability-07: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-08: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-10: CTL true CTL model checker
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CSRepetitions-COL-03-CTLFireability-12: CTL false CTL model checker
CSRepetitions-COL-03-CTLFireability-13: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-14: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-15: AGEF false tscc_search

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10 CTL EXCL 91/1196 26/32 CSRepetitions-COL-03-CTLFireability-03 6219651 m, 25663 m/sec, 65170796 t fired, .

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10 CTL EXCL 96/1196 26/32 CSRepetitions-COL-03-CTLFireability-03 6242315 m, 4532 m/sec, 67855198 t fired, .

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CSRepetitions-COL-03-CTLFireability-04: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-05: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-06: CONJ false CTL model checker
CSRepetitions-COL-03-CTLFireability-07: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-08: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-10: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-12: CTL false CTL model checker
CSRepetitions-COL-03-CTLFireability-13: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-14: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-15: AGEF false tscc_search

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10 CTL EXCL 101/1196 26/32 CSRepetitions-COL-03-CTLFireability-03 6268641 m, 5265 m/sec, 70562795 t fired, .

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CSRepetitions-COL-03-CTLFireability-10: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-12: CTL false CTL model checker
CSRepetitions-COL-03-CTLFireability-13: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-14: CTL true CTL model checker
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10 CTL EXCL 106/1196 26/32 CSRepetitions-COL-03-CTLFireability-03 6288219 m, 3915 m/sec, 73419578 t fired, .

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CSRepetitions-COL-03-CTLFireability-05: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-06: CONJ false CTL model checker
CSRepetitions-COL-03-CTLFireability-07: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-08: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-10: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-12: CTL false CTL model checker
CSRepetitions-COL-03-CTLFireability-13: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-14: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-15: AGEF false tscc_search

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10 CTL EXCL 111/1196 26/32 CSRepetitions-COL-03-CTLFireability-03 6292115 m, 779 m/sec, 76759715 t fired, .

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CSRepetitions-COL-03-CTLFireability-02: CTL false CTL model checker
CSRepetitions-COL-03-CTLFireability-04: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-05: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-06: CONJ false CTL model checker
CSRepetitions-COL-03-CTLFireability-07: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-08: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-10: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-12: CTL false CTL model checker
CSRepetitions-COL-03-CTLFireability-13: CTL true CTL model checker
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10 CTL EXCL 116/1196 28/32 CSRepetitions-COL-03-CTLFireability-03 6788808 m, 99338 m/sec, 80344575 t fired, .

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CSRepetitions-COL-03-CTLFireability-05: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-06: CONJ false CTL model checker
CSRepetitions-COL-03-CTLFireability-07: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-08: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-10: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-12: CTL false CTL model checker
CSRepetitions-COL-03-CTLFireability-13: CTL true CTL model checker
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10 CTL EXCL 121/1196 30/32 CSRepetitions-COL-03-CTLFireability-03 7239014 m, 90041 m/sec, 83737490 t fired, .

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CSRepetitions-COL-03-CTLFireability-04: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-05: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-06: CONJ false CTL model checker
CSRepetitions-COL-03-CTLFireability-07: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-08: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-10: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-12: CTL false CTL model checker
CSRepetitions-COL-03-CTLFireability-13: CTL true CTL model checker
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10 CTL EXCL 126/1196 32/32 CSRepetitions-COL-03-CTLFireability-03 7664019 m, 85001 m/sec, 87029942 t fired, .

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CSRepetitions-COL-03-CTLFireability-04: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-05: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-06: CONJ false CTL model checker
CSRepetitions-COL-03-CTLFireability-07: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-08: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-10: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-12: CTL false CTL model checker
CSRepetitions-COL-03-CTLFireability-13: CTL true CTL model checker
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lola: result : true
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lola: result : true
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CSRepetitions-COL-03-CTLFireability-00: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-01: EG true state space / EG
CSRepetitions-COL-03-CTLFireability-02: CTL false CTL model checker
CSRepetitions-COL-03-CTLFireability-03: CTL unknown AGGR
CSRepetitions-COL-03-CTLFireability-04: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-05: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-06: CONJ false CTL model checker
CSRepetitions-COL-03-CTLFireability-07: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-08: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-09: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-10: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-11: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-12: CTL false CTL model checker
CSRepetitions-COL-03-CTLFireability-13: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-14: CTL true CTL model checker
CSRepetitions-COL-03-CTLFireability-15: AGEF false tscc_search


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CSRepetitions-COL-03"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is CSRepetitions-COL-03, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r071-smll-167814397400010"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CSRepetitions-COL-03.tgz
mv CSRepetitions-COL-03 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;