About the Execution of LoLA for CircularTrains-PT-096
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 4347.876 | 510655.00 | 483335.00 | 7913.00 | F???F???TT?F???? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r070-smll-167814396800170.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is CircularTrains-PT-096, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r070-smll-167814396800170
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 540K
-rw-r--r-- 1 mcc users 6.0K Feb 26 04:32 CTLCardinality.txt
-rw-r--r-- 1 mcc users 60K Feb 26 04:32 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K Feb 26 04:31 CTLFireability.txt
-rw-r--r-- 1 mcc users 54K Feb 26 04:31 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 15:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 25 15:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 15:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 04:33 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 131K Feb 26 04:33 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 04:33 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 82K Feb 26 04:33 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 73K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME CircularTrains-PT-096-CTLFireability-00
FORMULA_NAME CircularTrains-PT-096-CTLFireability-01
FORMULA_NAME CircularTrains-PT-096-CTLFireability-02
FORMULA_NAME CircularTrains-PT-096-CTLFireability-03
FORMULA_NAME CircularTrains-PT-096-CTLFireability-04
FORMULA_NAME CircularTrains-PT-096-CTLFireability-05
FORMULA_NAME CircularTrains-PT-096-CTLFireability-06
FORMULA_NAME CircularTrains-PT-096-CTLFireability-07
FORMULA_NAME CircularTrains-PT-096-CTLFireability-08
FORMULA_NAME CircularTrains-PT-096-CTLFireability-09
FORMULA_NAME CircularTrains-PT-096-CTLFireability-10
FORMULA_NAME CircularTrains-PT-096-CTLFireability-11
FORMULA_NAME CircularTrains-PT-096-CTLFireability-12
FORMULA_NAME CircularTrains-PT-096-CTLFireability-13
FORMULA_NAME CircularTrains-PT-096-CTLFireability-14
FORMULA_NAME CircularTrains-PT-096-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678284218796
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=CircularTrains-PT-096
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT CircularTrains-PT-096
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability
FORMULA CircularTrains-PT-096-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CircularTrains-PT-096-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CircularTrains-PT-096-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CircularTrains-PT-096-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CircularTrains-PT-096-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678284729451
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 34 (type EXCL) for 31 CircularTrains-PT-096-CTLFireability-09
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 34 (type EXCL) for CircularTrains-PT-096-CTLFireability-09
lola: result : false
lola: markings : 4483
lola: fired transitions : 4514
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 16 (type EXCL) for 15 CircularTrains-PT-096-CTLFireability-05
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 4/211 5/32 CircularTrains-PT-096-CTLFireability-05 975083 m, 195016 m/sec, 2386684 t fired, .
Time elapsed: 5 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 9/211 9/32 CircularTrains-PT-096-CTLFireability-05 1976240 m, 200231 m/sec, 4994490 t fired, .
Time elapsed: 10 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 14/211 14/32 CircularTrains-PT-096-CTLFireability-05 2924452 m, 189642 m/sec, 7506982 t fired, .
Time elapsed: 15 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 19/211 18/32 CircularTrains-PT-096-CTLFireability-05 3845926 m, 184294 m/sec, 9949147 t fired, .
Time elapsed: 20 secs. Pages in use: 18
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 24/211 22/32 CircularTrains-PT-096-CTLFireability-05 4738712 m, 178557 m/sec, 12339316 t fired, .
Time elapsed: 25 secs. Pages in use: 22
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 29/211 25/32 CircularTrains-PT-096-CTLFireability-05 5541717 m, 160601 m/sec, 14512697 t fired, .
Time elapsed: 30 secs. Pages in use: 25
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 34/211 29/32 CircularTrains-PT-096-CTLFireability-05 6375475 m, 166751 m/sec, 16769972 t fired, .
Time elapsed: 35 secs. Pages in use: 29
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 39/211 32/32 CircularTrains-PT-096-CTLFireability-05 7226808 m, 170266 m/sec, 19095192 t fired, .
Time elapsed: 40 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 16 (type EXCL) for CircularTrains-PT-096-CTLFireability-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 45 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 54 (type EXCL) for 53 CircularTrains-PT-096-CTLFireability-15
lola: time limit : 222 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
54 CTL EXCL 5/222 5/32 CircularTrains-PT-096-CTLFireability-15 863656 m, 172731 m/sec, 3071922 t fired, .
Time elapsed: 50 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
54 CTL EXCL 10/222 9/32 CircularTrains-PT-096-CTLFireability-15 1650831 m, 157435 m/sec, 6261856 t fired, .
Time elapsed: 55 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
54 CTL EXCL 15/222 13/32 CircularTrains-PT-096-CTLFireability-15 2475249 m, 164883 m/sec, 9457767 t fired, .
Time elapsed: 61 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
54 CTL EXCL 21/222 17/32 CircularTrains-PT-096-CTLFireability-15 3272918 m, 159533 m/sec, 12562981 t fired, .
Time elapsed: 66 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
54 CTL EXCL 26/222 20/32 CircularTrains-PT-096-CTLFireability-15 3937510 m, 132918 m/sec, 15656926 t fired, .
Time elapsed: 71 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
54 CTL EXCL 31/222 23/32 CircularTrains-PT-096-CTLFireability-15 4592898 m, 131077 m/sec, 18742053 t fired, .
Time elapsed: 76 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
54 CTL EXCL 36/222 26/32 CircularTrains-PT-096-CTLFireability-15 5278159 m, 137052 m/sec, 21806093 t fired, .
Time elapsed: 81 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
54 CTL EXCL 41/222 30/32 CircularTrains-PT-096-CTLFireability-15 5959769 m, 136322 m/sec, 24853284 t fired, .
Time elapsed: 86 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 54 (type EXCL) for CircularTrains-PT-096-CTLFireability-15 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 91 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 51 (type EXCL) for 50 CircularTrains-PT-096-CTLFireability-14
lola: time limit : 233 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 5/233 6/32 CircularTrains-PT-096-CTLFireability-14 1073690 m, 214738 m/sec, 2545624 t fired, .
Time elapsed: 96 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 10/233 10/32 CircularTrains-PT-096-CTLFireability-14 1987887 m, 182839 m/sec, 5080656 t fired, .
Time elapsed: 101 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 15/233 14/32 CircularTrains-PT-096-CTLFireability-14 2899650 m, 182352 m/sec, 7666116 t fired, .
Time elapsed: 106 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 20/233 18/32 CircularTrains-PT-096-CTLFireability-14 3686007 m, 157271 m/sec, 10234982 t fired, .
Time elapsed: 111 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 25/233 22/32 CircularTrains-PT-096-CTLFireability-14 4566481 m, 176094 m/sec, 12848379 t fired, .
Time elapsed: 116 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 30/233 26/32 CircularTrains-PT-096-CTLFireability-14 5461779 m, 179059 m/sec, 15461970 t fired, .
Time elapsed: 121 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 35/233 30/32 CircularTrains-PT-096-CTLFireability-14 6305382 m, 168720 m/sec, 18081142 t fired, .
Time elapsed: 126 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 51 (type EXCL) for CircularTrains-PT-096-CTLFireability-14 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 131 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 48 (type EXCL) for 47 CircularTrains-PT-096-CTLFireability-13
lola: time limit : 247 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 5/247 5/32 CircularTrains-PT-096-CTLFireability-13 1065221 m, 213044 m/sec, 2878308 t fired, .
Time elapsed: 136 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 10/247 10/32 CircularTrains-PT-096-CTLFireability-13 2037005 m, 194356 m/sec, 5863609 t fired, .
Time elapsed: 141 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 15/247 14/32 CircularTrains-PT-096-CTLFireability-13 3110117 m, 214622 m/sec, 8797438 t fired, .
Time elapsed: 146 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 20/247 19/32 CircularTrains-PT-096-CTLFireability-13 4120099 m, 201996 m/sec, 11692028 t fired, .
Time elapsed: 151 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 25/247 23/32 CircularTrains-PT-096-CTLFireability-13 5063309 m, 188642 m/sec, 14559360 t fired, .
Time elapsed: 156 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 30/247 27/32 CircularTrains-PT-096-CTLFireability-13 5968572 m, 181052 m/sec, 17412980 t fired, .
Time elapsed: 161 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 35/247 30/32 CircularTrains-PT-096-CTLFireability-13 6832481 m, 172781 m/sec, 20239329 t fired, .
Time elapsed: 166 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 48 (type EXCL) for CircularTrains-PT-096-CTLFireability-13 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 171 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 45 (type EXCL) for 44 CircularTrains-PT-096-CTLFireability-12
lola: time limit : 263 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 5/263 7/32 CircularTrains-PT-096-CTLFireability-12 1379968 m, 275993 m/sec, 2342939 t fired, .
Time elapsed: 176 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 10/263 12/32 CircularTrains-PT-096-CTLFireability-12 2623728 m, 248752 m/sec, 4643196 t fired, .
Time elapsed: 181 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 15/263 17/32 CircularTrains-PT-096-CTLFireability-12 3775493 m, 230353 m/sec, 6866389 t fired, .
Time elapsed: 186 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 20/263 22/32 CircularTrains-PT-096-CTLFireability-12 4886219 m, 222145 m/sec, 9029998 t fired, .
Time elapsed: 191 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 25/263 27/32 CircularTrains-PT-096-CTLFireability-12 5960798 m, 214915 m/sec, 11152789 t fired, .
Time elapsed: 196 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 30/263 32/32 CircularTrains-PT-096-CTLFireability-12 7016012 m, 211042 m/sec, 13258623 t fired, .
Time elapsed: 201 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 45 (type EXCL) for CircularTrains-PT-096-CTLFireability-12 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 206 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 39 (type EXCL) for 38 CircularTrains-PT-096-CTLFireability-10
lola: time limit : 282 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 CTL EXCL 5/282 5/32 CircularTrains-PT-096-CTLFireability-10 981535 m, 196307 m/sec, 2617798 t fired, .
Time elapsed: 211 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 CTL EXCL 10/282 9/32 CircularTrains-PT-096-CTLFireability-10 1816593 m, 167011 m/sec, 5246195 t fired, .
Time elapsed: 216 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 CTL EXCL 15/282 13/32 CircularTrains-PT-096-CTLFireability-10 2642942 m, 165269 m/sec, 7851048 t fired, .
Time elapsed: 221 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 CTL EXCL 20/282 17/32 CircularTrains-PT-096-CTLFireability-10 3490738 m, 169559 m/sec, 10483098 t fired, .
Time elapsed: 226 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 CTL EXCL 25/282 21/32 CircularTrains-PT-096-CTLFireability-10 4362724 m, 174397 m/sec, 13166143 t fired, .
Time elapsed: 231 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 CTL EXCL 30/282 26/32 CircularTrains-PT-096-CTLFireability-10 5300420 m, 187539 m/sec, 15961880 t fired, .
Time elapsed: 236 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 CTL EXCL 35/282 30/32 CircularTrains-PT-096-CTLFireability-10 6101367 m, 160189 m/sec, 18486236 t fired, .
Time elapsed: 241 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 39 (type EXCL) for CircularTrains-PT-096-CTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
CircularTrains-PT-096-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-09: DISJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 246 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 36 (type EXCL) for 31 CircularTrains-PT-096-CTLFireability-09
lola: time limit : 304 sec
lola: memory limit: 32 pages
lola: FINISHED task # 36 (type EXCL) for CircularTrains-PT-096-CTLFireability-09
lola: result : true
lola: markings : 79612
lola: fired transitions : 106059
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 28 CircularTrains-PT-096-CTLFireability-08
lola: time limit : 335 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for CircularTrains-PT-096-CTLFireability-08
lola: result : true
lola: markings : 2351
lola: fired transitions : 2544
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 21 CircularTrains-PT-096-CTLFireability-07
lola: time limit : 372 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for CircularTrains-PT-096-CTLFireability-07
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 CircularTrains-PT-096-CTLFireability-04
lola: time limit : 419 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for CircularTrains-PT-096-CTLFireability-04
lola: result : false
lola: markings : 31
lola: fired transitions : 30
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 CircularTrains-PT-096-CTLFireability-02
lola: time limit : 479 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/479 5/32 CircularTrains-PT-096-CTLFireability-02 990388 m, 198077 m/sec, 2716871 t fired, .
Time elapsed: 251 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 10/479 9/32 CircularTrains-PT-096-CTLFireability-02 1871425 m, 176207 m/sec, 5554485 t fired, .
Time elapsed: 256 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 15/479 13/32 CircularTrains-PT-096-CTLFireability-02 2979885 m, 221692 m/sec, 8946824 t fired, .
Time elapsed: 261 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 20/479 18/32 CircularTrains-PT-096-CTLFireability-02 4104523 m, 224927 m/sec, 12480155 t fired, .
Time elapsed: 266 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 25/479 23/32 CircularTrains-PT-096-CTLFireability-02 5166056 m, 212306 m/sec, 15925154 t fired, .
Time elapsed: 271 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 30/479 27/32 CircularTrains-PT-096-CTLFireability-02 6159896 m, 198768 m/sec, 19286276 t fired, .
Time elapsed: 276 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 35/479 31/32 CircularTrains-PT-096-CTLFireability-02 7148431 m, 197707 m/sec, 22616699 t fired, .
Time elapsed: 281 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 7 (type EXCL) for CircularTrains-PT-096-CTLFireability-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 286 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 4 (type EXCL) for 3 CircularTrains-PT-096-CTLFireability-01
lola: time limit : 552 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/552 4/32 CircularTrains-PT-096-CTLFireability-01 773394 m, 154678 m/sec, 2766991 t fired, .
Time elapsed: 291 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 10/552 7/32 CircularTrains-PT-096-CTLFireability-01 1310801 m, 107481 m/sec, 5506192 t fired, .
Time elapsed: 296 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 15/552 9/32 CircularTrains-PT-096-CTLFireability-01 1763266 m, 90493 m/sec, 8096956 t fired, .
Time elapsed: 301 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 20/552 11/32 CircularTrains-PT-096-CTLFireability-01 2203189 m, 87984 m/sec, 10579464 t fired, .
Time elapsed: 306 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 25/552 13/32 CircularTrains-PT-096-CTLFireability-01 2629143 m, 85190 m/sec, 13042492 t fired, .
Time elapsed: 311 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 30/552 15/32 CircularTrains-PT-096-CTLFireability-01 3059232 m, 86017 m/sec, 15459122 t fired, .
Time elapsed: 316 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 35/552 17/32 CircularTrains-PT-096-CTLFireability-01 3480956 m, 84344 m/sec, 17791308 t fired, .
Time elapsed: 321 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 40/552 19/32 CircularTrains-PT-096-CTLFireability-01 3886223 m, 81053 m/sec, 20084723 t fired, .
Time elapsed: 326 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 45/552 21/32 CircularTrains-PT-096-CTLFireability-01 4276348 m, 78025 m/sec, 22346205 t fired, .
Time elapsed: 331 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 50/552 22/32 CircularTrains-PT-096-CTLFireability-01 4665860 m, 77902 m/sec, 24596534 t fired, .
Time elapsed: 336 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 55/552 24/32 CircularTrains-PT-096-CTLFireability-01 5128083 m, 92444 m/sec, 26837258 t fired, .
Time elapsed: 341 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 60/552 26/32 CircularTrains-PT-096-CTLFireability-01 5522855 m, 78954 m/sec, 29013593 t fired, .
Time elapsed: 346 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 65/552 28/32 CircularTrains-PT-096-CTLFireability-01 5945947 m, 84618 m/sec, 31185324 t fired, .
Time elapsed: 351 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 70/552 30/32 CircularTrains-PT-096-CTLFireability-01 6328822 m, 76575 m/sec, 33275762 t fired, .
Time elapsed: 356 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 75/552 32/32 CircularTrains-PT-096-CTLFireability-01 6739669 m, 82169 m/sec, 35388057 t fired, .
Time elapsed: 361 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 4 (type EXCL) for CircularTrains-PT-096-CTLFireability-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 1 0 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 366 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 1 (type EXCL) for 0 CircularTrains-PT-096-CTLFireability-00
lola: time limit : 646 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for CircularTrains-PT-096-CTLFireability-00
lola: result : false
lola: markings : 785
lola: fired transitions : 784
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 21 CircularTrains-PT-096-CTLFireability-07
lola: time limit : 808 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 1 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 CTL EXCL 5/808 7/32 CircularTrains-PT-096-CTLFireability-07 1270461 m, 254092 m/sec, 3596611 t fired, .
Time elapsed: 371 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 1 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 CTL EXCL 10/808 13/32 CircularTrains-PT-096-CTLFireability-07 2399203 m, 225748 m/sec, 7291082 t fired, .
Time elapsed: 376 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 1 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 CTL EXCL 15/808 20/32 CircularTrains-PT-096-CTLFireability-07 3539031 m, 227965 m/sec, 10788018 t fired, .
Time elapsed: 381 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 1 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 CTL EXCL 20/808 25/32 CircularTrains-PT-096-CTLFireability-07 4633925 m, 218978 m/sec, 14458428 t fired, .
Time elapsed: 386 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 1 0 3 0 0 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 CTL EXCL 25/808 31/32 CircularTrains-PT-096-CTLFireability-07 5760531 m, 225321 m/sec, 18156631 t fired, .
Time elapsed: 391 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 24 (type EXCL) for CircularTrains-PT-096-CTLFireability-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 396 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 42 (type EXCL) for 41 CircularTrains-PT-096-CTLFireability-11
lola: time limit : 1068 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
42 CTL EXCL 5/1068 5/32 CircularTrains-PT-096-CTLFireability-11 964509 m, 192901 m/sec, 3446886 t fired, .
Time elapsed: 401 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
42 CTL EXCL 10/1068 9/32 CircularTrains-PT-096-CTLFireability-11 1969211 m, 200940 m/sec, 7103290 t fired, .
Time elapsed: 406 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
42 CTL EXCL 15/1068 14/32 CircularTrains-PT-096-CTLFireability-11 2959177 m, 197993 m/sec, 10716475 t fired, .
Time elapsed: 411 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
42 CTL EXCL 20/1068 18/32 CircularTrains-PT-096-CTLFireability-11 3876395 m, 183443 m/sec, 14204319 t fired, .
Time elapsed: 416 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
42 CTL EXCL 25/1068 22/32 CircularTrains-PT-096-CTLFireability-11 4758434 m, 176407 m/sec, 17552531 t fired, .
Time elapsed: 421 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 42 (type EXCL) for CircularTrains-PT-096-CTLFireability-11
lola: result : false
lola: markings : 4785680
lola: fired transitions : 17651316
lola: time used : 25.000000
lola: memory pages used : 22
lola: LAUNCH task # 10 (type EXCL) for 9 CircularTrains-PT-096-CTLFireability-03
lola: time limit : 1589 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
CircularTrains-PT-096-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 5/1589 6/32 CircularTrains-PT-096-CTLFireability-03 1091929 m, 218385 m/sec, 2984332 t fired, .
Time elapsed: 426 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
CircularTrains-PT-096-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 10/1589 10/32 CircularTrains-PT-096-CTLFireability-03 2084329 m, 198480 m/sec, 5888837 t fired, .
Time elapsed: 431 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
CircularTrains-PT-096-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 15/1589 14/32 CircularTrains-PT-096-CTLFireability-03 2951974 m, 173529 m/sec, 8707941 t fired, .
Time elapsed: 436 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
CircularTrains-PT-096-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 20/1589 18/32 CircularTrains-PT-096-CTLFireability-03 3871195 m, 183844 m/sec, 11682142 t fired, .
Time elapsed: 441 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
CircularTrains-PT-096-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 25/1589 23/32 CircularTrains-PT-096-CTLFireability-03 4835654 m, 192891 m/sec, 14488173 t fired, .
Time elapsed: 446 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
CircularTrains-PT-096-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 30/1589 27/32 CircularTrains-PT-096-CTLFireability-03 5662729 m, 165415 m/sec, 17223999 t fired, .
Time elapsed: 451 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
CircularTrains-PT-096-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 35/1589 31/32 CircularTrains-PT-096-CTLFireability-03 6597337 m, 186921 m/sec, 20015848 t fired, .
Time elapsed: 456 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 10 (type EXCL) for CircularTrains-PT-096-CTLFireability-03 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
CircularTrains-PT-096-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 461 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 19 (type EXCL) for 18 CircularTrains-PT-096-CTLFireability-06
lola: time limit : 3139 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
CircularTrains-PT-096-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 5/3139 4/32 CircularTrains-PT-096-CTLFireability-06 910459 m, 182091 m/sec, 3345727 t fired, .
Time elapsed: 466 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
CircularTrains-PT-096-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 10/3139 9/32 CircularTrains-PT-096-CTLFireability-06 1847615 m, 187431 m/sec, 6910790 t fired, .
Time elapsed: 471 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
CircularTrains-PT-096-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 15/3139 12/32 CircularTrains-PT-096-CTLFireability-06 2734704 m, 177417 m/sec, 10308724 t fired, .
Time elapsed: 476 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
CircularTrains-PT-096-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 20/3139 16/32 CircularTrains-PT-096-CTLFireability-06 3498191 m, 152697 m/sec, 13835498 t fired, .
Time elapsed: 481 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
CircularTrains-PT-096-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 25/3139 19/32 CircularTrains-PT-096-CTLFireability-06 4242267 m, 148815 m/sec, 17187454 t fired, .
Time elapsed: 486 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
CircularTrains-PT-096-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 30/3139 22/32 CircularTrains-PT-096-CTLFireability-06 4907038 m, 132954 m/sec, 20602253 t fired, .
Time elapsed: 491 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
CircularTrains-PT-096-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 35/3139 25/32 CircularTrains-PT-096-CTLFireability-06 5570325 m, 132657 m/sec, 24116899 t fired, .
Time elapsed: 496 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
CircularTrains-PT-096-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 40/3139 27/32 CircularTrains-PT-096-CTLFireability-06 6240073 m, 133949 m/sec, 27630989 t fired, .
Time elapsed: 501 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
CircularTrains-PT-096-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 45/3139 31/32 CircularTrains-PT-096-CTLFireability-06 6993970 m, 150779 m/sec, 31070284 t fired, .
Time elapsed: 506 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 19 (type EXCL) for CircularTrains-PT-096-CTLFireability-06 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
CircularTrains-PT-096-CTLFireability-11: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CircularTrains-PT-096-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-07: CONJ 0 0 0 0 3 0 1 0
CircularTrains-PT-096-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CircularTrains-PT-096-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 511 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CircularTrains-PT-096-CTLFireability-00: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-01: CTL unknown AGGR
CircularTrains-PT-096-CTLFireability-02: CTL unknown AGGR
CircularTrains-PT-096-CTLFireability-03: CTL unknown AGGR
CircularTrains-PT-096-CTLFireability-04: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-05: CTL unknown AGGR
CircularTrains-PT-096-CTLFireability-06: CTL unknown AGGR
CircularTrains-PT-096-CTLFireability-07: CONJ unknown CONJ
CircularTrains-PT-096-CTLFireability-08: CTL true CTL model checker
CircularTrains-PT-096-CTLFireability-09: DISJ true CTL model checker
CircularTrains-PT-096-CTLFireability-10: CTL unknown AGGR
CircularTrains-PT-096-CTLFireability-11: CTL false CTL model checker
CircularTrains-PT-096-CTLFireability-12: CTL unknown AGGR
CircularTrains-PT-096-CTLFireability-13: CTL unknown AGGR
CircularTrains-PT-096-CTLFireability-14: CTL unknown AGGR
CircularTrains-PT-096-CTLFireability-15: CTL unknown AGGR
Time elapsed: 511 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CircularTrains-PT-096"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is CircularTrains-PT-096, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r070-smll-167814396800170"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/CircularTrains-PT-096.tgz
mv CircularTrains-PT-096 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;