MCC'2023- Execution of r070-smll-167814396600018

About the Execution of LoLA for CSRepetitions-COL-04

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
3745.668	260006.00	258813.00	5954.50	FFTTFF?F?TFTT?TF	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r070-
Waiting for the VM to be ready
.......................................
=================
Generated by BenchKit 2-5348
Executing tool lola
Input is CSRepetitions-COL-04,
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r070-smll-1678143
=======================================

--------------------
preparation of the directory to
/home/mcc/execution
total 512K
-rw-r--r-- 1 mcc users 7.0K Feb
-rw-r--r-- 1 mcc users 62K Feb
-rw-r--r-- 1 mcc users 5.5K Feb
-rw-r--r-- 1 mcc users 42K Feb
-rw-r--r-- 1 mcc users 4.2K Jan
-rw-r--r-- 1 mcc users 6.5K Jan
-rw-r--r-- 1 mcc users 4.0K Feb
-rw-r--r-- 1 mcc users 21K Feb
-rw-r--r-- 1 mcc users 2.8K Feb
-rw-r--r-- 1 mcc users 19K Feb
-rw-r--r-- 1 mcc users 20K Feb
-rw-r--r-- 1 mcc users 166K Feb
-rw-r--r-- 1 mcc users 12K Feb
-rw-r--r-- 1 mcc users 81K Feb
-rw-r--r-- 1 mcc users 1.8K Feb
-rw-r--r-- 1 mcc users 3.9K Feb
-rw-r--r-- 1 mcc users 5 Mar
-rw-r--r-- 1 mcc users 3 Mar
-rw-r--r-- 1 mcc users 5 Mar
-rw-r--r-- 1 mcc users 14K Mar

--------------------
content from stdout:

=== Data for post analysis generated

The expected result is a vector
BOOL_VECTOR

here is the order used to build
FORMULA_NAME CSRepetitions-COL-04-CTLFi
FORMULA_NAME CSRepetitions-COL-04-CTLFi
FORMULA_NAME CSRepetitions-COL-04-CTLFi
FORMULA_NAME CSRepetitions-COL-04-CTLFi
FORMULA_NAME CSRepetitions-COL-04-CTLFi
FORMULA_NAME CSRepetitions-COL-04-CTLFi
FORMULA_NAME CSRepetitions-COL-04-CTLFi
FORMULA_NAME CSRepetitions-COL-04-CTLFi
FORMULA_NAME CSRepetitions-COL-04-CTLFi
FORMULA_NAME CSRepetitions-COL-04-CTLFi
FORMULA_NAME CSRepetitions-COL-04-CTLFi
FORMULA_NAME CSRepetitions-COL-04-CTLFi
FORMULA_NAME CSRepetitions-COL-04-CTLFi
FORMULA_NAME CSRepetitions-COL-04-CTLFi
FORMULA_NAME CSRepetitions-COL-04-CTLFi
FORMULA_NAME CSRepetitions-COL-04-CTLFi

=== Now, execution of the tool begins

BK_START 1678223721238

bash -c /home/mcc/BenchKit/BenchKit_head.sh
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=CSRepetitions-COL-04
Not applying reductions.
Model is COL
CTLFireability PT
[2023-03-07 21:15:24] [INFO
[2023-03-07 21:15:24] [INFO
[2023-03-07 21:15:24] [INFO
log4j:WARN No appenders could
log4j:WARN Please initialize the
log4j:WARN See http://logging.apache.or
[2023-03-07 21:15:25] [WARNING]
[2023-03-07 21:15:25] [INFO
[2023-03-07 21:15:25] [INFO
Parsed 16 properties from file
[2023-03-07 21:15:25] [INFO
[2023-03-07 21:15:25] [INFO
[2023-03-07 21:15:25] [INFO
[2023-03-07 21:15:25] [INFO
Total runtime 1166 ms.
starting LoLA
BK_INPUT CSRepetitions-COL-04
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//
current directory: /home/mcc/execution/

FORMULA CSRepetitions-COL-04-CTLFireability-01

FORMULA CSRepetitions-COL-04-CTLFireability-02

FORMULA CSRepetitions-COL-04-CTLFireability-07

FORMULA CSRepetitions-COL-04-CTLFireability-15

FORMULA CSRepetitions-COL-04-CTLFireability-14

FORMULA CSRepetitions-COL-04-CTLFireability-12

FORMULA CSRepetitions-COL-04-CTLFireability-11

FORMULA CSRepetitions-COL-04-CTLFireability-10

FORMULA CSRepetitions-COL-04-CTLFireability-09

FORMULA CSRepetitions-COL-04-CTLFireability-05

FORMULA CSRepetitions-COL-04-CTLFireability-03

FORMULA CSRepetitions-COL-04-CTLFireability-00

FORMULA CSRepetitions-COL-04-CTLFireability-04

BK_STOP 1678223981244

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/exec
lola: reading pnml
lola: PNML file contains place/transition
lola: finished parsing
lola: closed net file /home/mcc/execu
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
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lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
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lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: RELEASE
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: RELEASE
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
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lola: rewrite Frontend/Parser/formula
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
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lola: rewrite Frontend/Parser/formula
lola: RELEASE
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Rule S: 0 transitions
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
lola: LAUNCH task # 4 (type
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula
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lola: rewrite Frontend/Parser/formula
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lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
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lola: FINISHED task # 4 (type
lola: result : false
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: rewrite Frontend/Parser/formula
lola: rewrite Frontend/Parser/formula
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lola: LAUNCH task # 48 (type
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula
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lola: FINISHED task # 48 (type
lola: result : false
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 22 (type
lola: time limit : 256 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula
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lola: FINISHED task # 22 (type
lola: result : false
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lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type
lola: result : false
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lola: memory pages used :
lola: LAUNCH task # 43 (type
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type
lola: result : true
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 40 (type
lola: time limit : 326 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY
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==================================================== examination is CTLFireability 96600018 ============================== be used: 25 11:54 CTLCardinality.txt 25 11:54 CTLCardinality.xml 25 11:52 CTLFireability.txt 25 11:52 CTLFireability.xml 29 11:40 GenericPropertiesDefinition.xml 29 11:40 GenericPropertiesVerdict.xml 25 15:41 LTLCardinality.txt 25 15:41 LTLCardinality.xml 25 15:41 LTLFireability.txt 25 15:41 LTLFireability.xml 25 11:59 ReachabilityCardinality.txt 25 11:59 ReachabilityCardinality.xml 25 11:57 ReachabilityFireability.txt 25 11:57 ReachabilityFireability.xml 25 15:41 UpperBounds.txt 25 15:41 UpperBounds.xml 5 18:22 equiv_pt 5 18:22 instance 5 18:22 iscolored 5 18:22 model.pnml by BenchKit (invocation template) of booleans the result vector(from text file) reability-00 reability-01 reability-02 reability-03 reability-04 reability-05 reability-06 reability-07 reability-08 reability-09 reability-10 reability-11 reability-12 reability-13 reability-14 reability-15 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N ] Running its-tools with arguments : [-pnfolder, ., -examination, CTLFireability, --reduce-single, STATESPACE] ] Parsing pnml file : /home/mcc/execution/./model.pnml ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator). log4j system properly. g/log4j/1.2/faq.html#noconfig for more info. Using fallBack plugin, rng conformance not checked ] Load time of PNML (colored model parsed with PNMLFW) : 644 ms ] Imported 6 HL places and 5 HL transitions for a total of 117 PT places and 176.0 transition bindings in 19 ms. ./CTLFireability.xml in 19 ms. ] Unfolded HLPN to a Petri net with 117 places and 176 transitions 624 arcs in 27 ms. ] Unfolded 16 HLPN properties in 2 ms. ] Export to MCC of 16 properties in file ./CTLFireability.STATESPACE.xml took 65 ms. ] Export to PNML in file ./model.STATESPACE.pnml of net with 117 places, 176 transitions and 624 arcs took 4 ms. ../lola/bin/ unfCTLFireability FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT ution/unfCTLFireability/model.pnml net tion/unfCTLFireability/model.pnml execution/unfCTLFireability/CTLCardinality.xml _rewrite.k:553 _rewrite.k:325 _rewrite.k:331 _rewrite.k:296 _rewrite.k:325 _rewrite.k:337 _rewrite.k:325 _rewrite.k:334 _rewrite.k:314 _rewrite.k:296 _rewrite.k:325 _rewrite.k:331 _rewrite.k:296 _rewrite.k:314 _rewrite.k:296 _rewrite.k:314 _rewrite.k:322 _rewrite.k:328 _rewrite.k:299 _rewrite.k:296 _rewrite.k:325 _rewrite.k:337 _rewrite.k:322 _rewrite.k:328 _rewrite.k:296 _rewrite.k:325 _rewrite.k:328 _rewrite.k:296 _rewrite.k:322 _rewrite.k:328 _rewrite.k:296 _rewrite.k:325 _rewrite.k:328 _rewrite.k:296 _rewrite.k:322 _rewrite.k:337 _rewrite.k:314 _rewrite.k:296 _rewrite.k:322 _rewrite.k:331 _rewrite.k:299 _rewrite.k:314 _rewrite.k:296 _rewrite.k:317 _rewrite.k:325 _rewrite.k:331 _rewrite.k:296 _rewrite.k:296 _rewrite.k:322 _rewrite.k:337 _rewrite.k:296 _rewrite.k:296 _rewrite.k:322 _rewrite.k:337 _rewrite.k:296 _rewrite.k:296 _rewrite.k:253 _rewrite.k:253 _rewrite.k:253 _rewrite.k:253 _rewrite.k:253 _rewrite.k:253 _rewrite.k:397 _rewrite.k:451 _rewrite.k:250 secs. secs. secs. secs. secs. secs. secs. secs. secs. secs. secs. secs. removed,0 places removed secs. secs. secs. secs. _rewrite.k:811 _rewrite.k:814 _rewrite.k:808 _rewrite.k:811 _rewrite.k:809 _rewrite.k:813 _rewrite.k:807 _rewrite.k:807 _rewrite.k:811 _rewrite.k:807 _rewrite.k:808 EXCL) for 3 CSRepetitions-COL-04-CTLFireability-01 _rewrite.k:756 _rewrite.k:691 _rewrite.k:787 _rewrite.k:787 _rewrite.k:806 _rewrite.k:814 _rewrite.k:812 _rewrite.k:814 _rewrite.k:807 _rewrite.k:812 _rewrite.k:806 _rewrite.k:806 _rewrite.k:813 _rewrite.k:813 EXCL) for CSRepetitions-COL-04-CTLFireability-01 6731 17568 1.000000 1 _rewrite.k:811 _rewrite.k:808 _rewrite.k:814 _rewrite.k:807 _rewrite.k:808 _rewrite.k:811 EXCL) for 6 CSRepetitions-COL-04-CTLFireability-02 _rewrite.k:811 _rewrite.k:813 _rewrite.k:812 _rewrite.k:806 _rewrite.k:815 EXCL) for CSRepetitions-COL-04-CTLFireability-02 136 150 0.000000 1 EXCL) for 21 CSRepetitions-COL-04-CTLFireability-07 _rewrite.k:808 _rewrite.k:813 _rewrite.k:810 _rewrite.k:808 _rewrite.k:810 _rewrite.k:807 _rewrite.k:807 _rewrite.k:812 _rewrite.k:806 _rewrite.k:809 _rewrite.k:814 _rewrite.k:807 _rewrite.k:811 _rewrite.k:813 _rewrite.k:812 _rewrite.k:806 _rewrite.k:807 _rewrite.k:807 _rewrite.k:810 _rewrite.k:811 _rewrite.k:807 _rewrite.k:806 _rewrite.k:806 _rewrite.k:812 _rewrite.k:813 _rewrite.k:807 _rewrite.k:806 _rewrite.k:811 _rewrite.k:815 _rewrite.k:808 _rewrite.k:811 _rewrite.k:812 _rewrite.k:811 _rewrite.k:813 _rewrite.k:807 _rewrite.k:812 _rewrite.k:807 _rewrite.k:809 _rewrite.k:808 _rewrite.k:814 _rewrite.k:809 _rewrite.k:812 _rewrite.k:807 _rewrite.k:814 _rewrite.k:809 _rewrite.k:807 _rewrite.k:813 _rewrite.k:807 _rewrite.k:811 _rewrite.k:813 _rewrite.k:813 _rewrite.k:812 _rewrite.k:806 _rewrite.k:811 _rewrite.k:808 _rewrite.k:806 _rewrite.k:814 _rewrite.k:808 _rewrite.k:811 EXCL) for CSRepetitions-COL-04-CTLFireability-07 14432 72133 0.000000 1 EXCL) for 45 CSRepetitions-COL-04-CTLFireability-15 EXCL) for CSRepetitions-COL-04-CTLFireability-15 25 48 0.000000 1 EXCL) for 42 CSRepetitions-COL-04-CTLFireability-14 EXCL) for CSRepetitions-COL-04-CTLFireability-14 62 84 0.000000 1 EXCL) for 39 CSRepetitions-COL-04-CTLFireability-13 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 CSRepetitions-COL-04-CTLFireability-13 467304 m, 93460 m/sec, 2686708 t fired, . in use: 3 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 CSRepetitions-COL-04-CTLFireability-13 941511 m, 94841 m/sec, 5599987 t fired, . in use: 5 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 CSRepetitions-COL-04-CTLFireability-13 1394464 m, 90590 m/sec, 8441401 t fired, . in use: 7 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 CSRepetitions-COL-04-CTLFireability-13 1810291 m, 83165 m/sec, 11121215 t fired, . in use: 9 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 CSRepetitions-COL-04-CTLFireability-13 2307831 m, 99508 m/sec, 14455473 t fired, . in use: 11 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 CSRepetitions-COL-04-CTLFireability-13 2695183 m, 77470 m/sec, 16989232 t fired, . in use: 13 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 CSRepetitions-COL-04-CTLFireability-13 3073915 m, 75746 m/sec, 19473924 t fired, . in use: 14 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 CSRepetitions-COL-04-CTLFireability-13 3475214 m, 80259 m/sec, 22072532 t fired, . in use: 16 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 CSRepetitions-COL-04-CTLFireability-13 3834804 m, 71918 m/sec, 24488661 t fired, . in use: 18 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 CSRepetitions-COL-04-CTLFireability-13 4197208 m, 72480 m/sec, 26908852 t fired, . in use: 19 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 CSRepetitions-COL-04-CTLFireability-13 4564073 m, 73373 m/sec, 29354696 t fired, . in use: 21 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 CSRepetitions-COL-04-CTLFireability-13 4908966 m, 68978 m/sec, 31698214 t fired, . in use: 22 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 CSRepetitions-COL-04-CTLFireability-13 5263153 m, 70837 m/sec, 34098956 t fired, . in use: 24 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 CSRepetitions-COL-04-CTLFireability-13 5604334 m, 68236 m/sec, 36423781 t fired, . in use: 25 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 CSRepetitions-COL-04-CTLFireability-13 5937034 m, 66540 m/sec, 38718654 t fired, . in use: 27 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 CSRepetitions-COL-04-CTLFireability-13 6271933 m, 66979 m/sec, 41018866 t fired, . in use: 28 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 CSRepetitions-COL-04-CTLFireability-13 6596874 m, 64988 m/sec, 43261217 t fired, . in use: 30 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 CSRepetitions-COL-04-CTLFireability-13 6923914 m, 65408 m/sec, 45515862 t fired, . in use: 31 EXCL) for CSRepetitions-COL-04-CTLFireability-13 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS in use: 32 EXCL) for 36 CSRepetitions-COL-04-CTLFireability-12 EXCL) for CSRepetitions-COL-04-CTLFireability-12 311296 1359840 3.000000 2 EXCL) for 33 CSRepetitions-COL-04-CTLFireability-11 EXCL) for CSRepetitions-COL-04-CTLFireability-11 65757 523930 0.000000 1 EXCL) for 30 CSRepetitions-COL-04-CTLFireability-10 EXCL) for CSRepetitions-COL-04-CTLFireability-10 65581 769015 1.000000 1 EXCL) for 27 CSRepetitions-COL-04-CTLFireability-09 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 CSRepetitions-COL-04-CTLFireability-09 317465 m, 63493 m/sec, 640928 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 CSRepetitions-COL-04-CTLFireability-09 1438770 m, 224261 m/sec, 2908176 t fired, . in use: 32 EXCL) for CSRepetitions-COL-04-CTLFireability-09 1539814 3113395 7.000000 9 EXCL) for 24 CSRepetitions-COL-04-CTLFireability-08 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 CSRepetitions-COL-04-CTLFireability-08 550481 m, 110096 m/sec, 2523169 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 CSRepetitions-COL-04-CTLFireability-08 1043390 m, 98581 m/sec, 4967930 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 CSRepetitions-COL-04-CTLFireability-08 1503155 m, 91953 m/sec, 7313826 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 CSRepetitions-COL-04-CTLFireability-08 1968469 m, 93062 m/sec, 9760002 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 CSRepetitions-COL-04-CTLFireability-08 2496835 m, 105673 m/sec, 12733566 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 CSRepetitions-COL-04-CTLFireability-08 2922067 m, 85046 m/sec, 15008340 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 CSRepetitions-COL-04-CTLFireability-08 3369422 m, 89471 m/sec, 17374076 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 CSRepetitions-COL-04-CTLFireability-08 3774478 m, 81011 m/sec, 19593560 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 CSRepetitions-COL-04-CTLFireability-08 4177962 m, 80696 m/sec, 21805841 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 CSRepetitions-COL-04-CTLFireability-08 4584643 m, 81336 m/sec, 24036424 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 CSRepetitions-COL-04-CTLFireability-08 4970726 m, 77216 m/sec, 26196148 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 CSRepetitions-COL-04-CTLFireability-08 5359277 m, 77710 m/sec, 28365115 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 CSRepetitions-COL-04-CTLFireability-08 5728446 m, 73833 m/sec, 30456685 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 CSRepetitions-COL-04-CTLFireability-08 6103422 m, 74995 m/sec, 32580288 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 CSRepetitions-COL-04-CTLFireability-08 6466711 m, 72657 m/sec, 34646983 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 CSRepetitions-COL-04-CTLFireability-08 6830487 m, 72755 m/sec, 36722284 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 CSRepetitions-COL-04-CTLFireability-08 7188790 m, 71660 m/sec, 38764507 t fired, . in use: 32 EXCL) for CSRepetitions-COL-04-CTLFireability-08 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker AXAU true state space / EXER CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS in use: 32 EXCL) for 15 CSRepetitions-COL-04-CTLFireability-05 EXCL) for CSRepetitions-COL-04-CTLFireability-05 65759 589663 1.000000 1 EXCL) for 9 CSRepetitions-COL-04-CTLFireability-03 EXCL) for CSRepetitions-COL-04-CTLFireability-03 33 34 0.000000 1 EXCL) for 0 CSRepetitions-COL-04-CTLFireability-00 EXCL) for CSRepetitions-COL-04-CTLFireability-00 65744 524152 1.000000 1 EXCL) for 12 CSRepetitions-COL-04-CTLFireability-04 EXCL) for CSRepetitions-COL-04-CTLFireability-04 197 448 0.000000 1 EXCL) for 18 CSRepetitions-COL-04-CTLFireability-06 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker AXAU true state space / EXER CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 CSRepetitions-COL-04-CTLFireability-06 410851 m, 82170 m/sec, 1978413 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker AXAU true state space / EXER CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 CSRepetitions-COL-04-CTLFireability-06 1059804 m, 129790 m/sec, 5173357 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker AXAU true state space / EXER CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 CSRepetitions-COL-04-CTLFireability-06 1696748 m, 127388 m/sec, 8322615 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker AXAU true state space / EXER CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 CSRepetitions-COL-04-CTLFireability-06 2319141 m, 124478 m/sec, 11427771 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker AXAU true state space / EXER CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 CSRepetitions-COL-04-CTLFireability-06 2928145 m, 121800 m/sec, 14510632 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker AXAU true state space / EXER CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 CSRepetitions-COL-04-CTLFireability-06 3525934 m, 119557 m/sec, 17540635 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker AXAU true state space / EXER CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 CSRepetitions-COL-04-CTLFireability-06 4134991 m, 121811 m/sec, 20591701 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker AXAU true state space / EXER CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 CSRepetitions-COL-04-CTLFireability-06 4764835 m, 125968 m/sec, 23677651 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker AXAU true state space / EXER CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 CSRepetitions-COL-04-CTLFireability-06 5386657 m, 124364 m/sec, 26794270 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker AXAU true state space / EXER CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 CSRepetitions-COL-04-CTLFireability-06 5997074 m, 122083 m/sec, 29878988 t fired, . in use: 32 EXCL) for CSRepetitions-COL-04-CTLFireability-06 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker AXAU true state space / EXER CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS in use: 32 open tasks 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker AXAU true state space / EXER CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL unknown AGGR CTL false CTL model checker CTL unknown AGGR CTL true CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL unknown AGGR CTL true CTL model checker CTL false CTL model checker in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CSRepetitions-COL-04"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is CSRepetitions-COL-04, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r070-smll-167814396600018"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CSRepetitions-COL-04.tgz
mv CSRepetitions-COL-04 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;