Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r039-tajo-167813693000748.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is CANInsertWithFailure-PT-060, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r039-tajo-167813693000748
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 23M
-rw-r--r-- 1 mcc users 9.2K Feb 26 00:55 CTLCardinality.txt
-rw-r--r-- 1 mcc users 79K Feb 26 00:55 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.7K Feb 26 00:40 CTLFireability.txt
-rw-r--r-- 1 mcc users 58K Feb 26 00:40 CTLFireability.xml
-rw-r--r-- 1 mcc users 5.3K Feb 25 15:41 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 15:41 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Feb 25 15:41 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:41 LTLFireability.xml
-rw-r--r-- 1 mcc users 22K Feb 26 01:13 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 180K Feb 26 01:13 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 26 01:02 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 75K Feb 26 01:02 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 15:41 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 15:41 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 22M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CANInsertWithFailure-PT-060-LTLFireability-00
FORMULA_NAME CANInsertWithFailure-PT-060-LTLFireability-01
FORMULA_NAME CANInsertWithFailure-PT-060-LTLFireability-02
FORMULA_NAME CANInsertWithFailure-PT-060-LTLFireability-03
FORMULA_NAME CANInsertWithFailure-PT-060-LTLFireability-04
FORMULA_NAME CANInsertWithFailure-PT-060-LTLFireability-05
FORMULA_NAME CANInsertWithFailure-PT-060-LTLFireability-06
FORMULA_NAME CANInsertWithFailure-PT-060-LTLFireability-07
FORMULA_NAME CANInsertWithFailure-PT-060-LTLFireability-08
FORMULA_NAME CANInsertWithFailure-PT-060-LTLFireability-09
FORMULA_NAME CANInsertWithFailure-PT-060-LTLFireability-10
FORMULA_NAME CANInsertWithFailure-PT-060-LTLFireability-11
FORMULA_NAME CANInsertWithFailure-PT-060-LTLFireability-12
FORMULA_NAME CANInsertWithFailure-PT-060-LTLFireability-13
FORMULA_NAME CANInsertWithFailure-PT-060-LTLFireability-14
FORMULA_NAME CANInsertWithFailure-PT-060-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1678508132961

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=CANInsertWithFailure-PT-060
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-11 04:15:35] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-11 04:15:35] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-11 04:15:36] [INFO ] Load time of PNML (sax parser for PT used): 522 ms
[2023-03-11 04:15:36] [INFO ] Transformed 7924 places.
[2023-03-11 04:15:36] [INFO ] Transformed 21960 transitions.
[2023-03-11 04:15:36] [INFO ] Parsed PT model containing 7924 places and 21960 transitions and 58800 arcs in 794 ms.
Parsed 16 properties from file /home/mcc/execution/LTLFireability.xml in 28 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 2 formulas.
FORMULA CANInsertWithFailure-PT-060-LTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA CANInsertWithFailure-PT-060-LTLFireability-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 31 out of 7924 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 7924/7924 places, 21960/21960 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 7923 transition count 21960
Applied a total of 1 rules in 1532 ms. Remains 7923 /7924 variables (removed 1) and now considering 21960/21960 (removed 0) transitions.
// Phase 1: matrix 21960 rows 7923 cols
[2023-03-11 04:15:41] [INFO ] Computed 62 place invariants in 2707 ms
[2023-03-11 04:15:45] [INFO ] Implicit Places using invariants in 6839 ms returned []
Implicit Place search using SMT only with invariants took 6866 ms to find 0 implicit places.
[2023-03-11 04:15:45] [INFO ] Invariant cache hit.
[2023-03-11 04:15:46] [INFO ] Dead Transitions using invariants and state equation in 1102 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 7923/7924 places, 21960/21960 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9533 ms. Remains : 7923/7924 places, 21960/21960 transitions.
Support contains 31 out of 7923 places after structural reductions.
[2023-03-11 04:15:47] [INFO ] Flatten gal took : 647 ms
[2023-03-11 04:15:47] [INFO ] Flatten gal took : 470 ms
[2023-03-11 04:15:48] [INFO ] Input system was already deterministic with 21960 transitions.
Incomplete random walk after 10000 steps, including 6 resets, run finished after 730 ms. (steps per millisecond=13 ) properties (out of 24) seen :8
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 16) seen :0
Running SMT prover for 16 properties.
[2023-03-11 04:15:49] [INFO ] Invariant cache hit.
[2023-03-11 04:15:52] [INFO ] [Real]Absence check using 60 positive place invariants in 122 ms returned sat
[2023-03-11 04:15:52] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 144 ms returned sat
[2023-03-11 04:16:14] [INFO ] After 20091ms SMT Verify possible using state equation in real domain returned unsat :0 sat :15 real:1
[2023-03-11 04:16:15] [INFO ] State equation strengthened by 7140 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:71)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-11 04:16:15] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-11 04:16:15] [INFO ] After 25217ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Fused 16 Parikh solutions to 2 different solutions.
Parikh walk visited 0 properties in 84 ms.
Support contains 21 out of 7923 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Drop transitions removed 416 transitions
Trivial Post-agglo rules discarded 416 transitions
Performed 416 trivial Post agglomeration. Transition count delta: 416
Iterating post reduction 0 with 416 rules applied. Total rules applied 416 place count 7923 transition count 21544
Reduce places removed 416 places and 0 transitions.
Iterating post reduction 1 with 416 rules applied. Total rules applied 832 place count 7507 transition count 21544
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 832 place count 7507 transition count 21543
Deduced a syphon composed of 1 places in 11 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 834 place count 7506 transition count 21543
Performed 3528 Post agglomeration using F-continuation condition.Transition count delta: 3528
Deduced a syphon composed of 3528 places in 23 ms
Reduce places removed 3528 places and 0 transitions.
Iterating global reduction 2 with 7056 rules applied. Total rules applied 7890 place count 3978 transition count 18015
Drop transitions removed 3411 transitions
Redundant transition composition rules discarded 3411 transitions
Iterating global reduction 2 with 3411 rules applied. Total rules applied 11301 place count 3978 transition count 14604
Free-agglomeration rule (complex) applied 4 times.
Iterating global reduction 2 with 4 rules applied. Total rules applied 11305 place count 3978 transition count 14600
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 11309 place count 3974 transition count 14600
Partial Free-agglomeration rule applied 3656 times.
Drop transitions removed 3656 transitions
Iterating global reduction 3 with 3656 rules applied. Total rules applied 14965 place count 3974 transition count 14600
Partial Free-agglomeration rule applied 60 times.
Drop transitions removed 60 transitions
Iterating global reduction 3 with 60 rules applied. Total rules applied 15025 place count 3974 transition count 14600
Applied a total of 15025 rules in 7957 ms. Remains 3974 /7923 variables (removed 3949) and now considering 14600/21960 (removed 7360) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 7959 ms. Remains : 3974/7923 places, 14600/21960 transitions.
Incomplete random walk after 10000 steps, including 36 resets, run finished after 704 ms. (steps per millisecond=14 ) properties (out of 16) seen :4
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 12) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 11) seen :0
Running SMT prover for 11 properties.
// Phase 1: matrix 14600 rows 3974 cols
[2023-03-11 04:16:24] [INFO ] Computed 62 place invariants in 731 ms
[2023-03-11 04:16:26] [INFO ] [Real]Absence check using 60 positive place invariants in 52 ms returned sat
[2023-03-11 04:16:26] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 60 ms returned sat
[2023-03-11 04:16:36] [INFO ] After 9435ms SMT Verify possible using state equation in real domain returned unsat :0 sat :10 real:1
[2023-03-11 04:16:36] [INFO ] State equation strengthened by 14381 read => feed constraints.
[2023-03-11 04:16:46] [INFO ] After 9941ms SMT Verify possible using 14381 Read/Feed constraints in real domain returned unsat :0 sat :0 real:11
[2023-03-11 04:16:46] [INFO ] After 21499ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:11
[2023-03-11 04:16:47] [INFO ] [Nat]Absence check using 60 positive place invariants in 65 ms returned sat
[2023-03-11 04:16:47] [INFO ] [Nat]Absence check using 60 positive and 2 generalized place invariants in 45 ms returned sat
[2023-03-11 04:16:56] [INFO ] After 8999ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :11
[2023-03-11 04:17:06] [INFO ] After 9038ms SMT Verify possible using 14381 Read/Feed constraints in natural domain returned unsat :0 sat :11
[2023-03-11 04:17:11] [INFO ] After 14499ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :10
Attempting to minimize the solution found.
Minimization took 11 ms.
[2023-03-11 04:17:11] [INFO ] After 25075ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :10
Parikh walk visited 7 properties in 169 ms.
Support contains 8 out of 3974 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3974/3974 places, 14600/14600 transitions.
Performed 9 Post agglomeration using F-continuation condition.Transition count delta: 9
Deduced a syphon composed of 9 places in 3 ms
Reduce places removed 9 places and 0 transitions.
Iterating global reduction 0 with 18 rules applied. Total rules applied 18 place count 3965 transition count 14591
Partial Free-agglomeration rule applied 3 times.
Drop transitions removed 3 transitions
Iterating global reduction 0 with 3 rules applied. Total rules applied 21 place count 3965 transition count 14591
Applied a total of 21 rules in 2649 ms. Remains 3965 /3974 variables (removed 9) and now considering 14591/14600 (removed 9) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 2649 ms. Remains : 3965/3974 places, 14591/14600 transitions.
Incomplete random walk after 10000 steps, including 35 resets, run finished after 328 ms. (steps per millisecond=30 ) properties (out of 4) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
// Phase 1: matrix 14591 rows 3965 cols
[2023-03-11 04:17:15] [INFO ] Computed 62 place invariants in 634 ms
[2023-03-11 04:17:16] [INFO ] [Real]Absence check using 60 positive place invariants in 34 ms returned sat
[2023-03-11 04:17:16] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 43 ms returned sat
[2023-03-11 04:17:20] [INFO ] After 4740ms SMT Verify possible using state equation in real domain returned unsat :0 sat :2
[2023-03-11 04:17:21] [INFO ] State equation strengthened by 14402 read => feed constraints.
[2023-03-11 04:17:26] [INFO ] After 5163ms SMT Verify possible using 14402 Read/Feed constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-11 04:17:26] [INFO ] After 10916ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-11 04:17:26] [INFO ] [Nat]Absence check using 60 positive place invariants in 40 ms returned sat
[2023-03-11 04:17:26] [INFO ] [Nat]Absence check using 60 positive and 2 generalized place invariants in 50 ms returned sat
[2023-03-11 04:17:35] [INFO ] After 8031ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-11 04:17:37] [INFO ] After 2703ms SMT Verify possible using 14402 Read/Feed constraints in natural domain returned unsat :0 sat :2
[2023-03-11 04:17:41] [INFO ] After 6812ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :2
Attempting to minimize the solution found.
Minimization took 1690 ms.
[2023-03-11 04:17:43] [INFO ] After 17223ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :2
Parikh walk visited 1 properties in 25 ms.
Support contains 4 out of 3965 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3965/3965 places, 14591/14591 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 2 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 3963 transition count 14589
Partial Free-agglomeration rule applied 2 times.
Drop transitions removed 2 transitions
Iterating global reduction 0 with 2 rules applied. Total rules applied 6 place count 3963 transition count 14589
Applied a total of 6 rules in 2513 ms. Remains 3963 /3965 variables (removed 2) and now considering 14589/14591 (removed 2) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 2513 ms. Remains : 3963/3965 places, 14589/14591 transitions.
FORMULA CANInsertWithFailure-PT-060-LTLFireability-05 FALSE TECHNIQUES REACHABILITY_KNOWLEDGE
Computed a total of 242 stabilizing places and 420 stable transitions
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F((p0||G(p1))))'
Support contains 3 out of 7923 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Drop transitions removed 419 transitions
Trivial Post-agglo rules discarded 419 transitions
Performed 419 trivial Post agglomeration. Transition count delta: 419
Iterating post reduction 0 with 419 rules applied. Total rules applied 419 place count 7923 transition count 21541
Reduce places removed 419 places and 0 transitions.
Iterating post reduction 1 with 419 rules applied. Total rules applied 838 place count 7504 transition count 21541
Performed 3539 Post agglomeration using F-continuation condition.Transition count delta: 3539
Deduced a syphon composed of 3539 places in 9 ms
Reduce places removed 3539 places and 0 transitions.
Iterating global reduction 2 with 7078 rules applied. Total rules applied 7916 place count 3965 transition count 18002
Drop transitions removed 3421 transitions
Redundant transition composition rules discarded 3421 transitions
Iterating global reduction 2 with 3421 rules applied. Total rules applied 11337 place count 3965 transition count 14581
Applied a total of 11337 rules in 4792 ms. Remains 3965 /7923 variables (removed 3958) and now considering 14581/21960 (removed 7379) transitions.
// Phase 1: matrix 14581 rows 3965 cols
[2023-03-11 04:17:52] [INFO ] Computed 62 place invariants in 1063 ms
[2023-03-11 04:17:55] [INFO ] Implicit Places using invariants in 4483 ms returned []
Implicit Place search using SMT only with invariants took 4486 ms to find 0 implicit places.
[2023-03-11 04:17:55] [INFO ] Invariant cache hit.
[2023-03-11 04:18:02] [INFO ] Dead Transitions using invariants and state equation in 6284 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 3965/7923 places, 14581/21960 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 15565 ms. Remains : 3965/7923 places, 14581/21960 transitions.
Stuttering acceptance computed with spot in 146 ms :[(AND (NOT p1) (NOT p0))]
Running random walk in product with property : CANInsertWithFailure-PT-060-LTLFireability-00 automaton TGBA Formula[mat=[[{ cond=(AND p1 (NOT p0)), acceptance={} source=0 dest: 0}, { cond=(AND (NOT p1) (NOT p0)), acceptance={0} source=0 dest: 0}]], initial=0, aps=[p1:(LT s3852 1), p0:(AND (GEQ s287 1) (GEQ s3591 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant], stateDesc=[null][true]]
Product exploration explored 100000 steps with 332 reset in 1731 ms.
Product exploration explored 100000 steps with 332 reset in 1810 ms.
Computed a total of 184 stabilizing places and 301 stable transitions
Computed a total of 184 stabilizing places and 301 stable transitions
Knowledge obtained : [(AND p1 (NOT p0)), (X (NOT (AND (NOT p1) (NOT p0)))), (X (AND p1 (NOT p0))), (X (X (NOT (AND (NOT p1) (NOT p0))))), (X (X (AND p1 (NOT p0))))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 244 ms. Reduced automaton from 1 states, 2 edges and 2 AP (stutter insensitive) to 1 states, 2 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 48 ms :[(AND (NOT p0) (NOT p1))]
Finished random walk after 1752 steps, including 5 resets, run visited all 2 properties in 63 ms. (steps per millisecond=27 )
Knowledge obtained : [(AND p1 (NOT p0)), (X (NOT (AND (NOT p1) (NOT p0)))), (X (AND p1 (NOT p0))), (X (X (NOT (AND (NOT p1) (NOT p0))))), (X (X (AND p1 (NOT p0))))]
False Knowledge obtained : [(F (NOT (AND (NOT p0) p1))), (F (AND (NOT p0) (NOT p1)))]
Knowledge based reduction with 5 factoid took 268 ms. Reduced automaton from 1 states, 2 edges and 2 AP (stutter insensitive) to 1 states, 2 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 35 ms :[(AND (NOT p0) (NOT p1))]
Stuttering acceptance computed with spot in 41 ms :[(AND (NOT p0) (NOT p1))]
Support contains 3 out of 3965 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 3965/3965 places, 14581/14581 transitions.
Applied a total of 0 rules in 957 ms. Remains 3965 /3965 variables (removed 0) and now considering 14581/14581 (removed 0) transitions.
[2023-03-11 04:18:07] [INFO ] Invariant cache hit.
[2023-03-11 04:18:08] [INFO ] Implicit Places using invariants in 1096 ms returned []
Implicit Place search using SMT only with invariants took 1096 ms to find 0 implicit places.
[2023-03-11 04:18:08] [INFO ] Invariant cache hit.
[2023-03-11 04:18:16] [INFO ] Dead Transitions using invariants and state equation in 7677 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 9735 ms. Remains : 3965/3965 places, 14581/14581 transitions.
Computed a total of 184 stabilizing places and 301 stable transitions
Computed a total of 184 stabilizing places and 301 stable transitions
Knowledge obtained : [(AND (NOT p0) p1), (X (AND (NOT p0) p1)), (X (NOT (AND (NOT p0) (NOT p1)))), (X (X (AND (NOT p0) p1))), (X (X (NOT (AND (NOT p0) (NOT p1)))))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 192 ms. Reduced automaton from 1 states, 2 edges and 2 AP (stutter insensitive) to 1 states, 2 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 31 ms :[(AND (NOT p0) (NOT p1))]
Incomplete random walk after 10000 steps, including 33 resets, run finished after 250 ms. (steps per millisecond=40 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 2) seen :0
Interrupted probabilistic random walk after 63127 steps, run timeout after 3001 ms. (steps per millisecond=21 ) properties seen :{}
Probabilistic random walk after 63127 steps, saw 33795 distinct states, run finished after 3002 ms. (steps per millisecond=21 ) properties seen :0
Running SMT prover for 2 properties.
[2023-03-11 04:18:19] [INFO ] Invariant cache hit.
[2023-03-11 04:18:20] [INFO ] [Real]Absence check using 60 positive place invariants in 36 ms returned sat
[2023-03-11 04:18:20] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 43 ms returned sat
[2023-03-11 04:18:20] [INFO ] After 867ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-11 04:18:21] [INFO ] [Nat]Absence check using 60 positive place invariants in 68 ms returned sat
[2023-03-11 04:18:21] [INFO ] [Nat]Absence check using 60 positive and 2 generalized place invariants in 69 ms returned sat
[2023-03-11 04:18:26] [INFO ] After 4533ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-11 04:18:26] [INFO ] State equation strengthened by 10737 read => feed constraints.
[2023-03-11 04:18:33] [INFO ] After 7587ms SMT Verify possible using 10737 Read/Feed constraints in natural domain returned unsat :0 sat :2
[2023-03-11 04:18:35] [INFO ] After 9604ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :2
Attempting to minimize the solution found.
Minimization took 929 ms.
[2023-03-11 04:18:36] [INFO ] After 15924ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :2
Parikh walk visited 1 properties in 9 ms.
Support contains 3 out of 3965 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3965/3965 places, 14581/14581 transitions.
Free-agglomeration rule (complex) applied 2 times.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 3965 transition count 14579
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 3963 transition count 14579
Partial Free-agglomeration rule applied 3660 times.
Drop transitions removed 3660 transitions
Iterating global reduction 1 with 3660 rules applied. Total rules applied 3664 place count 3963 transition count 14579
Applied a total of 3664 rules in 2507 ms. Remains 3963 /3965 variables (removed 2) and now considering 14579/14581 (removed 2) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 2508 ms. Remains : 3963/3965 places, 14579/14581 transitions.
Incomplete random walk after 10000 steps, including 36 resets, run finished after 198 ms. (steps per millisecond=50 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=625 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 67141 steps, run timeout after 3001 ms. (steps per millisecond=22 ) properties seen :{}
Probabilistic random walk after 67141 steps, saw 31262 distinct states, run finished after 3001 ms. (steps per millisecond=22 ) properties seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 14579 rows 3963 cols
[2023-03-11 04:18:43] [INFO ] Computed 62 place invariants in 702 ms
[2023-03-11 04:18:43] [INFO ] [Real]Absence check using 60 positive place invariants in 30 ms returned sat
[2023-03-11 04:18:43] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 40 ms returned sat
[2023-03-11 04:18:47] [INFO ] After 3689ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-11 04:18:47] [INFO ] State equation strengthened by 14396 read => feed constraints.
[2023-03-11 04:18:53] [INFO ] After 6141ms SMT Verify possible using 14396 Read/Feed constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-11 04:18:53] [INFO ] After 10521ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-11 04:18:54] [INFO ] [Nat]Absence check using 60 positive place invariants in 41 ms returned sat
[2023-03-11 04:18:54] [INFO ] [Nat]Absence check using 60 positive and 2 generalized place invariants in 56 ms returned sat
[2023-03-11 04:19:01] [INFO ] After 7448ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-11 04:19:04] [INFO ] After 2819ms SMT Verify possible using 14396 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-11 04:19:05] [INFO ] After 3662ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 551 ms.
[2023-03-11 04:19:06] [INFO ] After 12313ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 5 ms.
Support contains 3 out of 3963 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3963/3963 places, 14579/14579 transitions.
Applied a total of 0 rules in 1012 ms. Remains 3963 /3963 variables (removed 0) and now considering 14579/14579 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1012 ms. Remains : 3963/3963 places, 14579/14579 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3963/3963 places, 14579/14579 transitions.
Applied a total of 0 rules in 833 ms. Remains 3963 /3963 variables (removed 0) and now considering 14579/14579 (removed 0) transitions.
[2023-03-11 04:19:07] [INFO ] Invariant cache hit.
[2023-03-11 04:19:10] [INFO ] Implicit Places using invariants in 2901 ms returned []
Implicit Place search using SMT only with invariants took 2902 ms to find 0 implicit places.
[2023-03-11 04:19:10] [INFO ] Invariant cache hit.
[2023-03-11 04:19:18] [INFO ] Dead Transitions using invariants and state equation in 8033 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 11772 ms. Remains : 3963/3963 places, 14579/14579 transitions.
Graph (trivial) has 14212 edges and 3963 vertex of which 3718 / 3963 are part of one of the 2 SCC in 7 ms
Free SCC test removed 3716 places
Drop transitions removed 10675 transitions
Ensure Unique test removed 3652 transitions
Reduce isomorphic transitions removed 14327 transitions.
Graph (complete) has 614 edges and 247 vertex of which 70 are kept as prefixes of interest. Removing 177 places using SCC suffix rule.1 ms
Discarding 177 places :
Also discarding 58 output transitions
Drop transitions removed 58 transitions
Drop transitions removed 119 transitions
Reduce isomorphic transitions removed 119 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 120 rules applied. Total rules applied 122 place count 70 transition count 74
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 123 place count 69 transition count 74
Discarding 57 places :
Symmetric choice reduction at 2 with 57 rule applications. Total rules 180 place count 12 transition count 17
Iterating global reduction 2 with 57 rules applied. Total rules applied 237 place count 12 transition count 17
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 2 with 2 rules applied. Total rules applied 239 place count 12 transition count 15
Free-agglomeration rule applied 1 times.
Iterating global reduction 2 with 1 rules applied. Total rules applied 240 place count 12 transition count 14
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 241 place count 11 transition count 14
Free-agglomeration rule (complex) applied 1 times.
Iterating global reduction 3 with 1 rules applied. Total rules applied 242 place count 11 transition count 13
Reduce places removed 1 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 244 place count 10 transition count 12
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 4 with 1 rules applied. Total rules applied 245 place count 9 transition count 11
Applied a total of 245 rules in 47 ms. Remains 9 /3963 variables (removed 3954) and now considering 11/14579 (removed 14568) transitions.
Running SMT prover for 1 properties.
// Phase 1: matrix 11 rows 9 cols
[2023-03-11 04:19:18] [INFO ] Computed 1 place invariants in 0 ms
[2023-03-11 04:19:18] [INFO ] [Real]Absence check using 1 positive place invariants in 1 ms returned sat
[2023-03-11 04:19:18] [INFO ] After 39ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-11 04:19:18] [INFO ] [Nat]Absence check using 1 positive place invariants in 0 ms returned sat
[2023-03-11 04:19:18] [INFO ] After 3ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-11 04:19:18] [INFO ] After 5ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 2 ms.
[2023-03-11 04:19:18] [INFO ] After 35ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Knowledge obtained : [(AND (NOT p0) p1), (X (AND (NOT p0) p1)), (X (NOT (AND (NOT p0) (NOT p1)))), (X (X (AND (NOT p0) p1))), (X (X (NOT (AND (NOT p0) (NOT p1)))))]
False Knowledge obtained : [(F (NOT (AND (NOT p0) p1)))]
Knowledge based reduction with 5 factoid took 187 ms. Reduced automaton from 1 states, 2 edges and 2 AP (stutter insensitive) to 1 states, 2 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 25 ms :[(AND (NOT p0) (NOT p1))]
Stuttering acceptance computed with spot in 40 ms :[(AND (NOT p0) (NOT p1))]
Stuttering acceptance computed with spot in 39 ms :[(AND (NOT p0) (NOT p1))]
Product exploration explored 100000 steps with 333 reset in 1490 ms.
Product exploration explored 100000 steps with 333 reset in 1707 ms.
Support contains 3 out of 3965 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 3965/3965 places, 14581/14581 transitions.
Applied a total of 0 rules in 1098 ms. Remains 3965 /3965 variables (removed 0) and now considering 14581/14581 (removed 0) transitions.
// Phase 1: matrix 14581 rows 3965 cols
[2023-03-11 04:19:24] [INFO ] Computed 62 place invariants in 872 ms
[2023-03-11 04:19:25] [INFO ] Implicit Places using invariants in 1932 ms returned []
Implicit Place search using SMT only with invariants took 1934 ms to find 0 implicit places.
[2023-03-11 04:19:25] [INFO ] Invariant cache hit.
[2023-03-11 04:19:31] [INFO ] Dead Transitions using invariants and state equation in 5899 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 8932 ms. Remains : 3965/3965 places, 14581/14581 transitions.
Treatment of property CANInsertWithFailure-PT-060-LTLFireability-00 finished in 105683 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((X(G(p0))||(F(p0)&&(X(p1)||G(!p1)))))'
Support contains 3 out of 7923 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Applied a total of 0 rules in 1351 ms. Remains 7923 /7923 variables (removed 0) and now considering 21960/21960 (removed 0) transitions.
// Phase 1: matrix 21960 rows 7923 cols
[2023-03-11 04:19:35] [INFO ] Computed 62 place invariants in 2079 ms
[2023-03-11 04:19:37] [INFO ] Implicit Places using invariants in 3616 ms returned []
Implicit Place search using SMT only with invariants took 3617 ms to find 0 implicit places.
[2023-03-11 04:19:37] [INFO ] Invariant cache hit.
[2023-03-11 04:19:37] [INFO ] Dead Transitions using invariants and state equation in 807 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5778 ms. Remains : 7923/7923 places, 21960/21960 transitions.
Stuttering acceptance computed with spot in 254 ms :[(NOT p0), (NOT p0), false, (AND (NOT p0) (NOT p1)), p1, (AND p1 (NOT p0)), true, (NOT p0)]
Running random walk in product with property : CANInsertWithFailure-PT-060-LTLFireability-01 automaton TGBA Formula[mat=[[{ cond=(NOT p0), acceptance={} source=0 dest: 1}, { cond=(NOT p1), acceptance={} source=0 dest: 2}, { cond=p1, acceptance={} source=0 dest: 3}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}], [{ cond=(AND (NOT p0) (NOT p1)), acceptance={} source=2 dest: 4}, { cond=(AND p0 (NOT p1)), acceptance={} source=2 dest: 5}], [{ cond=(AND (NOT p0) (NOT p1)), acceptance={} source=3 dest: 6}, { cond=(AND p0 (NOT p1)), acceptance={} source=3 dest: 7}], [{ cond=(NOT p1), acceptance={} source=4 dest: 4}, { cond=p1, acceptance={} source=4 dest: 6}], [{ cond=(AND (NOT p0) (NOT p1)), acceptance={} source=5 dest: 4}, { cond=(AND p0 (NOT p1)), acceptance={} source=5 dest: 5}, { cond=(AND (NOT p0) p1), acceptance={} source=5 dest: 6}, { cond=(AND p0 p1), acceptance={} source=5 dest: 7}], [{ cond=true, acceptance={0} source=6 dest: 6}], [{ cond=(NOT p0), acceptance={} source=7 dest: 6}, { cond=p0, acceptance={} source=7 dest: 7}]], initial=0, aps=[p0:(AND (GEQ s278 1) (GEQ s287 1)), p1:(GEQ s6580 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null, null, null, null][false, false, false, false, false, false, false, false]]
Stuttering criterion allowed to conclude after 2851 steps with 1 reset in 55 ms.
FORMULA CANInsertWithFailure-PT-060-LTLFireability-01 FALSE TECHNIQUES STUTTER_TEST
Treatment of property CANInsertWithFailure-PT-060-LTLFireability-01 finished in 6177 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(X(X(G((p0&&X(G(p1))))))))'
Support contains 2 out of 7923 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Applied a total of 0 rules in 1259 ms. Remains 7923 /7923 variables (removed 0) and now considering 21960/21960 (removed 0) transitions.
[2023-03-11 04:19:39] [INFO ] Invariant cache hit.
[2023-03-11 04:19:40] [INFO ] Implicit Places using invariants in 938 ms returned []
Implicit Place search using SMT only with invariants took 940 ms to find 0 implicit places.
[2023-03-11 04:19:40] [INFO ] Invariant cache hit.
[2023-03-11 04:19:41] [INFO ] Dead Transitions using invariants and state equation in 832 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3034 ms. Remains : 7923/7923 places, 21960/21960 transitions.
Stuttering acceptance computed with spot in 222 ms :[true, (OR (NOT p0) (NOT p1)), (OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0))]
Running random walk in product with property : CANInsertWithFailure-PT-060-LTLFireability-02 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=(NOT p0), acceptance={} source=1 dest: 0}, { cond=p0, acceptance={} source=1 dest: 2}], [{ cond=(OR (NOT p0) (NOT p1)), acceptance={} source=2 dest: 0}, { cond=(AND p0 p1), acceptance={} source=2 dest: 2}], [{ cond=true, acceptance={} source=3 dest: 1}], [{ cond=true, acceptance={} source=4 dest: 3}], [{ cond=true, acceptance={} source=5 dest: 4}]], initial=5, aps=[p0:(LT s4513 1), p1:(LT s2572 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null, null][false, false, false, false, false, false]]
Entered a terminal (fully accepting) state of product in 15546 steps with 10 reset in 331 ms.
FORMULA CANInsertWithFailure-PT-060-LTLFireability-02 FALSE TECHNIQUES STUTTER_TEST
Treatment of property CANInsertWithFailure-PT-060-LTLFireability-02 finished in 3660 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G((F(p0)&&F(G(p1)))))'
Support contains 2 out of 7923 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Drop transitions removed 420 transitions
Trivial Post-agglo rules discarded 420 transitions
Performed 420 trivial Post agglomeration. Transition count delta: 420
Iterating post reduction 0 with 420 rules applied. Total rules applied 420 place count 7923 transition count 21540
Reduce places removed 420 places and 0 transitions.
Iterating post reduction 1 with 420 rules applied. Total rules applied 840 place count 7503 transition count 21540
Performed 3539 Post agglomeration using F-continuation condition.Transition count delta: 3539
Deduced a syphon composed of 3539 places in 14 ms
Reduce places removed 3539 places and 0 transitions.
Iterating global reduction 2 with 7078 rules applied. Total rules applied 7918 place count 3964 transition count 18001
Drop transitions removed 3421 transitions
Redundant transition composition rules discarded 3421 transitions
Iterating global reduction 2 with 3421 rules applied. Total rules applied 11339 place count 3964 transition count 14580
Applied a total of 11339 rules in 4729 ms. Remains 3964 /7923 variables (removed 3959) and now considering 14580/21960 (removed 7380) transitions.
// Phase 1: matrix 14580 rows 3964 cols
[2023-03-11 04:19:47] [INFO ] Computed 62 place invariants in 1040 ms
[2023-03-11 04:19:48] [INFO ] Implicit Places using invariants in 1969 ms returned []
Implicit Place search using SMT only with invariants took 1969 ms to find 0 implicit places.
[2023-03-11 04:19:48] [INFO ] Invariant cache hit.
[2023-03-11 04:19:55] [INFO ] Dead Transitions using invariants and state equation in 7248 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 3964/7923 places, 14580/21960 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 13960 ms. Remains : 3964/7923 places, 14580/21960 transitions.
Stuttering acceptance computed with spot in 104 ms :[(OR (NOT p0) (NOT p1)), (NOT p0), (NOT p1)]
Running random walk in product with property : CANInsertWithFailure-PT-060-LTLFireability-03 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={} source=0 dest: 1}, { cond=(NOT p1), acceptance={} source=0 dest: 2}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}], [{ cond=p1, acceptance={} source=2 dest: 2}, { cond=(NOT p1), acceptance={0} source=2 dest: 2}]], initial=0, aps=[p0:(GEQ s1447 1), p1:(GEQ s1581 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant], stateDesc=[null, null, null][true, true, true]]
Stuttering criterion allowed to conclude after 270 steps with 0 reset in 8 ms.
FORMULA CANInsertWithFailure-PT-060-LTLFireability-03 FALSE TECHNIQUES STUTTER_TEST
Treatment of property CANInsertWithFailure-PT-060-LTLFireability-03 finished in 14125 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(F(p0)))'
Support contains 2 out of 7923 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Drop transitions removed 420 transitions
Trivial Post-agglo rules discarded 420 transitions
Performed 420 trivial Post agglomeration. Transition count delta: 420
Iterating post reduction 0 with 420 rules applied. Total rules applied 420 place count 7923 transition count 21540
Reduce places removed 420 places and 0 transitions.
Iterating post reduction 1 with 420 rules applied. Total rules applied 840 place count 7503 transition count 21540
Performed 3538 Post agglomeration using F-continuation condition.Transition count delta: 3538
Deduced a syphon composed of 3538 places in 12 ms
Reduce places removed 3538 places and 0 transitions.
Iterating global reduction 2 with 7076 rules applied. Total rules applied 7916 place count 3965 transition count 18002
Drop transitions removed 3420 transitions
Redundant transition composition rules discarded 3420 transitions
Iterating global reduction 2 with 3420 rules applied. Total rules applied 11336 place count 3965 transition count 14582
Applied a total of 11336 rules in 4616 ms. Remains 3965 /7923 variables (removed 3958) and now considering 14582/21960 (removed 7378) transitions.
// Phase 1: matrix 14582 rows 3965 cols
[2023-03-11 04:20:01] [INFO ] Computed 62 place invariants in 1012 ms
[2023-03-11 04:20:05] [INFO ] Implicit Places using invariants in 4409 ms returned []
Implicit Place search using SMT only with invariants took 4410 ms to find 0 implicit places.
[2023-03-11 04:20:05] [INFO ] Invariant cache hit.
[2023-03-11 04:20:11] [INFO ] Dead Transitions using invariants and state equation in 6675 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 3965/7923 places, 14582/21960 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 15706 ms. Remains : 3965/7923 places, 14582/21960 transitions.
Stuttering acceptance computed with spot in 61 ms :[(NOT p0), (NOT p0)]
Running random walk in product with property : CANInsertWithFailure-PT-060-LTLFireability-04 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={} source=0 dest: 1}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p0:(OR (LT s612 1) (AND (GEQ s2423 1) (LT s2423 1)))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null, null][true, true]]
Product exploration explored 100000 steps with 327 reset in 1699 ms.
Product exploration explored 100000 steps with 332 reset in 1656 ms.
Computed a total of 183 stabilizing places and 300 stable transitions
Computed a total of 183 stabilizing places and 300 stable transitions
Knowledge obtained : [p0, (X p0), (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 145 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 79 ms :[(NOT p0), (NOT p0)]
Finished random walk after 4452 steps, including 14 resets, run visited all 1 properties in 103 ms. (steps per millisecond=43 )
Knowledge obtained : [p0, (X p0), (X (X p0))]
False Knowledge obtained : [(F (NOT p0))]
Knowledge based reduction with 3 factoid took 149 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 63 ms :[(NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 59 ms :[(NOT p0), (NOT p0)]
Support contains 2 out of 3965 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 3965/3965 places, 14582/14582 transitions.
Applied a total of 0 rules in 903 ms. Remains 3965 /3965 variables (removed 0) and now considering 14582/14582 (removed 0) transitions.
[2023-03-11 04:20:16] [INFO ] Invariant cache hit.
[2023-03-11 04:20:17] [INFO ] Implicit Places using invariants in 1110 ms returned []
Implicit Place search using SMT only with invariants took 1113 ms to find 0 implicit places.
[2023-03-11 04:20:17] [INFO ] Invariant cache hit.
[2023-03-11 04:20:25] [INFO ] Dead Transitions using invariants and state equation in 7689 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 9712 ms. Remains : 3965/3965 places, 14582/14582 transitions.
Computed a total of 183 stabilizing places and 300 stable transitions
Computed a total of 183 stabilizing places and 300 stable transitions
Knowledge obtained : [p0, (X p0), (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 82 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 42 ms :[(NOT p0), (NOT p0)]
Incomplete random walk after 10000 steps, including 33 resets, run finished after 145 ms. (steps per millisecond=68 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=625 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 68257 steps, run timeout after 3001 ms. (steps per millisecond=22 ) properties seen :{}
Probabilistic random walk after 68257 steps, saw 34464 distinct states, run finished after 3002 ms. (steps per millisecond=22 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-11 04:20:29] [INFO ] Invariant cache hit.
[2023-03-11 04:20:29] [INFO ] [Real]Absence check using 60 positive place invariants in 36 ms returned sat
[2023-03-11 04:20:29] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 44 ms returned sat
[2023-03-11 04:20:33] [INFO ] After 3839ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-11 04:20:33] [INFO ] State equation strengthened by 10736 read => feed constraints.
[2023-03-11 04:20:35] [INFO ] After 1835ms SMT Verify possible using 10736 Read/Feed constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-11 04:20:35] [INFO ] After 6348ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-11 04:20:35] [INFO ] [Nat]Absence check using 60 positive place invariants in 39 ms returned sat
[2023-03-11 04:20:35] [INFO ] [Nat]Absence check using 60 positive and 2 generalized place invariants in 56 ms returned sat
[2023-03-11 04:20:40] [INFO ] After 4434ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-11 04:20:41] [INFO ] After 1455ms SMT Verify possible using 10736 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-11 04:20:42] [INFO ] After 2096ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 443 ms.
[2023-03-11 04:20:42] [INFO ] After 7628ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Finished Parikh walk after 4 steps, including 0 resets, run visited all 1 properties in 3 ms. (steps per millisecond=1 )
Parikh walk visited 1 properties in 3 ms.
Knowledge obtained : [p0, (X p0), (X (X p0))]
False Knowledge obtained : [(F (NOT p0))]
Knowledge based reduction with 3 factoid took 165 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 73 ms :[(NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 69 ms :[(NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 66 ms :[(NOT p0), (NOT p0)]
Product exploration explored 100000 steps with 329 reset in 1871 ms.
Product exploration explored 100000 steps with 330 reset in 1582 ms.
Support contains 2 out of 3965 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 3965/3965 places, 14582/14582 transitions.
Applied a total of 0 rules in 869 ms. Remains 3965 /3965 variables (removed 0) and now considering 14582/14582 (removed 0) transitions.
[2023-03-11 04:20:47] [INFO ] Invariant cache hit.
[2023-03-11 04:20:48] [INFO ] Implicit Places using invariants in 1027 ms returned []
Implicit Place search using SMT only with invariants took 1028 ms to find 0 implicit places.
[2023-03-11 04:20:48] [INFO ] Invariant cache hit.
[2023-03-11 04:20:56] [INFO ] Dead Transitions using invariants and state equation in 7937 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 9836 ms. Remains : 3965/3965 places, 14582/14582 transitions.
Treatment of property CANInsertWithFailure-PT-060-LTLFireability-04 finished in 60972 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(p0))'
Support contains 1 out of 7923 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Drop transitions removed 420 transitions
Trivial Post-agglo rules discarded 420 transitions
Performed 420 trivial Post agglomeration. Transition count delta: 420
Iterating post reduction 0 with 420 rules applied. Total rules applied 420 place count 7923 transition count 21540
Reduce places removed 420 places and 0 transitions.
Iterating post reduction 1 with 420 rules applied. Total rules applied 840 place count 7503 transition count 21540
Performed 3540 Post agglomeration using F-continuation condition.Transition count delta: 3540
Deduced a syphon composed of 3540 places in 7 ms
Reduce places removed 3540 places and 0 transitions.
Iterating global reduction 2 with 7080 rules applied. Total rules applied 7920 place count 3963 transition count 18000
Drop transitions removed 3422 transitions
Redundant transition composition rules discarded 3422 transitions
Iterating global reduction 2 with 3422 rules applied. Total rules applied 11342 place count 3963 transition count 14578
Applied a total of 11342 rules in 4302 ms. Remains 3963 /7923 variables (removed 3960) and now considering 14578/21960 (removed 7382) transitions.
// Phase 1: matrix 14578 rows 3963 cols
[2023-03-11 04:21:02] [INFO ] Computed 62 place invariants in 852 ms
[2023-03-11 04:21:03] [INFO ] Implicit Places using invariants in 1794 ms returned []
Implicit Place search using SMT only with invariants took 1795 ms to find 0 implicit places.
[2023-03-11 04:21:03] [INFO ] Invariant cache hit.
[2023-03-11 04:21:10] [INFO ] Dead Transitions using invariants and state equation in 7763 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 3963/7923 places, 14578/21960 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 13864 ms. Remains : 3963/7923 places, 14578/21960 transitions.
Stuttering acceptance computed with spot in 36 ms :[(NOT p0)]
Running random walk in product with property : CANInsertWithFailure-PT-060-LTLFireability-06 automaton TGBA Formula[mat=[[{ cond=(NOT p0), acceptance={0} source=0 dest: 0}]], initial=0, aps=[p0:(GEQ s899 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, colored, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null][true]]
Stuttering criterion allowed to conclude after 281 steps with 0 reset in 5 ms.
FORMULA CANInsertWithFailure-PT-060-LTLFireability-06 FALSE TECHNIQUES STUTTER_TEST
Treatment of property CANInsertWithFailure-PT-060-LTLFireability-06 finished in 13959 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((X(G(p0))&&G(p1))))'
Support contains 2 out of 7923 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Applied a total of 0 rules in 1202 ms. Remains 7923 /7923 variables (removed 0) and now considering 21960/21960 (removed 0) transitions.
// Phase 1: matrix 21960 rows 7923 cols
[2023-03-11 04:21:14] [INFO ] Computed 62 place invariants in 2061 ms
[2023-03-11 04:21:15] [INFO ] Implicit Places using invariants in 3409 ms returned []
Implicit Place search using SMT only with invariants took 3423 ms to find 0 implicit places.
[2023-03-11 04:21:15] [INFO ] Invariant cache hit.
[2023-03-11 04:21:30] [INFO ] Dead Transitions using invariants and state equation in 15077 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 19704 ms. Remains : 7923/7923 places, 21960/21960 transitions.
Stuttering acceptance computed with spot in 118 ms :[true, (OR (NOT p0) (NOT p1)), (OR (NOT p1) (NOT p0)), (OR (NOT p0) (NOT p1))]
Running random walk in product with property : CANInsertWithFailure-PT-060-LTLFireability-07 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=true, acceptance={} source=1 dest: 2}], [{ cond=(NOT p1), acceptance={} source=2 dest: 0}, { cond=p1, acceptance={} source=2 dest: 3}], [{ cond=(OR (NOT p1) (NOT p0)), acceptance={} source=3 dest: 0}, { cond=(AND p1 p0), acceptance={} source=3 dest: 3}]], initial=1, aps=[p1:(GEQ s1570 1), p0:(AND (LT s1570 1) (LT s5308 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null][false, false, false, false]]
Entered a terminal (fully accepting) state of product in 1 steps with 0 reset in 1 ms.
FORMULA CANInsertWithFailure-PT-060-LTLFireability-07 FALSE TECHNIQUES STUTTER_TEST
Treatment of property CANInsertWithFailure-PT-060-LTLFireability-07 finished in 19872 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(p0))'
Support contains 1 out of 7923 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Drop transitions removed 420 transitions
Trivial Post-agglo rules discarded 420 transitions
Performed 420 trivial Post agglomeration. Transition count delta: 420
Iterating post reduction 0 with 420 rules applied. Total rules applied 420 place count 7923 transition count 21540
Reduce places removed 420 places and 0 transitions.
Iterating post reduction 1 with 420 rules applied. Total rules applied 840 place count 7503 transition count 21540
Performed 3539 Post agglomeration using F-continuation condition.Transition count delta: 3539
Deduced a syphon composed of 3539 places in 6 ms
Reduce places removed 3539 places and 0 transitions.
Iterating global reduction 2 with 7078 rules applied. Total rules applied 7918 place count 3964 transition count 18001
Drop transitions removed 3421 transitions
Redundant transition composition rules discarded 3421 transitions
Iterating global reduction 2 with 3421 rules applied. Total rules applied 11339 place count 3964 transition count 14580
Applied a total of 11339 rules in 4447 ms. Remains 3964 /7923 variables (removed 3959) and now considering 14580/21960 (removed 7380) transitions.
// Phase 1: matrix 14580 rows 3964 cols
[2023-03-11 04:21:36] [INFO ] Computed 62 place invariants in 982 ms
[2023-03-11 04:21:37] [INFO ] Implicit Places using invariants in 2066 ms returned []
Implicit Place search using SMT only with invariants took 2067 ms to find 0 implicit places.
[2023-03-11 04:21:37] [INFO ] Invariant cache hit.
[2023-03-11 04:21:43] [INFO ] Dead Transitions using invariants and state equation in 5982 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 3964/7923 places, 14580/21960 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 12499 ms. Remains : 3964/7923 places, 14580/21960 transitions.
Stuttering acceptance computed with spot in 28 ms :[(NOT p0)]
Running random walk in product with property : CANInsertWithFailure-PT-060-LTLFireability-09 automaton TGBA Formula[mat=[[{ cond=(NOT p0), acceptance={0} source=0 dest: 0}]], initial=0, aps=[p0:(GEQ s1896 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, colored, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null][true]]
Stuttering criterion allowed to conclude after 281 steps with 0 reset in 5 ms.
FORMULA CANInsertWithFailure-PT-060-LTLFireability-09 FALSE TECHNIQUES STUTTER_TEST
Treatment of property CANInsertWithFailure-PT-060-LTLFireability-09 finished in 12561 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(((p0||X(!p0))&&(X(!p0)||F((p1&&X(p2))))))))'
Support contains 4 out of 7923 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Applied a total of 0 rules in 1485 ms. Remains 7923 /7923 variables (removed 0) and now considering 21960/21960 (removed 0) transitions.
// Phase 1: matrix 21960 rows 7923 cols
[2023-03-11 04:21:47] [INFO ] Computed 62 place invariants in 2104 ms
[2023-03-11 04:21:48] [INFO ] Implicit Places using invariants in 3574 ms returned []
Implicit Place search using SMT only with invariants took 3575 ms to find 0 implicit places.
[2023-03-11 04:21:48] [INFO ] Invariant cache hit.
[2023-03-11 04:21:49] [INFO ] Dead Transitions using invariants and state equation in 806 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5868 ms. Remains : 7923/7923 places, 21960/21960 transitions.
Stuttering acceptance computed with spot in 216 ms :[(OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (AND p0 (NOT p2)), false, false]
Running random walk in product with property : CANInsertWithFailure-PT-060-LTLFireability-10 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={0} source=0 dest: 1}, { cond=(AND p0 (NOT p1)), acceptance={} source=0 dest: 2}, { cond=(AND p0 p1), acceptance={} source=0 dest: 3}], [{ cond=p0, acceptance={} source=1 dest: 0}, { cond=(AND p0 (NOT p1)), acceptance={} source=1 dest: 2}, { cond=(AND p0 p1), acceptance={} source=1 dest: 3}], [{ cond=(AND p0 (NOT p1)), acceptance={0} source=2 dest: 2}, { cond=(AND p0 p1), acceptance={0} source=2 dest: 3}, { cond=(AND p0 (NOT p1)), acceptance={} source=2 dest: 4}, { cond=(AND p0 p1), acceptance={} source=2 dest: 5}], [{ cond=(AND p0 (NOT p1) (NOT p2)), acceptance={0} source=3 dest: 2}, { cond=(AND p0 p1 (NOT p2)), acceptance={0} source=3 dest: 3}, { cond=(AND p0 (NOT p1) (NOT p2)), acceptance={} source=3 dest: 4}, { cond=(AND p0 p1 (NOT p2)), acceptance={} source=3 dest: 5}], [{ cond=(AND (NOT p0) (NOT p1)), acceptance={0} source=4 dest: 2}, { cond=(AND (NOT p0) p1), acceptance={0} source=4 dest: 3}, { cond=(AND (NOT p0) (NOT p1)), acceptance={} source=4 dest: 4}, { cond=(AND (NOT p0) p1), acceptance={} source=4 dest: 5}], [{ cond=(AND (NOT p0) (NOT p1) (NOT p2)), acceptance={0} source=5 dest: 2}, { cond=(AND (NOT p0) p1 (NOT p2)), acceptance={0} source=5 dest: 3}, { cond=(AND (NOT p0) (NOT p1) (NOT p2)), acceptance={} source=5 dest: 4}, { cond=(AND (NOT p0) p1 (NOT p2)), acceptance={} source=5 dest: 5}]], initial=0, aps=[p0:(GEQ s7687 1), p1:(OR (LT s245 1) (LT s376 1)), p2:(LT s7872 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive], stateDesc=[null, null, null, null, null, null][false, false, false, false, false, false]]
Product exploration explored 100000 steps with 33420 reset in 3813 ms.
Product exploration explored 100000 steps with 33322 reset in 3622 ms.
Computed a total of 242 stabilizing places and 420 stable transitions
Computed a total of 242 stabilizing places and 420 stable transitions
Knowledge obtained : [(AND (NOT p0) p1 p2), (X (NOT (AND p0 (NOT p1) (NOT p2)))), (X (NOT (AND p0 p1 (NOT p2)))), (X (NOT (AND p0 p1))), (X (NOT (AND p0 (NOT p1)))), (X (NOT p0)), true, (X (X (NOT p0))), (X (X (AND (NOT p0) p1))), (X (X (NOT (AND (NOT p0) (NOT p1) (NOT p2))))), (X (X (NOT (AND (NOT p0) p1 (NOT p2))))), (X (X (NOT (AND p0 (NOT p1) (NOT p2))))), (X (X (NOT (AND p0 p1 (NOT p2))))), (X (X (NOT (AND p0 p1)))), (X (X (NOT (AND p0 (NOT p1))))), (X (X (NOT (AND (NOT p0) (NOT p1)))))]
False Knowledge obtained : []
Knowledge based reduction with 16 factoid took 1125 ms. Reduced automaton from 6 states, 23 edges and 3 AP (stutter sensitive) to 6 states, 23 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 293 ms :[(OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (AND p0 (NOT p2)), false, false]
Incomplete random walk after 10000 steps, including 6 resets, run finished after 416 ms. (steps per millisecond=24 ) properties (out of 9) seen :3
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 6) seen :0
Running SMT prover for 6 properties.
[2023-03-11 04:21:59] [INFO ] Invariant cache hit.
[2023-03-11 04:22:00] [INFO ] [Real]Absence check using 60 positive place invariants in 124 ms returned sat
[2023-03-11 04:22:01] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 158 ms returned sat
[2023-03-11 04:22:13] [INFO ] After 12174ms SMT Verify possible using state equation in real domain returned unsat :0 sat :3 real:3
[2023-03-11 04:22:13] [INFO ] State equation strengthened by 7140 read => feed constraints.
[2023-03-11 04:22:16] [INFO ] After 2968ms SMT Verify possible using 7140 Read/Feed constraints in real domain returned unsat :0 sat :0 real:6
[2023-03-11 04:22:16] [INFO ] After 17526ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:6
[2023-03-11 04:22:18] [INFO ] [Nat]Absence check using 60 positive place invariants in 113 ms returned sat
[2023-03-11 04:22:18] [INFO ] [Nat]Absence check using 60 positive and 2 generalized place invariants in 140 ms returned sat
[2023-03-11 04:22:32] [INFO ] After 13758ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :6
[2023-03-11 04:22:41] [INFO ] After 8776ms SMT Verify possible using 7140 Read/Feed constraints in natural domain returned unsat :0 sat :6
[2023-03-11 04:22:41] [INFO ] After 8777ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :6
Attempting to minimize the solution found.
Minimization took 5 ms.
[2023-03-11 04:22:41] [INFO ] After 25085ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :6
Fused 6 Parikh solutions to 3 different solutions.
Parikh walk visited 0 properties in 51 ms.
Support contains 4 out of 7923 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Drop transitions removed 418 transitions
Trivial Post-agglo rules discarded 418 transitions
Performed 418 trivial Post agglomeration. Transition count delta: 418
Iterating post reduction 0 with 418 rules applied. Total rules applied 418 place count 7923 transition count 21542
Reduce places removed 418 places and 0 transitions.
Iterating post reduction 1 with 418 rules applied. Total rules applied 836 place count 7505 transition count 21542
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 836 place count 7505 transition count 21541
Deduced a syphon composed of 1 places in 7 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 838 place count 7504 transition count 21541
Performed 3538 Post agglomeration using F-continuation condition.Transition count delta: 3538
Deduced a syphon composed of 3538 places in 9 ms
Reduce places removed 3538 places and 0 transitions.
Iterating global reduction 2 with 7076 rules applied. Total rules applied 7914 place count 3966 transition count 18003
Drop transitions removed 3422 transitions
Redundant transition composition rules discarded 3422 transitions
Iterating global reduction 2 with 3422 rules applied. Total rules applied 11336 place count 3966 transition count 14581
Free-agglomeration rule (complex) applied 2 times.
Iterating global reduction 2 with 2 rules applied. Total rules applied 11338 place count 3966 transition count 14579
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 11340 place count 3964 transition count 14579
Partial Free-agglomeration rule applied 3661 times.
Drop transitions removed 3661 transitions
Iterating global reduction 3 with 3661 rules applied. Total rules applied 15001 place count 3964 transition count 14579
Partial Free-agglomeration rule applied 60 times.
Drop transitions removed 60 transitions
Iterating global reduction 3 with 60 rules applied. Total rules applied 15061 place count 3964 transition count 14579
Applied a total of 15061 rules in 7503 ms. Remains 3964 /7923 variables (removed 3959) and now considering 14579/21960 (removed 7381) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 7503 ms. Remains : 3964/7923 places, 14579/21960 transitions.
Incomplete random walk after 10000 steps, including 36 resets, run finished after 492 ms. (steps per millisecond=20 ) properties (out of 6) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
// Phase 1: matrix 14579 rows 3964 cols
[2023-03-11 04:22:50] [INFO ] Computed 62 place invariants in 559 ms
[2023-03-11 04:22:51] [INFO ] [Real]Absence check using 60 positive place invariants in 33 ms returned sat
[2023-03-11 04:22:51] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 42 ms returned sat
[2023-03-11 04:22:55] [INFO ] After 4898ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-11 04:22:56] [INFO ] [Nat]Absence check using 60 positive place invariants in 43 ms returned sat
[2023-03-11 04:22:56] [INFO ] [Nat]Absence check using 60 positive and 2 generalized place invariants in 84 ms returned sat
[2023-03-11 04:23:05] [INFO ] After 8883ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-11 04:23:05] [INFO ] State equation strengthened by 14395 read => feed constraints.
[2023-03-11 04:23:12] [INFO ] After 6624ms SMT Verify possible using 14395 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-03-11 04:23:17] [INFO ] After 11552ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 2709 ms.
[2023-03-11 04:23:19] [INFO ] After 24356ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Parikh walk visited 0 properties in 153 ms.
Support contains 4 out of 3964 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3964/3964 places, 14579/14579 transitions.
Applied a total of 0 rules in 1114 ms. Remains 3964 /3964 variables (removed 0) and now considering 14579/14579 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1114 ms. Remains : 3964/3964 places, 14579/14579 transitions.
Incomplete random walk after 10000 steps, including 35 resets, run finished after 381 ms. (steps per millisecond=26 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 52504 steps, run timeout after 3001 ms. (steps per millisecond=17 ) properties seen :{}
Probabilistic random walk after 52504 steps, saw 29367 distinct states, run finished after 3001 ms. (steps per millisecond=17 ) properties seen :0
Running SMT prover for 4 properties.
[2023-03-11 04:23:24] [INFO ] Invariant cache hit.
[2023-03-11 04:23:25] [INFO ] [Real]Absence check using 60 positive place invariants in 32 ms returned sat
[2023-03-11 04:23:25] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 43 ms returned sat
[2023-03-11 04:23:30] [INFO ] After 5461ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1 real:3
[2023-03-11 04:23:30] [INFO ] State equation strengthened by 14395 read => feed constraints.
[2023-03-11 04:23:32] [INFO ] After 1575ms SMT Verify possible using 14395 Read/Feed constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-11 04:23:32] [INFO ] After 7947ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-11 04:23:33] [INFO ] [Nat]Absence check using 60 positive place invariants in 56 ms returned sat
[2023-03-11 04:23:33] [INFO ] [Nat]Absence check using 60 positive and 2 generalized place invariants in 65 ms returned sat
[2023-03-11 04:23:44] [INFO ] After 11134ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-11 04:23:54] [INFO ] After 9764ms SMT Verify possible using 14395 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-03-11 04:23:57] [INFO ] After 12649ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 277 ms.
[2023-03-11 04:23:57] [INFO ] After 25081ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Parikh walk visited 0 properties in 80 ms.
Support contains 4 out of 3964 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3964/3964 places, 14579/14579 transitions.
Applied a total of 0 rules in 1164 ms. Remains 3964 /3964 variables (removed 0) and now considering 14579/14579 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1164 ms. Remains : 3964/3964 places, 14579/14579 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3964/3964 places, 14579/14579 transitions.
Applied a total of 0 rules in 1039 ms. Remains 3964 /3964 variables (removed 0) and now considering 14579/14579 (removed 0) transitions.
[2023-03-11 04:23:59] [INFO ] Invariant cache hit.
[2023-03-11 04:24:02] [INFO ] Implicit Places using invariants in 2768 ms returned []
Implicit Place search using SMT only with invariants took 2769 ms to find 0 implicit places.
[2023-03-11 04:24:02] [INFO ] Invariant cache hit.
[2023-03-11 04:24:09] [INFO ] Dead Transitions using invariants and state equation in 7290 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 11103 ms. Remains : 3964/3964 places, 14579/14579 transitions.
Knowledge obtained : [(AND (NOT p0) p1 p2), (X (NOT (AND p0 (NOT p1) (NOT p2)))), (X (NOT (AND p0 p1 (NOT p2)))), (X (NOT (AND p0 p1))), (X (NOT (AND p0 (NOT p1)))), (X (NOT p0)), true, (X (X (NOT p0))), (X (X (AND (NOT p0) p1))), (X (X (NOT (AND (NOT p0) (NOT p1) (NOT p2))))), (X (X (NOT (AND (NOT p0) p1 (NOT p2))))), (X (X (NOT (AND p0 (NOT p1) (NOT p2))))), (X (X (NOT (AND p0 p1 (NOT p2))))), (X (X (NOT (AND p0 p1)))), (X (X (NOT (AND p0 (NOT p1))))), (X (X (NOT (AND (NOT p0) (NOT p1)))))]
False Knowledge obtained : [(F (NOT (AND (NOT p0) p1))), (F (AND (NOT p0) (NOT p1))), (F p0), (F (AND p0 p1)), (F (AND (NOT p2) (NOT p0) p1))]
Knowledge based reduction with 16 factoid took 735 ms. Reduced automaton from 6 states, 23 edges and 3 AP (stutter sensitive) to 6 states, 23 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 276 ms :[(OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (AND p0 (NOT p2)), false, false]
Stuttering acceptance computed with spot in 263 ms :[(OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (AND p0 (NOT p2)), false, false]
Support contains 4 out of 7923 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Applied a total of 0 rules in 1411 ms. Remains 7923 /7923 variables (removed 0) and now considering 21960/21960 (removed 0) transitions.
// Phase 1: matrix 21960 rows 7923 cols
[2023-03-11 04:24:14] [INFO ] Computed 62 place invariants in 2097 ms
[2023-03-11 04:24:15] [INFO ] Implicit Places using invariants in 2859 ms returned []
Implicit Place search using SMT only with invariants took 2860 ms to find 0 implicit places.
[2023-03-11 04:24:15] [INFO ] Invariant cache hit.
[2023-03-11 04:24:16] [INFO ] Dead Transitions using invariants and state equation in 872 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5161 ms. Remains : 7923/7923 places, 21960/21960 transitions.
Computed a total of 242 stabilizing places and 420 stable transitions
Computed a total of 242 stabilizing places and 420 stable transitions
Knowledge obtained : [(AND (NOT p0) p1 p2), (X (NOT (AND (NOT p2) p0 (NOT p1)))), (X (NOT (AND p0 p1))), (X (NOT (AND p0 (NOT p1)))), (X (NOT p0)), (X (NOT (AND (NOT p2) p0 p1))), true, (X (X (NOT p0))), (X (X (AND (NOT p0) p1))), (X (X (NOT (AND (NOT p2) p0 (NOT p1))))), (X (X (NOT (AND (NOT p2) (NOT p0) (NOT p1))))), (X (X (NOT (AND p0 p1)))), (X (X (NOT (AND (NOT p2) (NOT p0) p1)))), (X (X (NOT (AND p0 (NOT p1))))), (X (X (NOT (AND (NOT p2) p0 p1)))), (X (X (NOT (AND (NOT p0) (NOT p1)))))]
False Knowledge obtained : []
Knowledge based reduction with 16 factoid took 835 ms. Reduced automaton from 6 states, 23 edges and 3 AP (stutter sensitive) to 6 states, 23 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 311 ms :[(OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (AND p0 (NOT p2)), false, false]
Incomplete random walk after 10000 steps, including 6 resets, run finished after 548 ms. (steps per millisecond=18 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 9) seen :0
Interrupted probabilistic random walk after 81894 steps, run timeout after 3001 ms. (steps per millisecond=27 ) properties seen :{0=1, 2=1, 6=1, 8=1}
Probabilistic random walk after 81894 steps, saw 77637 distinct states, run finished after 3001 ms. (steps per millisecond=27 ) properties seen :4
Running SMT prover for 5 properties.
[2023-03-11 04:24:21] [INFO ] Invariant cache hit.
[2023-03-11 04:24:22] [INFO ] [Real]Absence check using 60 positive place invariants in 112 ms returned sat
[2023-03-11 04:24:23] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 164 ms returned sat
[2023-03-11 04:24:35] [INFO ] After 11918ms SMT Verify possible using state equation in real domain returned unsat :0 sat :2 real:3
[2023-03-11 04:24:35] [INFO ] State equation strengthened by 7140 read => feed constraints.
[2023-03-11 04:24:38] [INFO ] After 2580ms SMT Verify possible using 7140 Read/Feed constraints in real domain returned unsat :0 sat :0 real:5
[2023-03-11 04:24:38] [INFO ] After 16581ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:5
[2023-03-11 04:24:39] [INFO ] [Nat]Absence check using 60 positive place invariants in 119 ms returned sat
[2023-03-11 04:24:39] [INFO ] [Nat]Absence check using 60 positive and 2 generalized place invariants in 140 ms returned sat
[2023-03-11 04:24:53] [INFO ] After 13435ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :5
[2023-03-11 04:25:03] [INFO ] After 9267ms SMT Verify possible using 7140 Read/Feed constraints in natural domain returned unsat :0 sat :5
[2023-03-11 04:25:03] [INFO ] After 9267ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :5
Attempting to minimize the solution found.
Minimization took 3 ms.
[2023-03-11 04:25:03] [INFO ] After 25157ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :5
Fused 5 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 4 ms.
Support contains 4 out of 7923 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Drop transitions removed 418 transitions
Trivial Post-agglo rules discarded 418 transitions
Performed 418 trivial Post agglomeration. Transition count delta: 418
Iterating post reduction 0 with 418 rules applied. Total rules applied 418 place count 7923 transition count 21542
Reduce places removed 418 places and 0 transitions.
Iterating post reduction 1 with 418 rules applied. Total rules applied 836 place count 7505 transition count 21542
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 836 place count 7505 transition count 21541
Deduced a syphon composed of 1 places in 4 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 838 place count 7504 transition count 21541
Performed 3538 Post agglomeration using F-continuation condition.Transition count delta: 3538
Deduced a syphon composed of 3538 places in 6 ms
Reduce places removed 3538 places and 0 transitions.
Iterating global reduction 2 with 7076 rules applied. Total rules applied 7914 place count 3966 transition count 18003
Drop transitions removed 3422 transitions
Redundant transition composition rules discarded 3422 transitions
Iterating global reduction 2 with 3422 rules applied. Total rules applied 11336 place count 3966 transition count 14581
Free-agglomeration rule (complex) applied 2 times.
Iterating global reduction 2 with 2 rules applied. Total rules applied 11338 place count 3966 transition count 14579
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 11340 place count 3964 transition count 14579
Partial Free-agglomeration rule applied 3661 times.
Drop transitions removed 3661 transitions
Iterating global reduction 3 with 3661 rules applied. Total rules applied 15001 place count 3964 transition count 14579
Partial Free-agglomeration rule applied 60 times.
Drop transitions removed 60 transitions
Iterating global reduction 3 with 60 rules applied. Total rules applied 15061 place count 3964 transition count 14579
Applied a total of 15061 rules in 6890 ms. Remains 3964 /7923 variables (removed 3959) and now considering 14579/21960 (removed 7381) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 6890 ms. Remains : 3964/7923 places, 14579/21960 transitions.
Incomplete random walk after 10000 steps, including 36 resets, run finished after 328 ms. (steps per millisecond=30 ) properties (out of 5) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
// Phase 1: matrix 14579 rows 3964 cols
[2023-03-11 04:25:11] [INFO ] Computed 62 place invariants in 741 ms
[2023-03-11 04:25:12] [INFO ] [Real]Absence check using 60 positive place invariants in 40 ms returned sat
[2023-03-11 04:25:12] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 59 ms returned sat
[2023-03-11 04:25:16] [INFO ] After 5305ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-11 04:25:17] [INFO ] [Nat]Absence check using 60 positive place invariants in 38 ms returned sat
[2023-03-11 04:25:17] [INFO ] [Nat]Absence check using 60 positive and 2 generalized place invariants in 55 ms returned sat
[2023-03-11 04:25:27] [INFO ] After 9517ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-11 04:25:27] [INFO ] State equation strengthened by 14395 read => feed constraints.
[2023-03-11 04:25:35] [INFO ] After 8232ms SMT Verify possible using 14395 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-03-11 04:25:40] [INFO ] After 12854ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 1550 ms.
[2023-03-11 04:25:41] [INFO ] After 25061ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Parikh walk visited 0 properties in 144 ms.
Support contains 4 out of 3964 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3964/3964 places, 14579/14579 transitions.
Applied a total of 0 rules in 1022 ms. Remains 3964 /3964 variables (removed 0) and now considering 14579/14579 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1023 ms. Remains : 3964/3964 places, 14579/14579 transitions.
Incomplete random walk after 10000 steps, including 36 resets, run finished after 283 ms. (steps per millisecond=35 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 63076 steps, run timeout after 3001 ms. (steps per millisecond=21 ) properties seen :{}
Probabilistic random walk after 63076 steps, saw 30826 distinct states, run finished after 3001 ms. (steps per millisecond=21 ) properties seen :0
Running SMT prover for 4 properties.
[2023-03-11 04:25:46] [INFO ] Invariant cache hit.
[2023-03-11 04:25:46] [INFO ] [Real]Absence check using 60 positive place invariants in 41 ms returned sat
[2023-03-11 04:25:46] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 57 ms returned sat
[2023-03-11 04:25:53] [INFO ] After 6251ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1 real:3
[2023-03-11 04:25:53] [INFO ] State equation strengthened by 14395 read => feed constraints.
[2023-03-11 04:25:54] [INFO ] After 1539ms SMT Verify possible using 14395 Read/Feed constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-11 04:25:54] [INFO ] After 8796ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-11 04:25:55] [INFO ] [Nat]Absence check using 60 positive place invariants in 56 ms returned sat
[2023-03-11 04:25:55] [INFO ] [Nat]Absence check using 60 positive and 2 generalized place invariants in 65 ms returned sat
[2023-03-11 04:26:07] [INFO ] After 11568ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-11 04:26:20] [INFO ] After 12341ms SMT Verify possible using 14395 Read/Feed constraints in natural domain returned unsat :0 sat :3
[2023-03-11 04:26:20] [INFO ] After 12342ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 5 ms.
[2023-03-11 04:26:20] [INFO ] After 25080ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Parikh walk visited 0 properties in 140 ms.
Support contains 4 out of 3964 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3964/3964 places, 14579/14579 transitions.
Applied a total of 0 rules in 1042 ms. Remains 3964 /3964 variables (removed 0) and now considering 14579/14579 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1042 ms. Remains : 3964/3964 places, 14579/14579 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3964/3964 places, 14579/14579 transitions.
Applied a total of 0 rules in 848 ms. Remains 3964 /3964 variables (removed 0) and now considering 14579/14579 (removed 0) transitions.
[2023-03-11 04:26:22] [INFO ] Invariant cache hit.
[2023-03-11 04:26:24] [INFO ] Implicit Places using invariants in 2512 ms returned []
Implicit Place search using SMT only with invariants took 2520 ms to find 0 implicit places.
[2023-03-11 04:26:24] [INFO ] Invariant cache hit.
[2023-03-11 04:26:31] [INFO ] Dead Transitions using invariants and state equation in 6935 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10319 ms. Remains : 3964/3964 places, 14579/14579 transitions.
Knowledge obtained : [(AND (NOT p0) p1 p2), (X (NOT (AND (NOT p2) p0 (NOT p1)))), (X (NOT (AND p0 p1))), (X (NOT (AND p0 (NOT p1)))), (X (NOT p0)), (X (NOT (AND (NOT p2) p0 p1))), true, (X (X (NOT p0))), (X (X (AND (NOT p0) p1))), (X (X (NOT (AND (NOT p2) p0 (NOT p1))))), (X (X (NOT (AND (NOT p2) (NOT p0) (NOT p1))))), (X (X (NOT (AND p0 p1)))), (X (X (NOT (AND (NOT p2) (NOT p0) p1)))), (X (X (NOT (AND p0 (NOT p1))))), (X (X (NOT (AND (NOT p2) p0 p1)))), (X (X (NOT (AND (NOT p0) (NOT p1)))))]
False Knowledge obtained : [(F (NOT (AND (NOT p0) p1))), (F (AND (NOT p0) (NOT p1))), (F p0), (F (AND p0 p1)), (F (AND (NOT p2) (NOT p0) p1))]
Knowledge based reduction with 16 factoid took 630 ms. Reduced automaton from 6 states, 23 edges and 3 AP (stutter sensitive) to 6 states, 23 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 172 ms :[(OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (AND p0 (NOT p2)), false, false]
Stuttering acceptance computed with spot in 257 ms :[(OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (AND p0 (NOT p2)), false, false]
Stuttering acceptance computed with spot in 284 ms :[(OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (AND p0 (NOT p2)), false, false]
Product exploration explored 100000 steps with 33237 reset in 3251 ms.
Product exploration explored 100000 steps with 33329 reset in 3598 ms.
Support contains 4 out of 7923 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Applied a total of 0 rules in 1306 ms. Remains 7923 /7923 variables (removed 0) and now considering 21960/21960 (removed 0) transitions.
// Phase 1: matrix 21960 rows 7923 cols
[2023-03-11 04:26:43] [INFO ] Computed 62 place invariants in 2009 ms
[2023-03-11 04:26:44] [INFO ] Implicit Places using invariants in 2828 ms returned []
Implicit Place search using SMT only with invariants took 2841 ms to find 0 implicit places.
[2023-03-11 04:26:44] [INFO ] Invariant cache hit.
[2023-03-11 04:26:44] [INFO ] Dead Transitions using invariants and state equation in 695 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4862 ms. Remains : 7923/7923 places, 21960/21960 transitions.
Treatment of property CANInsertWithFailure-PT-060-LTLFireability-10 finished in 301864 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G((F(p0) U p1)))'
Support contains 2 out of 7923 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Drop transitions removed 420 transitions
Trivial Post-agglo rules discarded 420 transitions
Performed 420 trivial Post agglomeration. Transition count delta: 420
Iterating post reduction 0 with 420 rules applied. Total rules applied 420 place count 7923 transition count 21540
Reduce places removed 420 places and 0 transitions.
Iterating post reduction 1 with 420 rules applied. Total rules applied 840 place count 7503 transition count 21540
Performed 3538 Post agglomeration using F-continuation condition.Transition count delta: 3538
Deduced a syphon composed of 3538 places in 6 ms
Reduce places removed 3538 places and 0 transitions.
Iterating global reduction 2 with 7076 rules applied. Total rules applied 7916 place count 3965 transition count 18002
Drop transitions removed 3420 transitions
Redundant transition composition rules discarded 3420 transitions
Iterating global reduction 2 with 3420 rules applied. Total rules applied 11336 place count 3965 transition count 14582
Applied a total of 11336 rules in 4136 ms. Remains 3965 /7923 variables (removed 3958) and now considering 14582/21960 (removed 7378) transitions.
// Phase 1: matrix 14582 rows 3965 cols
[2023-03-11 04:26:50] [INFO ] Computed 62 place invariants in 1044 ms
[2023-03-11 04:26:51] [INFO ] Implicit Places using invariants in 2001 ms returned []
Implicit Place search using SMT only with invariants took 2003 ms to find 0 implicit places.
[2023-03-11 04:26:51] [INFO ] Invariant cache hit.
[2023-03-11 04:26:58] [INFO ] Dead Transitions using invariants and state equation in 6556 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 3965/7923 places, 14582/21960 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 12697 ms. Remains : 3965/7923 places, 14582/21960 transitions.
Stuttering acceptance computed with spot in 115 ms :[(NOT p1), (NOT p0), (NOT p1)]
Running random walk in product with property : CANInsertWithFailure-PT-060-LTLFireability-12 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(AND (NOT p1) (NOT p0)), acceptance={} source=0 dest: 1}, { cond=(NOT p1), acceptance={} source=0 dest: 2}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}], [{ cond=(AND (NOT p1) (NOT p0)), acceptance={0} source=2 dest: 1}, { cond=(NOT p1), acceptance={0} source=2 dest: 2}]], initial=0, aps=[p1:(GEQ s1059 1), p0:(LT s2090 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null, null, null][true, true, true]]
Stuttering criterion allowed to conclude after 615 steps with 1 reset in 10 ms.
FORMULA CANInsertWithFailure-PT-060-LTLFireability-12 FALSE TECHNIQUES STUTTER_TEST
Treatment of property CANInsertWithFailure-PT-060-LTLFireability-12 finished in 12856 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G((p0||X(p1)))))'
Support contains 2 out of 7923 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Applied a total of 0 rules in 1417 ms. Remains 7923 /7923 variables (removed 0) and now considering 21960/21960 (removed 0) transitions.
// Phase 1: matrix 21960 rows 7923 cols
[2023-03-11 04:27:01] [INFO ] Computed 62 place invariants in 2180 ms
[2023-03-11 04:27:03] [INFO ] Implicit Places using invariants in 3481 ms returned []
Implicit Place search using SMT only with invariants took 3483 ms to find 0 implicit places.
[2023-03-11 04:27:03] [INFO ] Invariant cache hit.
[2023-03-11 04:27:03] [INFO ] Dead Transitions using invariants and state equation in 704 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5618 ms. Remains : 7923/7923 places, 21960/21960 transitions.
Stuttering acceptance computed with spot in 91 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Running random walk in product with property : CANInsertWithFailure-PT-060-LTLFireability-13 automaton TGBA Formula[mat=[[{ cond=p0, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={} source=0 dest: 1}], [{ cond=(AND p0 p1), acceptance={} source=1 dest: 0}, { cond=(AND p0 (NOT p1)), acceptance={0} source=1 dest: 0}, { cond=(AND (NOT p0) p1), acceptance={} source=1 dest: 1}, { cond=(AND (NOT p0) (NOT p1)), acceptance={0} source=1 dest: 1}]], initial=1, aps=[p0:(GEQ s6128 1), p1:(OR (GEQ s6128 1) (GEQ s522 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive], stateDesc=[null, null][false, false]]
Stuttering criterion allowed to conclude after 1405 steps with 0 reset in 30 ms.
FORMULA CANInsertWithFailure-PT-060-LTLFireability-13 FALSE TECHNIQUES STUTTER_TEST
Treatment of property CANInsertWithFailure-PT-060-LTLFireability-13 finished in 5809 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(p0)))'
Support contains 1 out of 7923 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Drop transitions removed 420 transitions
Trivial Post-agglo rules discarded 420 transitions
Performed 420 trivial Post agglomeration. Transition count delta: 420
Iterating post reduction 0 with 420 rules applied. Total rules applied 420 place count 7923 transition count 21540
Reduce places removed 420 places and 0 transitions.
Iterating post reduction 1 with 420 rules applied. Total rules applied 840 place count 7503 transition count 21540
Performed 3540 Post agglomeration using F-continuation condition.Transition count delta: 3540
Deduced a syphon composed of 3540 places in 5 ms
Reduce places removed 3540 places and 0 transitions.
Iterating global reduction 2 with 7080 rules applied. Total rules applied 7920 place count 3963 transition count 18000
Drop transitions removed 3422 transitions
Redundant transition composition rules discarded 3422 transitions
Iterating global reduction 2 with 3422 rules applied. Total rules applied 11342 place count 3963 transition count 14578
Applied a total of 11342 rules in 4351 ms. Remains 3963 /7923 variables (removed 3960) and now considering 14578/21960 (removed 7382) transitions.
// Phase 1: matrix 14578 rows 3963 cols
[2023-03-11 04:27:09] [INFO ] Computed 62 place invariants in 786 ms
[2023-03-11 04:27:10] [INFO ] Implicit Places using invariants in 1730 ms returned []
Implicit Place search using SMT only with invariants took 1731 ms to find 0 implicit places.
[2023-03-11 04:27:10] [INFO ] Invariant cache hit.
[2023-03-11 04:27:17] [INFO ] Dead Transitions using invariants and state equation in 7113 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 3963/7923 places, 14578/21960 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 13200 ms. Remains : 3963/7923 places, 14578/21960 transitions.
Stuttering acceptance computed with spot in 25 ms :[(NOT p0)]
Running random walk in product with property : CANInsertWithFailure-PT-060-LTLFireability-14 automaton TGBA Formula[mat=[[{ cond=p0, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={0} source=0 dest: 0}]], initial=0, aps=[p0:(GEQ s1997 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant], stateDesc=[null][true]]
Stuttering criterion allowed to conclude after 312 steps with 0 reset in 12 ms.
FORMULA CANInsertWithFailure-PT-060-LTLFireability-14 FALSE TECHNIQUES STUTTER_TEST
Treatment of property CANInsertWithFailure-PT-060-LTLFireability-14 finished in 13277 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(F((p0&&X(X(p1))))))'
Support contains 5 out of 7923 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Applied a total of 0 rules in 1390 ms. Remains 7923 /7923 variables (removed 0) and now considering 21960/21960 (removed 0) transitions.
// Phase 1: matrix 21960 rows 7923 cols
[2023-03-11 04:27:20] [INFO ] Computed 62 place invariants in 2077 ms
[2023-03-11 04:27:22] [INFO ] Implicit Places using invariants in 3502 ms returned []
Implicit Place search using SMT only with invariants took 3521 ms to find 0 implicit places.
[2023-03-11 04:27:22] [INFO ] Invariant cache hit.
[2023-03-11 04:27:23] [INFO ] Dead Transitions using invariants and state equation in 819 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5734 ms. Remains : 7923/7923 places, 21960/21960 transitions.
Stuttering acceptance computed with spot in 260 ms :[(NOT p1), (NOT p1), (NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1))]
Running random walk in product with property : CANInsertWithFailure-PT-060-LTLFireability-15 automaton TGBA Formula[mat=[[{ cond=p0, acceptance={0} source=0 dest: 1}, { cond=(NOT p0), acceptance={0} source=0 dest: 2}], [{ cond=(AND p0 (NOT p1)), acceptance={0} source=1 dest: 1}, { cond=(AND (NOT p0) (NOT p1)), acceptance={0} source=1 dest: 2}], [{ cond=(AND p0 (NOT p1)), acceptance={0} source=2 dest: 0}, { cond=(AND (NOT p0) (NOT p1)), acceptance={0} source=2 dest: 4}], [{ cond=true, acceptance={} source=3 dest: 4}], [{ cond=p0, acceptance={0} source=4 dest: 0}, { cond=(NOT p0), acceptance={0} source=4 dest: 4}]], initial=3, aps=[p0:(LT s7851 1), p1:(OR (LT s26 1) (LT s595 1) (LT s833 1) (LT s3201 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, weak, inherently-weak], stateDesc=[null, null, null, null, null][false, false, false, false, false]]
Product exploration explored 100000 steps with 25000 reset in 3212 ms.
Product exploration explored 100000 steps with 25000 reset in 3081 ms.
Computed a total of 242 stabilizing places and 420 stable transitions
Computed a total of 242 stabilizing places and 420 stable transitions
Knowledge obtained : [(AND p0 p1), (X p0), (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 198 ms. Reduced automaton from 5 states, 9 edges and 2 AP (stutter sensitive) to 5 states, 9 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 181 ms :[(NOT p1), (NOT p1), (NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1))]
Incomplete random walk after 10000 steps, including 6 resets, run finished after 271 ms. (steps per millisecond=36 ) properties (out of 3) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2023-03-11 04:27:30] [INFO ] Invariant cache hit.
[2023-03-11 04:27:31] [INFO ] [Real]Absence check using 60 positive place invariants in 132 ms returned sat
[2023-03-11 04:27:31] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 140 ms returned sat
[2023-03-11 04:27:50] [INFO ] After 19010ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1 real:1
[2023-03-11 04:27:51] [INFO ] State equation strengthened by 7140 read => feed constraints.
[2023-03-11 04:27:54] [INFO ] After 3001ms SMT Verify possible using 7140 Read/Feed constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-11 04:27:54] [INFO ] After 23634ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-11 04:27:55] [INFO ] [Nat]Absence check using 60 positive place invariants in 117 ms returned sat
[2023-03-11 04:27:55] [INFO ] [Nat]Absence check using 60 positive and 2 generalized place invariants in 139 ms returned sat
[2023-03-11 04:28:11] [INFO ] After 16323ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-11 04:28:19] [INFO ] After 7270ms SMT Verify possible using 7140 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-11 04:28:19] [INFO ] After 7274ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 3 ms.
[2023-03-11 04:28:19] [INFO ] After 25149ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Fused 2 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 57 ms.
Support contains 5 out of 7923 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Drop transitions removed 417 transitions
Trivial Post-agglo rules discarded 417 transitions
Performed 417 trivial Post agglomeration. Transition count delta: 417
Iterating post reduction 0 with 417 rules applied. Total rules applied 417 place count 7923 transition count 21543
Reduce places removed 417 places and 0 transitions.
Iterating post reduction 1 with 417 rules applied. Total rules applied 834 place count 7506 transition count 21543
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 834 place count 7506 transition count 21542
Deduced a syphon composed of 1 places in 5 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 836 place count 7505 transition count 21542
Performed 3539 Post agglomeration using F-continuation condition.Transition count delta: 3539
Deduced a syphon composed of 3539 places in 6 ms
Reduce places removed 3539 places and 0 transitions.
Iterating global reduction 2 with 7078 rules applied. Total rules applied 7914 place count 3966 transition count 18003
Drop transitions removed 3422 transitions
Redundant transition composition rules discarded 3422 transitions
Iterating global reduction 2 with 3422 rules applied. Total rules applied 11336 place count 3966 transition count 14581
Free-agglomeration rule (complex) applied 3 times.
Iterating global reduction 2 with 3 rules applied. Total rules applied 11339 place count 3966 transition count 14578
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 11342 place count 3963 transition count 14578
Partial Free-agglomeration rule applied 3660 times.
Drop transitions removed 3660 transitions
Iterating global reduction 3 with 3660 rules applied. Total rules applied 15002 place count 3963 transition count 14578
Partial Free-agglomeration rule applied 60 times.
Drop transitions removed 60 transitions
Iterating global reduction 3 with 60 rules applied. Total rules applied 15062 place count 3963 transition count 14578
Applied a total of 15062 rules in 7250 ms. Remains 3963 /7923 variables (removed 3960) and now considering 14578/21960 (removed 7382) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 7250 ms. Remains : 3963/7923 places, 14578/21960 transitions.
Incomplete random walk after 10000 steps, including 35 resets, run finished after 288 ms. (steps per millisecond=34 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 2) seen :0
Interrupted probabilistic random walk after 54737 steps, run timeout after 3001 ms. (steps per millisecond=18 ) properties seen :{}
Probabilistic random walk after 54737 steps, saw 30757 distinct states, run finished after 3001 ms. (steps per millisecond=18 ) properties seen :0
Running SMT prover for 2 properties.
// Phase 1: matrix 14578 rows 3963 cols
[2023-03-11 04:28:30] [INFO ] Computed 62 place invariants in 623 ms
[2023-03-11 04:28:31] [INFO ] [Real]Absence check using 60 positive place invariants in 67 ms returned sat
[2023-03-11 04:28:31] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 70 ms returned sat
[2023-03-11 04:28:35] [INFO ] After 3979ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1 real:1
[2023-03-11 04:28:35] [INFO ] State equation strengthened by 14396 read => feed constraints.
[2023-03-11 04:28:40] [INFO ] After 4820ms SMT Verify possible using 14396 Read/Feed constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-11 04:28:40] [INFO ] After 9768ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-11 04:28:40] [INFO ] [Nat]Absence check using 60 positive place invariants in 42 ms returned sat
[2023-03-11 04:28:40] [INFO ] [Nat]Absence check using 60 positive and 2 generalized place invariants in 60 ms returned sat
[2023-03-11 04:28:47] [INFO ] After 6687ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-11 04:29:01] [INFO ] After 13915ms SMT Verify possible using 14396 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-11 04:29:02] [INFO ] After 14910ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 540 ms.
[2023-03-11 04:29:03] [INFO ] After 22967ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 1 properties in 53 ms.
Support contains 5 out of 3963 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3963/3963 places, 14578/14578 transitions.
Applied a total of 0 rules in 884 ms. Remains 3963 /3963 variables (removed 0) and now considering 14578/14578 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 885 ms. Remains : 3963/3963 places, 14578/14578 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3963/3963 places, 14578/14578 transitions.
Applied a total of 0 rules in 850 ms. Remains 3963 /3963 variables (removed 0) and now considering 14578/14578 (removed 0) transitions.
[2023-03-11 04:29:05] [INFO ] Invariant cache hit.
[2023-03-11 04:29:07] [INFO ] Implicit Places using invariants in 2501 ms returned []
Implicit Place search using SMT only with invariants took 2504 ms to find 0 implicit places.
[2023-03-11 04:29:07] [INFO ] Invariant cache hit.
[2023-03-11 04:29:15] [INFO ] Dead Transitions using invariants and state equation in 7970 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 11328 ms. Remains : 3963/3963 places, 14578/14578 transitions.
Knowledge obtained : [(AND p0 p1), (X p0), (X (X p0))]
False Knowledge obtained : [(F (NOT p0)), (F (AND (NOT p1) p0))]
Knowledge based reduction with 3 factoid took 131 ms. Reduced automaton from 5 states, 9 edges and 2 AP (stutter sensitive) to 5 states, 9 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 171 ms :[(NOT p1), (NOT p1), (NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1))]
Stuttering acceptance computed with spot in 202 ms :[(NOT p1), (NOT p1), (NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1))]
Support contains 5 out of 7923 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Applied a total of 0 rules in 1595 ms. Remains 7923 /7923 variables (removed 0) and now considering 21960/21960 (removed 0) transitions.
// Phase 1: matrix 21960 rows 7923 cols
[2023-03-11 04:29:19] [INFO ] Computed 62 place invariants in 2193 ms
[2023-03-11 04:29:21] [INFO ] Implicit Places using invariants in 3563 ms returned []
Implicit Place search using SMT only with invariants took 3577 ms to find 0 implicit places.
[2023-03-11 04:29:21] [INFO ] Invariant cache hit.
[2023-03-11 04:29:21] [INFO ] Dead Transitions using invariants and state equation in 688 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5861 ms. Remains : 7923/7923 places, 21960/21960 transitions.
Computed a total of 242 stabilizing places and 420 stable transitions
Computed a total of 242 stabilizing places and 420 stable transitions
Knowledge obtained : [(AND p0 p1), (X p0), (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 156 ms. Reduced automaton from 5 states, 9 edges and 2 AP (stutter sensitive) to 5 states, 9 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 240 ms :[(NOT p1), (NOT p1), (NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1))]
Incomplete random walk after 10000 steps, including 6 resets, run finished after 359 ms. (steps per millisecond=27 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 3) seen :0
Interrupted probabilistic random walk after 83426 steps, run timeout after 3001 ms. (steps per millisecond=27 ) properties seen :{}
Probabilistic random walk after 83426 steps, saw 78030 distinct states, run finished after 3001 ms. (steps per millisecond=27 ) properties seen :0
Running SMT prover for 3 properties.
[2023-03-11 04:29:25] [INFO ] Invariant cache hit.
[2023-03-11 04:29:27] [INFO ] [Real]Absence check using 60 positive place invariants in 124 ms returned sat
[2023-03-11 04:29:27] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 143 ms returned sat
[2023-03-11 04:29:43] [INFO ] After 15807ms SMT Verify possible using state equation in real domain returned unsat :0 sat :2 real:1
[2023-03-11 04:29:43] [INFO ] State equation strengthened by 7140 read => feed constraints.
[2023-03-11 04:29:47] [INFO ] After 3876ms SMT Verify possible using 7140 Read/Feed constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-11 04:29:47] [INFO ] After 21375ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-11 04:29:48] [INFO ] [Nat]Absence check using 60 positive place invariants in 132 ms returned sat
[2023-03-11 04:29:48] [INFO ] [Nat]Absence check using 60 positive and 2 generalized place invariants in 153 ms returned sat
[2023-03-11 04:30:05] [INFO ] After 16572ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2023-03-11 04:30:12] [INFO ] After 6668ms SMT Verify possible using 7140 Read/Feed constraints in natural domain returned unsat :0 sat :2
[2023-03-11 04:30:12] [INFO ] After 6669ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :2
Attempting to minimize the solution found.
Minimization took 6 ms.
[2023-03-11 04:30:12] [INFO ] After 25136ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :2
Fused 3 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 41 ms.
Support contains 5 out of 7923 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Drop transitions removed 417 transitions
Trivial Post-agglo rules discarded 417 transitions
Performed 417 trivial Post agglomeration. Transition count delta: 417
Iterating post reduction 0 with 417 rules applied. Total rules applied 417 place count 7923 transition count 21543
Reduce places removed 417 places and 0 transitions.
Iterating post reduction 1 with 417 rules applied. Total rules applied 834 place count 7506 transition count 21543
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 834 place count 7506 transition count 21542
Deduced a syphon composed of 1 places in 6 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 836 place count 7505 transition count 21542
Performed 3539 Post agglomeration using F-continuation condition.Transition count delta: 3539
Deduced a syphon composed of 3539 places in 6 ms
Reduce places removed 3539 places and 0 transitions.
Iterating global reduction 2 with 7078 rules applied. Total rules applied 7914 place count 3966 transition count 18003
Drop transitions removed 3422 transitions
Redundant transition composition rules discarded 3422 transitions
Iterating global reduction 2 with 3422 rules applied. Total rules applied 11336 place count 3966 transition count 14581
Free-agglomeration rule (complex) applied 3 times.
Iterating global reduction 2 with 3 rules applied. Total rules applied 11339 place count 3966 transition count 14578
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 11342 place count 3963 transition count 14578
Partial Free-agglomeration rule applied 3660 times.
Drop transitions removed 3660 transitions
Iterating global reduction 3 with 3660 rules applied. Total rules applied 15002 place count 3963 transition count 14578
Partial Free-agglomeration rule applied 60 times.
Drop transitions removed 60 transitions
Iterating global reduction 3 with 60 rules applied. Total rules applied 15062 place count 3963 transition count 14578
Applied a total of 15062 rules in 6911 ms. Remains 3963 /7923 variables (removed 3960) and now considering 14578/21960 (removed 7382) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 6911 ms. Remains : 3963/7923 places, 14578/21960 transitions.
Incomplete random walk after 10000 steps, including 36 resets, run finished after 229 ms. (steps per millisecond=43 ) properties (out of 3) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
// Phase 1: matrix 14578 rows 3963 cols
[2023-03-11 04:30:20] [INFO ] Computed 62 place invariants in 422 ms
[2023-03-11 04:30:20] [INFO ] [Real]Absence check using 60 positive place invariants in 37 ms returned sat
[2023-03-11 04:30:20] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 56 ms returned sat
[2023-03-11 04:30:24] [INFO ] After 4012ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1 real:1
[2023-03-11 04:30:24] [INFO ] State equation strengthened by 14396 read => feed constraints.
[2023-03-11 04:30:29] [INFO ] After 4978ms SMT Verify possible using 14396 Read/Feed constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-11 04:30:29] [INFO ] After 9861ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-11 04:30:30] [INFO ] [Nat]Absence check using 60 positive place invariants in 38 ms returned sat
[2023-03-11 04:30:30] [INFO ] [Nat]Absence check using 60 positive and 2 generalized place invariants in 50 ms returned sat
[2023-03-11 04:30:36] [INFO ] After 5721ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-11 04:30:47] [INFO ] After 11645ms SMT Verify possible using 14396 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-11 04:30:48] [INFO ] After 12463ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 690 ms.
[2023-03-11 04:30:49] [INFO ] After 19543ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 1 properties in 46 ms.
Support contains 5 out of 3963 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3963/3963 places, 14578/14578 transitions.
Applied a total of 0 rules in 1034 ms. Remains 3963 /3963 variables (removed 0) and now considering 14578/14578 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1034 ms. Remains : 3963/3963 places, 14578/14578 transitions.
Incomplete random walk after 10000 steps, including 36 resets, run finished after 178 ms. (steps per millisecond=56 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=666 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 58061 steps, run timeout after 3001 ms. (steps per millisecond=19 ) properties seen :{}
Probabilistic random walk after 58061 steps, saw 31237 distinct states, run finished after 3003 ms. (steps per millisecond=19 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-11 04:30:53] [INFO ] Invariant cache hit.
[2023-03-11 04:30:54] [INFO ] [Real]Absence check using 60 positive place invariants in 65 ms returned sat
[2023-03-11 04:30:54] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 78 ms returned sat
[2023-03-11 04:31:00] [INFO ] After 6005ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-11 04:31:00] [INFO ] State equation strengthened by 14396 read => feed constraints.
[2023-03-11 04:31:02] [INFO ] After 1999ms SMT Verify possible using 14396 Read/Feed constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-11 04:31:02] [INFO ] After 8815ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-11 04:31:03] [INFO ] [Nat]Absence check using 60 positive place invariants in 39 ms returned sat
[2023-03-11 04:31:03] [INFO ] [Nat]Absence check using 60 positive and 2 generalized place invariants in 56 ms returned sat
[2023-03-11 04:31:09] [INFO ] After 6073ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-11 04:31:19] [INFO ] After 10075ms SMT Verify possible using 14396 Read/Feed constraints in natural domain returned unsat :0 sat :0
[2023-03-11 04:31:19] [INFO ] After 16758ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 2 ms.
Support contains 5 out of 3963 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3963/3963 places, 14578/14578 transitions.
Applied a total of 0 rules in 886 ms. Remains 3963 /3963 variables (removed 0) and now considering 14578/14578 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 887 ms. Remains : 3963/3963 places, 14578/14578 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3963/3963 places, 14578/14578 transitions.
Applied a total of 0 rules in 855 ms. Remains 3963 /3963 variables (removed 0) and now considering 14578/14578 (removed 0) transitions.
[2023-03-11 04:31:21] [INFO ] Invariant cache hit.
[2023-03-11 04:31:26] [INFO ] Implicit Places using invariants in 5706 ms returned []
Implicit Place search using SMT only with invariants took 5707 ms to find 0 implicit places.
[2023-03-11 04:31:26] [INFO ] Invariant cache hit.
[2023-03-11 04:31:33] [INFO ] Dead Transitions using invariants and state equation in 7027 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 13604 ms. Remains : 3963/3963 places, 14578/14578 transitions.
Knowledge obtained : [(AND p0 p1), (X p0), (X (X p0))]
False Knowledge obtained : [(F (NOT p0)), (F (AND (NOT p1) p0))]
Knowledge based reduction with 3 factoid took 126 ms. Reduced automaton from 5 states, 9 edges and 2 AP (stutter sensitive) to 5 states, 9 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 132 ms :[(NOT p1), (NOT p1), (NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1))]
Stuttering acceptance computed with spot in 114 ms :[(NOT p1), (NOT p1), (NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1))]
Stuttering acceptance computed with spot in 115 ms :[(NOT p1), (NOT p1), (NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1))]
Product exploration explored 100000 steps with 25000 reset in 2543 ms.
Product exploration explored 100000 steps with 25000 reset in 3026 ms.
Support contains 5 out of 7923 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Applied a total of 0 rules in 1532 ms. Remains 7923 /7923 variables (removed 0) and now considering 21960/21960 (removed 0) transitions.
// Phase 1: matrix 21960 rows 7923 cols
[2023-03-11 04:31:43] [INFO ] Computed 62 place invariants in 2157 ms
[2023-03-11 04:31:45] [INFO ] Implicit Places using invariants in 3481 ms returned []
Implicit Place search using SMT only with invariants took 3482 ms to find 0 implicit places.
[2023-03-11 04:31:45] [INFO ] Invariant cache hit.
[2023-03-11 04:31:45] [INFO ] Dead Transitions using invariants and state equation in 655 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5684 ms. Remains : 7923/7923 places, 21960/21960 transitions.
Treatment of property CANInsertWithFailure-PT-060-LTLFireability-15 finished in 268917 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F((p0||G(p1))))'
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(F(p0)))'
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(((p0||X(!p0))&&(X(!p0)||F((p1&&X(p2))))))))'
Found a Shortening insensitive property : CANInsertWithFailure-PT-060-LTLFireability-10
Stuttering acceptance computed with spot in 327 ms :[(OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (AND p0 (NOT p2)), false, false]
Support contains 4 out of 7923 places. Attempting structural reductions.
Starting structural reductions in LI_LTL mode, iteration 0 : 7923/7923 places, 21960/21960 transitions.
Drop transitions removed 418 transitions
Trivial Post-agglo rules discarded 418 transitions
Performed 418 trivial Post agglomeration. Transition count delta: 418
Iterating post reduction 0 with 418 rules applied. Total rules applied 418 place count 7923 transition count 21542
Reduce places removed 418 places and 0 transitions.
Iterating post reduction 1 with 418 rules applied. Total rules applied 836 place count 7505 transition count 21542
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 836 place count 7505 transition count 21541
Deduced a syphon composed of 1 places in 5 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 838 place count 7504 transition count 21541
Performed 3538 Post agglomeration using F-continuation condition.Transition count delta: 3538
Deduced a syphon composed of 3538 places in 8 ms
Reduce places removed 3538 places and 0 transitions.
Iterating global reduction 2 with 7076 rules applied. Total rules applied 7914 place count 3966 transition count 18003
Drop transitions removed 3422 transitions
Redundant transition composition rules discarded 3422 transitions
Iterating global reduction 2 with 3422 rules applied. Total rules applied 11336 place count 3966 transition count 14581
Applied a total of 11336 rules in 4130 ms. Remains 3966 /7923 variables (removed 3957) and now considering 14581/21960 (removed 7379) transitions.
// Phase 1: matrix 14581 rows 3966 cols
[2023-03-11 04:31:51] [INFO ] Computed 62 place invariants in 1014 ms
[2023-03-11 04:31:52] [INFO ] Implicit Places using invariants in 1956 ms returned []
Implicit Place search using SMT only with invariants took 1957 ms to find 0 implicit places.
[2023-03-11 04:31:52] [INFO ] Invariant cache hit.
[2023-03-11 04:31:59] [INFO ] Dead Transitions using invariants and state equation in 7071 ms found 0 transitions.
Starting structural reductions in LI_LTL mode, iteration 1 : 3966/7923 places, 14581/21960 transitions.
Finished structural reductions in LI_LTL mode , in 1 iterations and 13160 ms. Remains : 3966/7923 places, 14581/21960 transitions.
Running random walk in product with property : CANInsertWithFailure-PT-060-LTLFireability-10 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={0} source=0 dest: 1}, { cond=(AND p0 (NOT p1)), acceptance={} source=0 dest: 2}, { cond=(AND p0 p1), acceptance={} source=0 dest: 3}], [{ cond=p0, acceptance={} source=1 dest: 0}, { cond=(AND p0 (NOT p1)), acceptance={} source=1 dest: 2}, { cond=(AND p0 p1), acceptance={} source=1 dest: 3}], [{ cond=(AND p0 (NOT p1)), acceptance={0} source=2 dest: 2}, { cond=(AND p0 p1), acceptance={0} source=2 dest: 3}, { cond=(AND p0 (NOT p1)), acceptance={} source=2 dest: 4}, { cond=(AND p0 p1), acceptance={} source=2 dest: 5}], [{ cond=(AND p0 (NOT p1) (NOT p2)), acceptance={0} source=3 dest: 2}, { cond=(AND p0 p1 (NOT p2)), acceptance={0} source=3 dest: 3}, { cond=(AND p0 (NOT p1) (NOT p2)), acceptance={} source=3 dest: 4}, { cond=(AND p0 p1 (NOT p2)), acceptance={} source=3 dest: 5}], [{ cond=(AND (NOT p0) (NOT p1)), acceptance={0} source=4 dest: 2}, { cond=(AND (NOT p0) p1), acceptance={0} source=4 dest: 3}, { cond=(AND (NOT p0) (NOT p1)), acceptance={} source=4 dest: 4}, { cond=(AND (NOT p0) p1), acceptance={} source=4 dest: 5}], [{ cond=(AND (NOT p0) (NOT p1) (NOT p2)), acceptance={0} source=5 dest: 2}, { cond=(AND (NOT p0) p1 (NOT p2)), acceptance={0} source=5 dest: 3}, { cond=(AND (NOT p0) (NOT p1) (NOT p2)), acceptance={} source=5 dest: 4}, { cond=(AND (NOT p0) p1 (NOT p2)), acceptance={} source=5 dest: 5}]], initial=0, aps=[p0:(GEQ s3845 1), p1:(OR (LT s107 1) (LT s163 1)), p2:(LT s3939 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive, cl-invariant], stateDesc=[null, null, null, null, null, null][false, false, false, false, false, false]]
Product exploration explored 100000 steps with 33331 reset in 2863 ms.
Product exploration explored 100000 steps with 33219 reset in 2795 ms.
Computed a total of 181 stabilizing places and 300 stable transitions
Computed a total of 181 stabilizing places and 300 stable transitions
Knowledge obtained : [(AND (NOT p0) p1 p2), (X (NOT (AND p0 (NOT p1) (NOT p2)))), (X (NOT (AND p0 p1 (NOT p2)))), (X (NOT (AND p0 p1))), (X (NOT (AND p0 (NOT p1)))), (X (NOT p0)), true, (X (X (NOT p0))), (X (X (AND (NOT p0) p1))), (X (X (NOT (AND (NOT p0) (NOT p1) (NOT p2))))), (X (X (NOT (AND (NOT p0) p1 (NOT p2))))), (X (X (NOT (AND p0 (NOT p1) (NOT p2))))), (X (X (NOT (AND p0 p1 (NOT p2))))), (X (X (NOT (AND p0 p1)))), (X (X (NOT (AND p0 (NOT p1))))), (X (X (NOT (AND (NOT p0) (NOT p1)))))]
False Knowledge obtained : []
Knowledge based reduction with 16 factoid took 662 ms. Reduced automaton from 6 states, 23 edges and 3 AP (stutter sensitive) to 6 states, 23 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 243 ms :[(OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (AND p0 (NOT p2)), false, false]
Incomplete random walk after 10000 steps, including 32 resets, run finished after 723 ms. (steps per millisecond=13 ) properties (out of 9) seen :4
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
[2023-03-11 04:32:07] [INFO ] Invariant cache hit.
[2023-03-11 04:32:08] [INFO ] [Real]Absence check using 60 positive place invariants in 36 ms returned sat
[2023-03-11 04:32:08] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 46 ms returned sat
[2023-03-11 04:32:16] [INFO ] After 8318ms SMT Verify possible using state equation in real domain returned unsat :0 sat :2 real:3
[2023-03-11 04:32:16] [INFO ] State equation strengthened by 10735 read => feed constraints.
[2023-03-11 04:32:19] [INFO ] After 2814ms SMT Verify possible using 10735 Read/Feed constraints in real domain returned unsat :0 sat :0 real:5
[2023-03-11 04:32:19] [INFO ] After 11899ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:5
[2023-03-11 04:32:20] [INFO ] [Nat]Absence check using 60 positive place invariants in 36 ms returned sat
[2023-03-11 04:32:20] [INFO ] [Nat]Absence check using 60 positive and 2 generalized place invariants in 53 ms returned sat
[2023-03-11 04:32:30] [INFO ] After 10631ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :5
[2023-03-11 04:32:35] [INFO ] After 4303ms SMT Verify possible using 10735 Read/Feed constraints in natural domain returned unsat :0 sat :5
[2023-03-11 04:32:39] [INFO ] After 8363ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :5
Attempting to minimize the solution found.
Minimization took 3181 ms.
[2023-03-11 04:32:42] [INFO ] After 23105ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :5
Fused 5 Parikh solutions to 4 different solutions.
Parikh walk visited 1 properties in 34 ms.
Support contains 4 out of 3966 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3966/3966 places, 14581/14581 transitions.
Free-agglomeration rule (complex) applied 2 times.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 3966 transition count 14579
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 3964 transition count 14579
Partial Free-agglomeration rule applied 3661 times.
Drop transitions removed 3661 transitions
Iterating global reduction 1 with 3661 rules applied. Total rules applied 3665 place count 3964 transition count 14579
Partial Free-agglomeration rule applied 60 times.
Drop transitions removed 60 transitions
Iterating global reduction 1 with 60 rules applied. Total rules applied 3725 place count 3964 transition count 14579
Applied a total of 3725 rules in 3462 ms. Remains 3964 /3966 variables (removed 2) and now considering 14579/14581 (removed 2) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 3463 ms. Remains : 3964/3966 places, 14579/14581 transitions.
Incomplete random walk after 10000 steps, including 36 resets, run finished after 284 ms. (steps per millisecond=35 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 55081 steps, run timeout after 3001 ms. (steps per millisecond=18 ) properties seen :{}
Probabilistic random walk after 55081 steps, saw 29699 distinct states, run finished after 3001 ms. (steps per millisecond=18 ) properties seen :0
Running SMT prover for 4 properties.
// Phase 1: matrix 14579 rows 3964 cols
[2023-03-11 04:32:50] [INFO ] Computed 62 place invariants in 637 ms
[2023-03-11 04:32:50] [INFO ] [Real]Absence check using 60 positive place invariants in 41 ms returned sat
[2023-03-11 04:32:50] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 56 ms returned sat
[2023-03-11 04:32:55] [INFO ] After 5163ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-11 04:32:55] [INFO ] [Nat]Absence check using 60 positive place invariants in 66 ms returned sat
[2023-03-11 04:32:55] [INFO ] [Nat]Absence check using 60 positive and 2 generalized place invariants in 68 ms returned sat
[2023-03-11 04:33:05] [INFO ] After 9202ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-11 04:33:05] [INFO ] State equation strengthened by 14395 read => feed constraints.
[2023-03-11 04:33:12] [INFO ] After 6491ms SMT Verify possible using 14395 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-03-11 04:33:16] [INFO ] After 11167ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 2415 ms.
[2023-03-11 04:33:19] [INFO ] After 23924ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Parikh walk visited 0 properties in 159 ms.
Support contains 4 out of 3964 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3964/3964 places, 14579/14579 transitions.
Applied a total of 0 rules in 1006 ms. Remains 3964 /3964 variables (removed 0) and now considering 14579/14579 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1006 ms. Remains : 3964/3964 places, 14579/14579 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3964/3964 places, 14579/14579 transitions.
Applied a total of 0 rules in 1100 ms. Remains 3964 /3964 variables (removed 0) and now considering 14579/14579 (removed 0) transitions.
[2023-03-11 04:33:21] [INFO ] Invariant cache hit.
[2023-03-11 04:33:27] [INFO ] Implicit Places using invariants in 5620 ms returned []
Implicit Place search using SMT only with invariants took 5621 ms to find 0 implicit places.
[2023-03-11 04:33:27] [INFO ] Invariant cache hit.
[2023-03-11 04:33:33] [INFO ] Dead Transitions using invariants and state equation in 6923 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 13647 ms. Remains : 3964/3964 places, 14579/14579 transitions.
Graph (trivial) has 14094 edges and 3964 vertex of which 3656 / 3964 are part of one of the 2 SCC in 3 ms
Free SCC test removed 3654 places
Drop transitions removed 10439 transitions
Ensure Unique test removed 3645 transitions
Reduce isomorphic transitions removed 14084 transitions.
Graph (complete) has 858 edges and 310 vertex of which 133 are kept as prefixes of interest. Removing 177 places using SCC suffix rule.1 ms
Discarding 177 places :
Also discarding 58 output transitions
Drop transitions removed 58 transitions
Drop transitions removed 177 transitions
Reduce isomorphic transitions removed 177 transitions.
Iterating post reduction 0 with 177 rules applied. Total rules applied 179 place count 133 transition count 260
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 1 with 1 Pre rules applied. Total rules applied 179 place count 133 transition count 259
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 1 with 2 rules applied. Total rules applied 181 place count 132 transition count 259
Discarding 115 places :
Symmetric choice reduction at 1 with 115 rule applications. Total rules 296 place count 17 transition count 87
Iterating global reduction 1 with 115 rules applied. Total rules applied 411 place count 17 transition count 87
Ensure Unique test removed 57 transitions
Reduce isomorphic transitions removed 57 transitions.
Iterating post reduction 1 with 57 rules applied. Total rules applied 468 place count 17 transition count 30
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 470 place count 16 transition count 29
Drop transitions removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 2 with 3 rules applied. Total rules applied 473 place count 16 transition count 26
Free-agglomeration rule applied 2 times.
Iterating global reduction 2 with 2 rules applied. Total rules applied 475 place count 16 transition count 24
Reduce places removed 2 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 478 place count 14 transition count 23
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 479 place count 14 transition count 23
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 480 place count 13 transition count 22
Iterating global reduction 3 with 1 rules applied. Total rules applied 481 place count 13 transition count 22
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 3 with 2 rules applied. Total rules applied 483 place count 13 transition count 20
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 3 with 1 rules applied. Total rules applied 484 place count 12 transition count 19
Applied a total of 484 rules in 99 ms. Remains 12 /3964 variables (removed 3952) and now considering 19/14579 (removed 14560) transitions.
Running SMT prover for 4 properties.
// Phase 1: matrix 19 rows 12 cols
[2023-03-11 04:33:34] [INFO ] Computed 1 place invariants in 0 ms
[2023-03-11 04:33:34] [INFO ] [Real]Absence check using 1 positive place invariants in 1 ms returned sat
[2023-03-11 04:33:34] [INFO ] After 24ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-11 04:33:34] [INFO ] [Nat]Absence check using 1 positive place invariants in 1 ms returned sat
[2023-03-11 04:33:34] [INFO ] After 10ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-11 04:33:34] [INFO ] After 21ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 4 ms.
[2023-03-11 04:33:34] [INFO ] After 47ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Knowledge obtained : [(AND (NOT p0) p1 p2), (X (NOT (AND p0 (NOT p1) (NOT p2)))), (X (NOT (AND p0 p1 (NOT p2)))), (X (NOT (AND p0 p1))), (X (NOT (AND p0 (NOT p1)))), (X (NOT p0)), true, (X (X (NOT p0))), (X (X (AND (NOT p0) p1))), (X (X (NOT (AND (NOT p0) (NOT p1) (NOT p2))))), (X (X (NOT (AND (NOT p0) p1 (NOT p2))))), (X (X (NOT (AND p0 (NOT p1) (NOT p2))))), (X (X (NOT (AND p0 p1 (NOT p2))))), (X (X (NOT (AND p0 p1)))), (X (X (NOT (AND p0 (NOT p1))))), (X (X (NOT (AND (NOT p0) (NOT p1)))))]
False Knowledge obtained : [(F (NOT (AND (NOT p0) p1))), (F (AND (NOT p0) (NOT p1))), (F p0), (F (AND p0 p1)), (F (AND (NOT p2) (NOT p0) p1))]
Knowledge based reduction with 16 factoid took 657 ms. Reduced automaton from 6 states, 23 edges and 3 AP (stutter sensitive) to 6 states, 23 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 188 ms :[(OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (AND p0 (NOT p2)), false, false]
Stuttering acceptance computed with spot in 151 ms :[(OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (AND p0 (NOT p2)), false, false]
Support contains 4 out of 3966 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 3966/3966 places, 14581/14581 transitions.
Applied a total of 0 rules in 560 ms. Remains 3966 /3966 variables (removed 0) and now considering 14581/14581 (removed 0) transitions.
// Phase 1: matrix 14581 rows 3966 cols
[2023-03-11 04:33:36] [INFO ] Computed 62 place invariants in 1004 ms
[2023-03-11 04:33:37] [INFO ] Implicit Places using invariants in 1917 ms returned []
Implicit Place search using SMT only with invariants took 1930 ms to find 0 implicit places.
[2023-03-11 04:33:37] [INFO ] Invariant cache hit.
[2023-03-11 04:33:44] [INFO ] Dead Transitions using invariants and state equation in 7102 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9594 ms. Remains : 3966/3966 places, 14581/14581 transitions.
Computed a total of 181 stabilizing places and 300 stable transitions
Computed a total of 181 stabilizing places and 300 stable transitions
Knowledge obtained : [(AND (NOT p0) p1 p2), (X (NOT (AND (NOT p2) p0 (NOT p1)))), (X (NOT (AND p0 p1))), (X (NOT (AND p0 (NOT p1)))), (X (NOT p0)), (X (NOT (AND (NOT p2) p0 p1))), true, (X (X (NOT p0))), (X (X (AND (NOT p0) p1))), (X (X (NOT (AND (NOT p2) p0 (NOT p1))))), (X (X (NOT (AND (NOT p2) (NOT p0) (NOT p1))))), (X (X (NOT (AND p0 p1)))), (X (X (NOT (AND (NOT p2) (NOT p0) p1)))), (X (X (NOT (AND p0 (NOT p1))))), (X (X (NOT (AND (NOT p2) p0 p1)))), (X (X (NOT (AND (NOT p0) (NOT p1)))))]
False Knowledge obtained : []
Knowledge based reduction with 16 factoid took 673 ms. Reduced automaton from 6 states, 23 edges and 3 AP (stutter sensitive) to 6 states, 23 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 319 ms :[(OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (AND p0 (NOT p2)), false, false]
Incomplete random walk after 10000 steps, including 32 resets, run finished after 925 ms. (steps per millisecond=10 ) properties (out of 9) seen :4
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
[2023-03-11 04:33:46] [INFO ] Invariant cache hit.
[2023-03-11 04:33:47] [INFO ] [Real]Absence check using 60 positive place invariants in 28 ms returned sat
[2023-03-11 04:33:47] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 39 ms returned sat
[2023-03-11 04:33:55] [INFO ] After 8053ms SMT Verify possible using state equation in real domain returned unsat :0 sat :2 real:3
[2023-03-11 04:33:55] [INFO ] State equation strengthened by 10735 read => feed constraints.
[2023-03-11 04:33:58] [INFO ] After 2656ms SMT Verify possible using 10735 Read/Feed constraints in real domain returned unsat :0 sat :0 real:5
[2023-03-11 04:33:58] [INFO ] After 11682ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:5
[2023-03-11 04:33:59] [INFO ] [Nat]Absence check using 60 positive place invariants in 60 ms returned sat
[2023-03-11 04:33:59] [INFO ] [Nat]Absence check using 60 positive and 2 generalized place invariants in 69 ms returned sat
[2023-03-11 04:34:10] [INFO ] After 10510ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :5
[2023-03-11 04:34:14] [INFO ] After 4587ms SMT Verify possible using 10735 Read/Feed constraints in natural domain returned unsat :0 sat :5
[2023-03-11 04:34:18] [INFO ] After 8629ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :5
Attempting to minimize the solution found.
Minimization took 3117 ms.
[2023-03-11 04:34:21] [INFO ] After 23407ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :5
Fused 5 Parikh solutions to 4 different solutions.
Parikh walk visited 1 properties in 37 ms.
Support contains 4 out of 3966 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3966/3966 places, 14581/14581 transitions.
Free-agglomeration rule (complex) applied 2 times.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 3966 transition count 14579
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 4 place count 3964 transition count 14579
Partial Free-agglomeration rule applied 3661 times.
Drop transitions removed 3661 transitions
Iterating global reduction 1 with 3661 rules applied. Total rules applied 3665 place count 3964 transition count 14579
Partial Free-agglomeration rule applied 60 times.
Drop transitions removed 60 transitions
Iterating global reduction 1 with 60 rules applied. Total rules applied 3725 place count 3964 transition count 14579
Applied a total of 3725 rules in 3649 ms. Remains 3964 /3966 variables (removed 2) and now considering 14579/14581 (removed 2) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 3650 ms. Remains : 3964/3966 places, 14579/14581 transitions.
Incomplete random walk after 10000 steps, including 36 resets, run finished after 316 ms. (steps per millisecond=31 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 64663 steps, run timeout after 3001 ms. (steps per millisecond=21 ) properties seen :{}
Probabilistic random walk after 64663 steps, saw 31031 distinct states, run finished after 3001 ms. (steps per millisecond=21 ) properties seen :0
Running SMT prover for 4 properties.
// Phase 1: matrix 14579 rows 3964 cols
[2023-03-11 04:34:29] [INFO ] Computed 62 place invariants in 625 ms
[2023-03-11 04:34:30] [INFO ] [Real]Absence check using 60 positive place invariants in 50 ms returned sat
[2023-03-11 04:34:30] [INFO ] [Real]Absence check using 60 positive and 2 generalized place invariants in 52 ms returned sat
[2023-03-11 04:34:34] [INFO ] After 5113ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-11 04:34:35] [INFO ] [Nat]Absence check using 60 positive place invariants in 46 ms returned sat
[2023-03-11 04:34:35] [INFO ] [Nat]Absence check using 60 positive and 2 generalized place invariants in 56 ms returned sat
[2023-03-11 04:34:44] [INFO ] After 8803ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-11 04:34:44] [INFO ] State equation strengthened by 14395 read => feed constraints.
[2023-03-11 04:34:51] [INFO ] After 6246ms SMT Verify possible using 14395 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-03-11 04:34:55] [INFO ] After 10802ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 2335 ms.
[2023-03-11 04:34:57] [INFO ] After 23144ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Parikh walk visited 0 properties in 146 ms.
Support contains 4 out of 3964 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3964/3964 places, 14579/14579 transitions.
Applied a total of 0 rules in 947 ms. Remains 3964 /3964 variables (removed 0) and now considering 14579/14579 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 948 ms. Remains : 3964/3964 places, 14579/14579 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 3964/3964 places, 14579/14579 transitions.
Applied a total of 0 rules in 1025 ms. Remains 3964 /3964 variables (removed 0) and now considering 14579/14579 (removed 0) transitions.
[2023-03-11 04:35:00] [INFO ] Invariant cache hit.
[2023-03-11 04:35:05] [INFO ] Implicit Places using invariants in 5583 ms returned []
Implicit Place search using SMT only with invariants took 5584 ms to find 0 implicit places.
[2023-03-11 04:35:05] [INFO ] Invariant cache hit.
[2023-03-11 04:35:12] [INFO ] Dead Transitions using invariants and state equation in 7147 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 13771 ms. Remains : 3964/3964 places, 14579/14579 transitions.
Graph (trivial) has 14094 edges and 3964 vertex of which 3656 / 3964 are part of one of the 2 SCC in 4 ms
Free SCC test removed 3654 places
Drop transitions removed 10439 transitions
Ensure Unique test removed 3645 transitions
Reduce isomorphic transitions removed 14084 transitions.
Graph (complete) has 858 edges and 310 vertex of which 133 are kept as prefixes of interest. Removing 177 places using SCC suffix rule.0 ms
Discarding 177 places :
Also discarding 58 output transitions
Drop transitions removed 58 transitions
Drop transitions removed 177 transitions
Reduce isomorphic transitions removed 177 transitions.
Iterating post reduction 0 with 177 rules applied. Total rules applied 179 place count 133 transition count 260
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 1 with 1 Pre rules applied. Total rules applied 179 place count 133 transition count 259
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 1 with 2 rules applied. Total rules applied 181 place count 132 transition count 259
Discarding 115 places :
Symmetric choice reduction at 1 with 115 rule applications. Total rules 296 place count 17 transition count 87
Iterating global reduction 1 with 115 rules applied. Total rules applied 411 place count 17 transition count 87
Ensure Unique test removed 57 transitions
Reduce isomorphic transitions removed 57 transitions.
Iterating post reduction 1 with 57 rules applied. Total rules applied 468 place count 17 transition count 30
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 470 place count 16 transition count 29
Drop transitions removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 2 with 3 rules applied. Total rules applied 473 place count 16 transition count 26
Free-agglomeration rule applied 2 times.
Iterating global reduction 2 with 2 rules applied. Total rules applied 475 place count 16 transition count 24
Reduce places removed 2 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 478 place count 14 transition count 23
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 479 place count 14 transition count 23
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 480 place count 13 transition count 22
Iterating global reduction 3 with 1 rules applied. Total rules applied 481 place count 13 transition count 22
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 3 with 2 rules applied. Total rules applied 483 place count 13 transition count 20
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 3 with 1 rules applied. Total rules applied 484 place count 12 transition count 19
Applied a total of 484 rules in 49 ms. Remains 12 /3964 variables (removed 3952) and now considering 19/14579 (removed 14560) transitions.
Running SMT prover for 4 properties.
// Phase 1: matrix 19 rows 12 cols
[2023-03-11 04:35:12] [INFO ] Computed 1 place invariants in 0 ms
[2023-03-11 04:35:12] [INFO ] [Real]Absence check using 1 positive place invariants in 0 ms returned sat
[2023-03-11 04:35:12] [INFO ] After 40ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-11 04:35:12] [INFO ] [Nat]Absence check using 1 positive place invariants in 0 ms returned sat
[2023-03-11 04:35:12] [INFO ] After 8ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-11 04:35:12] [INFO ] After 14ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 5 ms.
[2023-03-11 04:35:13] [INFO ] After 58ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Knowledge obtained : [(AND (NOT p0) p1 p2), (X (NOT (AND (NOT p2) p0 (NOT p1)))), (X (NOT (AND p0 p1))), (X (NOT (AND p0 (NOT p1)))), (X (NOT p0)), (X (NOT (AND (NOT p2) p0 p1))), true, (X (X (NOT p0))), (X (X (AND (NOT p0) p1))), (X (X (NOT (AND (NOT p2) p0 (NOT p1))))), (X (X (NOT (AND (NOT p2) (NOT p0) (NOT p1))))), (X (X (NOT (AND p0 p1)))), (X (X (NOT (AND (NOT p2) (NOT p0) p1)))), (X (X (NOT (AND p0 (NOT p1))))), (X (X (NOT (AND (NOT p2) p0 p1)))), (X (X (NOT (AND (NOT p0) (NOT p1)))))]
False Knowledge obtained : [(F (NOT (AND (NOT p0) p1))), (F (AND (NOT p0) (NOT p1))), (F p0), (F (AND p0 p1)), (F (AND (NOT p2) (NOT p0) p1))]
Knowledge based reduction with 16 factoid took 579 ms. Reduced automaton from 6 states, 23 edges and 3 AP (stutter sensitive) to 6 states, 23 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 184 ms :[(OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (AND p0 (NOT p2)), false, false]
Stuttering acceptance computed with spot in 165 ms :[(OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (AND p0 (NOT p2)), false, false]
Stuttering acceptance computed with spot in 169 ms :[(OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (OR (AND p0 (NOT p1)) (AND p0 (NOT p2))), (AND p0 (NOT p2)), false, false]
Product exploration explored 100000 steps with 33455 reset in 2436 ms.
Product exploration explored 100000 steps with 33384 reset in 2437 ms.
Support contains 4 out of 3966 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 3966/3966 places, 14581/14581 transitions.
Applied a total of 0 rules in 901 ms. Remains 3966 /3966 variables (removed 0) and now considering 14581/14581 (removed 0) transitions.
// Phase 1: matrix 14581 rows 3966 cols
[2023-03-11 04:35:21] [INFO ] Computed 62 place invariants in 1002 ms
[2023-03-11 04:35:24] [INFO ] Implicit Places using invariants in 4260 ms returned []
Implicit Place search using SMT only with invariants took 4262 ms to find 0 implicit places.
[2023-03-11 04:35:24] [INFO ] Invariant cache hit.
[2023-03-11 04:35:30] [INFO ] Dead Transitions using invariants and state equation in 6472 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11643 ms. Remains : 3966/3966 places, 14581/14581 transitions.
Treatment of property CANInsertWithFailure-PT-060-LTLFireability-10 finished in 224710 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(F((p0&&X(X(p1))))))'
[2023-03-11 04:35:31] [INFO ] Flatten gal took : 574 ms
[2023-03-11 04:35:31] [INFO ] Export to MCC of 4 properties in file /home/mcc/execution/LTLFireability.sr.xml took 2 ms.
[2023-03-11 04:35:31] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 7923 places, 21960 transitions and 58680 arcs took 88 ms.
Total runtime 1196522 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT CANInsertWithFailure-PT-060
BK_EXAMINATION: LTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
LTLFireability

FORMULA CANInsertWithFailure-PT-060-LTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678510229710

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/LTLFireability.xml
lola: Rule S: 0 transitions removed,0 places removed
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 0 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 0 0 0 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 0 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 17 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 22 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 27 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 32 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 37 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 42 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 47 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
lola: LAUNCH task # 1 (type EXCL) for 0 CANInsertWithFailure-PT-060-LTLFireability-00
lola: time limit : 887 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 3/887 1/32 CANInsertWithFailure-PT-060-LTLFireability-00 2879 m, 575 m/sec, 6600 t fired, .

Time elapsed: 52 secs. Pages in use: 1
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 8/887 1/32 CANInsertWithFailure-PT-060-LTLFireability-00 12056 m, 1835 m/sec, 30918 t fired, .

Time elapsed: 57 secs. Pages in use: 1
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 13/887 2/32 CANInsertWithFailure-PT-060-LTLFireability-00 21881 m, 1965 m/sec, 57688 t fired, .

Time elapsed: 62 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 18/887 2/32 CANInsertWithFailure-PT-060-LTLFireability-00 30363 m, 1696 m/sec, 80390 t fired, .

Time elapsed: 67 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 23/887 3/32 CANInsertWithFailure-PT-060-LTLFireability-00 38554 m, 1638 m/sec, 102348 t fired, .

Time elapsed: 72 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 28/887 3/32 CANInsertWithFailure-PT-060-LTLFireability-00 45858 m, 1460 m/sec, 122963 t fired, .

Time elapsed: 77 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 33/887 4/32 CANInsertWithFailure-PT-060-LTLFireability-00 55527 m, 1933 m/sec, 149607 t fired, .

Time elapsed: 82 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 38/887 4/32 CANInsertWithFailure-PT-060-LTLFireability-00 63448 m, 1584 m/sec, 172483 t fired, .

Time elapsed: 87 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 43/887 4/32 CANInsertWithFailure-PT-060-LTLFireability-00 71189 m, 1548 m/sec, 194039 t fired, .

Time elapsed: 92 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 48/887 5/32 CANInsertWithFailure-PT-060-LTLFireability-00 79157 m, 1593 m/sec, 216486 t fired, .

Time elapsed: 97 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 53/887 5/32 CANInsertWithFailure-PT-060-LTLFireability-00 88086 m, 1785 m/sec, 241707 t fired, .

Time elapsed: 102 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 58/887 6/32 CANInsertWithFailure-PT-060-LTLFireability-00 96812 m, 1745 m/sec, 266461 t fired, .

Time elapsed: 107 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 63/887 6/32 CANInsertWithFailure-PT-060-LTLFireability-00 106143 m, 1866 m/sec, 292819 t fired, .

Time elapsed: 112 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 68/887 7/32 CANInsertWithFailure-PT-060-LTLFireability-00 115893 m, 1950 m/sec, 320106 t fired, .

Time elapsed: 117 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 73/887 7/32 CANInsertWithFailure-PT-060-LTLFireability-00 125736 m, 1968 m/sec, 347345 t fired, .

Time elapsed: 122 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 78/887 8/32 CANInsertWithFailure-PT-060-LTLFireability-00 134646 m, 1782 m/sec, 372879 t fired, .

Time elapsed: 127 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 83/887 8/32 CANInsertWithFailure-PT-060-LTLFireability-00 145298 m, 2130 m/sec, 402920 t fired, .

Time elapsed: 132 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 88/887 9/32 CANInsertWithFailure-PT-060-LTLFireability-00 155095 m, 1959 m/sec, 431088 t fired, .

Time elapsed: 137 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 93/887 9/32 CANInsertWithFailure-PT-060-LTLFireability-00 165072 m, 1995 m/sec, 459180 t fired, .

Time elapsed: 142 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 98/887 10/32 CANInsertWithFailure-PT-060-LTLFireability-00 174675 m, 1920 m/sec, 486404 t fired, .

Time elapsed: 147 secs. Pages in use: 10
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 103/887 10/32 CANInsertWithFailure-PT-060-LTLFireability-00 185195 m, 2104 m/sec, 516271 t fired, .

Time elapsed: 152 secs. Pages in use: 10
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 108/887 11/32 CANInsertWithFailure-PT-060-LTLFireability-00 194911 m, 1943 m/sec, 544103 t fired, .

Time elapsed: 157 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 113/887 11/32 CANInsertWithFailure-PT-060-LTLFireability-00 203673 m, 1752 m/sec, 567708 t fired, .

Time elapsed: 162 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 118/887 12/32 CANInsertWithFailure-PT-060-LTLFireability-00 211281 m, 1521 m/sec, 588273 t fired, .

Time elapsed: 167 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 123/887 12/32 CANInsertWithFailure-PT-060-LTLFireability-00 219837 m, 1711 m/sec, 612304 t fired, .

Time elapsed: 172 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 128/887 13/32 CANInsertWithFailure-PT-060-LTLFireability-00 228738 m, 1780 m/sec, 637172 t fired, .

Time elapsed: 177 secs. Pages in use: 13
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 133/887 13/32 CANInsertWithFailure-PT-060-LTLFireability-00 238293 m, 1911 m/sec, 664259 t fired, .

Time elapsed: 182 secs. Pages in use: 13
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 138/887 14/32 CANInsertWithFailure-PT-060-LTLFireability-00 248185 m, 1978 m/sec, 691890 t fired, .

Time elapsed: 187 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 143/887 14/32 CANInsertWithFailure-PT-060-LTLFireability-00 257536 m, 1870 m/sec, 718679 t fired, .

Time elapsed: 192 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 148/887 15/32 CANInsertWithFailure-PT-060-LTLFireability-00 266796 m, 1852 m/sec, 744724 t fired, .

Time elapsed: 197 secs. Pages in use: 15
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 153/887 15/32 CANInsertWithFailure-PT-060-LTLFireability-00 275616 m, 1764 m/sec, 769423 t fired, .

Time elapsed: 202 secs. Pages in use: 15
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 158/887 16/32 CANInsertWithFailure-PT-060-LTLFireability-00 283387 m, 1554 m/sec, 790855 t fired, .

Time elapsed: 207 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 163/887 16/32 CANInsertWithFailure-PT-060-LTLFireability-00 290561 m, 1434 m/sec, 811099 t fired, .

Time elapsed: 212 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 168/887 17/32 CANInsertWithFailure-PT-060-LTLFireability-00 299415 m, 1770 m/sec, 836134 t fired, .

Time elapsed: 217 secs. Pages in use: 17
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 173/887 17/32 CANInsertWithFailure-PT-060-LTLFireability-00 306854 m, 1487 m/sec, 856729 t fired, .

Time elapsed: 222 secs. Pages in use: 17
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 178/887 17/32 CANInsertWithFailure-PT-060-LTLFireability-00 313332 m, 1295 m/sec, 875218 t fired, .

Time elapsed: 227 secs. Pages in use: 17
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 183/887 18/32 CANInsertWithFailure-PT-060-LTLFireability-00 320406 m, 1414 m/sec, 895653 t fired, .

Time elapsed: 232 secs. Pages in use: 18
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 188/887 18/32 CANInsertWithFailure-PT-060-LTLFireability-00 328654 m, 1649 m/sec, 919572 t fired, .

Time elapsed: 237 secs. Pages in use: 18
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 193/887 19/32 CANInsertWithFailure-PT-060-LTLFireability-00 335498 m, 1368 m/sec, 939906 t fired, .

Time elapsed: 242 secs. Pages in use: 19
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 198/887 19/32 CANInsertWithFailure-PT-060-LTLFireability-00 342103 m, 1321 m/sec, 958739 t fired, .

Time elapsed: 247 secs. Pages in use: 19
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 203/887 19/32 CANInsertWithFailure-PT-060-LTLFireability-00 348436 m, 1266 m/sec, 977380 t fired, .

Time elapsed: 252 secs. Pages in use: 19
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 208/887 20/32 CANInsertWithFailure-PT-060-LTLFireability-00 356802 m, 1673 m/sec, 1001119 t fired, .

Time elapsed: 257 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 213/887 20/32 CANInsertWithFailure-PT-060-LTLFireability-00 365311 m, 1701 m/sec, 1025401 t fired, .

Time elapsed: 262 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 218/887 21/32 CANInsertWithFailure-PT-060-LTLFireability-00 373672 m, 1672 m/sec, 1050162 t fired, .

Time elapsed: 267 secs. Pages in use: 21
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 223/887 21/32 CANInsertWithFailure-PT-060-LTLFireability-00 382853 m, 1836 m/sec, 1076848 t fired, .

Time elapsed: 272 secs. Pages in use: 21
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 228/887 22/32 CANInsertWithFailure-PT-060-LTLFireability-00 392047 m, 1838 m/sec, 1103390 t fired, .

Time elapsed: 277 secs. Pages in use: 22
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 233/887 22/32 CANInsertWithFailure-PT-060-LTLFireability-00 400841 m, 1758 m/sec, 1128510 t fired, .

Time elapsed: 282 secs. Pages in use: 22
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 238/887 23/32 CANInsertWithFailure-PT-060-LTLFireability-00 409274 m, 1686 m/sec, 1153115 t fired, .

Time elapsed: 287 secs. Pages in use: 23
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 243/887 23/32 CANInsertWithFailure-PT-060-LTLFireability-00 420273 m, 2199 m/sec, 1184500 t fired, .

Time elapsed: 292 secs. Pages in use: 23
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 248/887 24/32 CANInsertWithFailure-PT-060-LTLFireability-00 430091 m, 1963 m/sec, 1213479 t fired, .

Time elapsed: 297 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 253/887 24/32 CANInsertWithFailure-PT-060-LTLFireability-00 439344 m, 1850 m/sec, 1240806 t fired, .

Time elapsed: 302 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 258/887 25/32 CANInsertWithFailure-PT-060-LTLFireability-00 448041 m, 1739 m/sec, 1265995 t fired, .

Time elapsed: 307 secs. Pages in use: 25
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 263/887 25/32 CANInsertWithFailure-PT-060-LTLFireability-00 457282 m, 1848 m/sec, 1292311 t fired, .

Time elapsed: 312 secs. Pages in use: 25
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 268/887 25/32 CANInsertWithFailure-PT-060-LTLFireability-00 465450 m, 1633 m/sec, 1316091 t fired, .

Time elapsed: 317 secs. Pages in use: 25
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 273/887 26/32 CANInsertWithFailure-PT-060-LTLFireability-00 475293 m, 1968 m/sec, 1344180 t fired, .

Time elapsed: 322 secs. Pages in use: 26
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 278/887 27/32 CANInsertWithFailure-PT-060-LTLFireability-00 485859 m, 2113 m/sec, 1374465 t fired, .

Time elapsed: 327 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 283/887 27/32 CANInsertWithFailure-PT-060-LTLFireability-00 495658 m, 1959 m/sec, 1403220 t fired, .

Time elapsed: 332 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 288/887 28/32 CANInsertWithFailure-PT-060-LTLFireability-00 504728 m, 1814 m/sec, 1429851 t fired, .

Time elapsed: 337 secs. Pages in use: 28
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 293/887 28/32 CANInsertWithFailure-PT-060-LTLFireability-00 513520 m, 1758 m/sec, 1454908 t fired, .

Time elapsed: 342 secs. Pages in use: 28
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 298/887 29/32 CANInsertWithFailure-PT-060-LTLFireability-00 522302 m, 1756 m/sec, 1480273 t fired, .

Time elapsed: 347 secs. Pages in use: 29
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 303/887 29/32 CANInsertWithFailure-PT-060-LTLFireability-00 531785 m, 1896 m/sec, 1507900 t fired, .

Time elapsed: 352 secs. Pages in use: 29
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 308/887 30/32 CANInsertWithFailure-PT-060-LTLFireability-00 540253 m, 1693 m/sec, 1531981 t fired, .

Time elapsed: 357 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 313/887 30/32 CANInsertWithFailure-PT-060-LTLFireability-00 548221 m, 1593 m/sec, 1555024 t fired, .

Time elapsed: 362 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 318/887 30/32 CANInsertWithFailure-PT-060-LTLFireability-00 556004 m, 1556 m/sec, 1577180 t fired, .

Time elapsed: 367 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 323/887 31/32 CANInsertWithFailure-PT-060-LTLFireability-00 563921 m, 1583 m/sec, 1600408 t fired, .

Time elapsed: 372 secs. Pages in use: 31
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 328/887 31/32 CANInsertWithFailure-PT-060-LTLFireability-00 573519 m, 1919 m/sec, 1627831 t fired, .

Time elapsed: 377 secs. Pages in use: 31
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 333/887 32/32 CANInsertWithFailure-PT-060-LTLFireability-00 583035 m, 1903 m/sec, 1655480 t fired, .

Time elapsed: 382 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 338/887 32/32 CANInsertWithFailure-PT-060-LTLFireability-00 591480 m, 1689 m/sec, 1680702 t fired, .

Time elapsed: 387 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
lola: CANCELED task # 1 (type EXCL) for CANInsertWithFailure-PT-060-LTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 392 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
lola: LAUNCH task # 10 (type EXCL) for 9 CANInsertWithFailure-PT-060-LTLFireability-15
lola: time limit : 1069 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for CANInsertWithFailure-PT-060-LTLFireability-15
lola: result : true
lola: markings : 181
lola: fired transitions : 180
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 CANInsertWithFailure-PT-060-LTLFireability-10
lola: time limit : 1604 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 5/1604 5/32 CANInsertWithFailure-PT-060-LTLFireability-10 71724 m, 14344 m/sec, 112115 t fired, .

Time elapsed: 397 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 10/1604 8/32 CANInsertWithFailure-PT-060-LTLFireability-10 144233 m, 14501 m/sec, 223424 t fired, .

Time elapsed: 402 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 15/1604 9/32 CANInsertWithFailure-PT-060-LTLFireability-10 187095 m, 8572 m/sec, 350011 t fired, .

Time elapsed: 407 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 20/1604 10/32 CANInsertWithFailure-PT-060-LTLFireability-10 218501 m, 6281 m/sec, 478017 t fired, .

Time elapsed: 412 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 25/1604 11/32 CANInsertWithFailure-PT-060-LTLFireability-10 242604 m, 4820 m/sec, 603708 t fired, .

Time elapsed: 417 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 30/1604 12/32 CANInsertWithFailure-PT-060-LTLFireability-10 271958 m, 5870 m/sec, 729693 t fired, .

Time elapsed: 422 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 35/1604 13/32 CANInsertWithFailure-PT-060-LTLFireability-10 298297 m, 5267 m/sec, 858347 t fired, .

Time elapsed: 427 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 40/1604 14/32 CANInsertWithFailure-PT-060-LTLFireability-10 322986 m, 4937 m/sec, 989407 t fired, .

Time elapsed: 432 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 45/1604 15/32 CANInsertWithFailure-PT-060-LTLFireability-10 347906 m, 4984 m/sec, 1119495 t fired, .

Time elapsed: 437 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 50/1604 16/32 CANInsertWithFailure-PT-060-LTLFireability-10 383544 m, 7127 m/sec, 1246553 t fired, .

Time elapsed: 442 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 55/1604 17/32 CANInsertWithFailure-PT-060-LTLFireability-10 414863 m, 6263 m/sec, 1379209 t fired, .

Time elapsed: 447 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 60/1604 18/32 CANInsertWithFailure-PT-060-LTLFireability-10 443998 m, 5827 m/sec, 1512076 t fired, .

Time elapsed: 452 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 65/1604 18/32 CANInsertWithFailure-PT-060-LTLFireability-10 477413 m, 6683 m/sec, 1635029 t fired, .

Time elapsed: 457 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 70/1604 19/32 CANInsertWithFailure-PT-060-LTLFireability-10 507765 m, 6070 m/sec, 1764550 t fired, .

Time elapsed: 462 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 75/1604 20/32 CANInsertWithFailure-PT-060-LTLFireability-10 535395 m, 5526 m/sec, 1891276 t fired, .

Time elapsed: 467 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 80/1604 21/32 CANInsertWithFailure-PT-060-LTLFireability-10 570384 m, 6997 m/sec, 2021219 t fired, .

Time elapsed: 472 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 85/1604 22/32 CANInsertWithFailure-PT-060-LTLFireability-10 598445 m, 5612 m/sec, 2140687 t fired, .

Time elapsed: 477 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 90/1604 23/32 CANInsertWithFailure-PT-060-LTLFireability-10 620103 m, 4331 m/sec, 2260552 t fired, .

Time elapsed: 482 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 95/1604 23/32 CANInsertWithFailure-PT-060-LTLFireability-10 649526 m, 5884 m/sec, 2386145 t fired, .

Time elapsed: 487 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 100/1604 25/32 CANInsertWithFailure-PT-060-LTLFireability-10 675926 m, 5280 m/sec, 2519765 t fired, .

Time elapsed: 492 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 105/1604 25/32 CANInsertWithFailure-PT-060-LTLFireability-10 699054 m, 4625 m/sec, 2653273 t fired, .

Time elapsed: 497 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 110/1604 26/32 CANInsertWithFailure-PT-060-LTLFireability-10 725488 m, 5286 m/sec, 2784064 t fired, .

Time elapsed: 502 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 115/1604 27/32 CANInsertWithFailure-PT-060-LTLFireability-10 753954 m, 5693 m/sec, 2915457 t fired, .

Time elapsed: 507 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 120/1604 28/32 CANInsertWithFailure-PT-060-LTLFireability-10 781440 m, 5497 m/sec, 3046500 t fired, .

Time elapsed: 512 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 125/1604 29/32 CANInsertWithFailure-PT-060-LTLFireability-10 816169 m, 6945 m/sec, 3173604 t fired, .

Time elapsed: 517 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 130/1604 29/32 CANInsertWithFailure-PT-060-LTLFireability-10 846590 m, 6084 m/sec, 3303464 t fired, .

Time elapsed: 522 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 135/1604 30/32 CANInsertWithFailure-PT-060-LTLFireability-10 875000 m, 5682 m/sec, 3435917 t fired, .

Time elapsed: 527 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 140/1604 31/32 CANInsertWithFailure-PT-060-LTLFireability-10 909766 m, 6953 m/sec, 3566526 t fired, .

Time elapsed: 532 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 145/1604 32/32 CANInsertWithFailure-PT-060-LTLFireability-10 940061 m, 6059 m/sec, 3697315 t fired, .

Time elapsed: 537 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
lola: CANCELED task # 7 (type EXCL) for CANInsertWithFailure-PT-060-LTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 542 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
lola: LAUNCH task # 4 (type EXCL) for 3 CANInsertWithFailure-PT-060-LTLFireability-04
lola: time limit : 3058 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 5/3058 1/32 CANInsertWithFailure-PT-060-LTLFireability-04 8132 m, 1626 m/sec, 20767 t fired, .

Time elapsed: 547 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 10/3058 1/32 CANInsertWithFailure-PT-060-LTLFireability-04 17407 m, 1855 m/sec, 47184 t fired, .

Time elapsed: 552 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 15/3058 2/32 CANInsertWithFailure-PT-060-LTLFireability-04 26728 m, 1864 m/sec, 73797 t fired, .

Time elapsed: 557 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 20/3058 2/32 CANInsertWithFailure-PT-060-LTLFireability-04 36831 m, 2020 m/sec, 103014 t fired, .

Time elapsed: 562 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 25/3058 3/32 CANInsertWithFailure-PT-060-LTLFireability-04 44559 m, 1545 m/sec, 124958 t fired, .

Time elapsed: 567 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 30/3058 3/32 CANInsertWithFailure-PT-060-LTLFireability-04 52761 m, 1640 m/sec, 148389 t fired, .

Time elapsed: 572 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 35/3058 4/32 CANInsertWithFailure-PT-060-LTLFireability-04 59703 m, 1388 m/sec, 167999 t fired, .

Time elapsed: 577 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 40/3058 4/32 CANInsertWithFailure-PT-060-LTLFireability-04 66905 m, 1440 m/sec, 188998 t fired, .

Time elapsed: 582 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 45/3058 5/32 CANInsertWithFailure-PT-060-LTLFireability-04 75366 m, 1692 m/sec, 213936 t fired, .

Time elapsed: 587 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 50/3058 5/32 CANInsertWithFailure-PT-060-LTLFireability-04 85008 m, 1928 m/sec, 242170 t fired, .

Time elapsed: 592 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 55/3058 5/32 CANInsertWithFailure-PT-060-LTLFireability-04 92690 m, 1536 m/sec, 265733 t fired, .

Time elapsed: 597 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 60/3058 6/32 CANInsertWithFailure-PT-060-LTLFireability-04 100011 m, 1464 m/sec, 287611 t fired, .

Time elapsed: 602 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 65/3058 6/32 CANInsertWithFailure-PT-060-LTLFireability-04 107812 m, 1560 m/sec, 310363 t fired, .

Time elapsed: 607 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 70/3058 7/32 CANInsertWithFailure-PT-060-LTLFireability-04 115272 m, 1492 m/sec, 332357 t fired, .

Time elapsed: 612 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 75/3058 7/32 CANInsertWithFailure-PT-060-LTLFireability-04 122749 m, 1495 m/sec, 354680 t fired, .

Time elapsed: 617 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 80/3058 8/32 CANInsertWithFailure-PT-060-LTLFireability-04 131494 m, 1749 m/sec, 380821 t fired, .

Time elapsed: 622 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 85/3058 8/32 CANInsertWithFailure-PT-060-LTLFireability-04 140352 m, 1771 m/sec, 407161 t fired, .

Time elapsed: 627 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 90/3058 8/32 CANInsertWithFailure-PT-060-LTLFireability-04 148520 m, 1633 m/sec, 431228 t fired, .

Time elapsed: 632 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 95/3058 9/32 CANInsertWithFailure-PT-060-LTLFireability-04 157263 m, 1748 m/sec, 457288 t fired, .

Time elapsed: 637 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 100/3058 9/32 CANInsertWithFailure-PT-060-LTLFireability-04 165976 m, 1742 m/sec, 483729 t fired, .

Time elapsed: 642 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 105/3058 10/32 CANInsertWithFailure-PT-060-LTLFireability-04 175888 m, 1982 m/sec, 512925 t fired, .

Time elapsed: 647 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 110/3058 10/32 CANInsertWithFailure-PT-060-LTLFireability-04 185633 m, 1949 m/sec, 541852 t fired, .

Time elapsed: 652 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 115/3058 11/32 CANInsertWithFailure-PT-060-LTLFireability-04 196134 m, 2100 m/sec, 572033 t fired, .

Time elapsed: 657 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 120/3058 11/32 CANInsertWithFailure-PT-060-LTLFireability-04 206200 m, 2013 m/sec, 602384 t fired, .

Time elapsed: 662 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 125/3058 12/32 CANInsertWithFailure-PT-060-LTLFireability-04 215681 m, 1896 m/sec, 630947 t fired, .

Time elapsed: 667 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 130/3058 12/32 CANInsertWithFailure-PT-060-LTLFireability-04 226341 m, 2132 m/sec, 662563 t fired, .

Time elapsed: 672 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 135/3058 13/32 CANInsertWithFailure-PT-060-LTLFireability-04 237530 m, 2237 m/sec, 695365 t fired, .

Time elapsed: 677 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 140/3058 13/32 CANInsertWithFailure-PT-060-LTLFireability-04 247353 m, 1964 m/sec, 725842 t fired, .

Time elapsed: 682 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 145/3058 14/32 CANInsertWithFailure-PT-060-LTLFireability-04 257188 m, 1967 m/sec, 755712 t fired, .

Time elapsed: 687 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 150/3058 14/32 CANInsertWithFailure-PT-060-LTLFireability-04 267945 m, 2151 m/sec, 787130 t fired, .

Time elapsed: 692 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 155/3058 15/32 CANInsertWithFailure-PT-060-LTLFireability-04 278091 m, 2029 m/sec, 817749 t fired, .

Time elapsed: 697 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 160/3058 15/32 CANInsertWithFailure-PT-060-LTLFireability-04 288693 m, 2120 m/sec, 849489 t fired, .

Time elapsed: 702 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 165/3058 16/32 CANInsertWithFailure-PT-060-LTLFireability-04 298235 m, 1908 m/sec, 879309 t fired, .

Time elapsed: 707 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 170/3058 17/32 CANInsertWithFailure-PT-060-LTLFireability-04 309408 m, 2234 m/sec, 911938 t fired, .

Time elapsed: 712 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 175/3058 17/32 CANInsertWithFailure-PT-060-LTLFireability-04 318638 m, 1846 m/sec, 940770 t fired, .

Time elapsed: 717 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 180/3058 17/32 CANInsertWithFailure-PT-060-LTLFireability-04 328069 m, 1886 m/sec, 969536 t fired, .

Time elapsed: 722 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 185/3058 18/32 CANInsertWithFailure-PT-060-LTLFireability-04 336782 m, 1742 m/sec, 997780 t fired, .

Time elapsed: 727 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 190/3058 18/32 CANInsertWithFailure-PT-060-LTLFireability-04 345639 m, 1771 m/sec, 1022986 t fired, .

Time elapsed: 732 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 195/3058 19/32 CANInsertWithFailure-PT-060-LTLFireability-04 354282 m, 1728 m/sec, 1047525 t fired, .

Time elapsed: 737 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 200/3058 19/32 CANInsertWithFailure-PT-060-LTLFireability-04 361445 m, 1432 m/sec, 1068397 t fired, .

Time elapsed: 742 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 205/3058 20/32 CANInsertWithFailure-PT-060-LTLFireability-04 369813 m, 1673 m/sec, 1093159 t fired, .

Time elapsed: 747 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 210/3058 20/32 CANInsertWithFailure-PT-060-LTLFireability-04 377282 m, 1493 m/sec, 1115102 t fired, .

Time elapsed: 752 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 215/3058 21/32 CANInsertWithFailure-PT-060-LTLFireability-04 386027 m, 1749 m/sec, 1140685 t fired, .

Time elapsed: 757 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 220/3058 21/32 CANInsertWithFailure-PT-060-LTLFireability-04 394685 m, 1731 m/sec, 1166804 t fired, .

Time elapsed: 762 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 225/3058 22/32 CANInsertWithFailure-PT-060-LTLFireability-04 404201 m, 1903 m/sec, 1194580 t fired, .

Time elapsed: 767 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 230/3058 22/32 CANInsertWithFailure-PT-060-LTLFireability-04 413923 m, 1944 m/sec, 1223149 t fired, .

Time elapsed: 772 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 235/3058 23/32 CANInsertWithFailure-PT-060-LTLFireability-04 423727 m, 1960 m/sec, 1252343 t fired, .

Time elapsed: 777 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 240/3058 23/32 CANInsertWithFailure-PT-060-LTLFireability-04 433041 m, 1862 m/sec, 1280425 t fired, .

Time elapsed: 782 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 245/3058 23/32 CANInsertWithFailure-PT-060-LTLFireability-04 442402 m, 1872 m/sec, 1308500 t fired, .

Time elapsed: 787 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 250/3058 24/32 CANInsertWithFailure-PT-060-LTLFireability-04 453220 m, 2163 m/sec, 1339909 t fired, .

Time elapsed: 792 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 255/3058 24/32 CANInsertWithFailure-PT-060-LTLFireability-04 462682 m, 1892 m/sec, 1369473 t fired, .

Time elapsed: 797 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 260/3058 25/32 CANInsertWithFailure-PT-060-LTLFireability-04 469793 m, 1422 m/sec, 1389627 t fired, .

Time elapsed: 802 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 265/3058 25/32 CANInsertWithFailure-PT-060-LTLFireability-04 478261 m, 1693 m/sec, 1414728 t fired, .

Time elapsed: 807 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 270/3058 26/32 CANInsertWithFailure-PT-060-LTLFireability-04 485771 m, 1502 m/sec, 1436935 t fired, .

Time elapsed: 812 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 275/3058 26/32 CANInsertWithFailure-PT-060-LTLFireability-04 494149 m, 1675 m/sec, 1461464 t fired, .

Time elapsed: 817 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 280/3058 27/32 CANInsertWithFailure-PT-060-LTLFireability-04 503260 m, 1822 m/sec, 1489014 t fired, .

Time elapsed: 822 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 285/3058 27/32 CANInsertWithFailure-PT-060-LTLFireability-04 509819 m, 1311 m/sec, 1508291 t fired, .

Time elapsed: 827 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 290/3058 27/32 CANInsertWithFailure-PT-060-LTLFireability-04 517269 m, 1490 m/sec, 1530668 t fired, .

Time elapsed: 832 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 295/3058 28/32 CANInsertWithFailure-PT-060-LTLFireability-04 522927 m, 1131 m/sec, 1548831 t fired, .

Time elapsed: 837 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 300/3058 28/32 CANInsertWithFailure-PT-060-LTLFireability-04 530040 m, 1422 m/sec, 1570831 t fired, .

Time elapsed: 842 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 305/3058 29/32 CANInsertWithFailure-PT-060-LTLFireability-04 538875 m, 1767 m/sec, 1597308 t fired, .

Time elapsed: 847 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 310/3058 29/32 CANInsertWithFailure-PT-060-LTLFireability-04 546536 m, 1532 m/sec, 1621943 t fired, .

Time elapsed: 852 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 315/3058 29/32 CANInsertWithFailure-PT-060-LTLFireability-04 552985 m, 1289 m/sec, 1641589 t fired, .

Time elapsed: 857 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 320/3058 30/32 CANInsertWithFailure-PT-060-LTLFireability-04 559081 m, 1219 m/sec, 1660786 t fired, .

Time elapsed: 862 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 325/3058 30/32 CANInsertWithFailure-PT-060-LTLFireability-04 565674 m, 1318 m/sec, 1680265 t fired, .

Time elapsed: 867 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 330/3058 30/32 CANInsertWithFailure-PT-060-LTLFireability-04 571747 m, 1214 m/sec, 1699270 t fired, .

Time elapsed: 872 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 335/3058 31/32 CANInsertWithFailure-PT-060-LTLFireability-04 580138 m, 1678 m/sec, 1724388 t fired, .

Time elapsed: 877 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 340/3058 31/32 CANInsertWithFailure-PT-060-LTLFireability-04 587882 m, 1548 m/sec, 1747483 t fired, .

Time elapsed: 882 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 345/3058 32/32 CANInsertWithFailure-PT-060-LTLFireability-04 595942 m, 1612 m/sec, 1771222 t fired, .

Time elapsed: 887 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 350/3058 32/32 CANInsertWithFailure-PT-060-LTLFireability-04 603986 m, 1608 m/sec, 1795738 t fired, .

Time elapsed: 892 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
lola: CANCELED task # 4 (type EXCL) for CANInsertWithFailure-PT-060-LTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-060-LTLFireability-00: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-060-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 897 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 4
lola: Portfolio finished: no open tasks 4

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-060-LTLFireability-00: LTL unknown AGGR
CANInsertWithFailure-PT-060-LTLFireability-04: LTL unknown AGGR
CANInsertWithFailure-PT-060-LTLFireability-10: LTL unknown AGGR
CANInsertWithFailure-PT-060-LTLFireability-15: LTL true LTL model checker


Time elapsed: 897 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CANInsertWithFailure-PT-060"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is CANInsertWithFailure-PT-060, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r039-tajo-167813693000748"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CANInsertWithFailure-PT-060.tgz
mv CANInsertWithFailure-PT-060 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;