Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r039-tajo-167813692900722.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is CANInsertWithFailure-PT-030, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r039-tajo-167813692900722
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 6.0M
-rw-r--r-- 1 mcc users 8.3K Feb 26 00:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 72K Feb 26 00:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.8K Feb 26 00:15 CTLFireability.txt
-rw-r--r-- 1 mcc users 58K Feb 26 00:15 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.4K Feb 25 15:41 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 15:41 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K Feb 25 15:41 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:41 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.4K Feb 26 00:27 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 50K Feb 26 00:27 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.8K Feb 26 00:25 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 26 00:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 15:41 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 15:41 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 5.6M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CANInsertWithFailure-PT-030-CTLFireability-00
FORMULA_NAME CANInsertWithFailure-PT-030-CTLFireability-01
FORMULA_NAME CANInsertWithFailure-PT-030-CTLFireability-02
FORMULA_NAME CANInsertWithFailure-PT-030-CTLFireability-03
FORMULA_NAME CANInsertWithFailure-PT-030-CTLFireability-04
FORMULA_NAME CANInsertWithFailure-PT-030-CTLFireability-05
FORMULA_NAME CANInsertWithFailure-PT-030-CTLFireability-06
FORMULA_NAME CANInsertWithFailure-PT-030-CTLFireability-07
FORMULA_NAME CANInsertWithFailure-PT-030-CTLFireability-08
FORMULA_NAME CANInsertWithFailure-PT-030-CTLFireability-09
FORMULA_NAME CANInsertWithFailure-PT-030-CTLFireability-10
FORMULA_NAME CANInsertWithFailure-PT-030-CTLFireability-11
FORMULA_NAME CANInsertWithFailure-PT-030-CTLFireability-12
FORMULA_NAME CANInsertWithFailure-PT-030-CTLFireability-13
FORMULA_NAME CANInsertWithFailure-PT-030-CTLFireability-14
FORMULA_NAME CANInsertWithFailure-PT-030-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678505983019

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=CANInsertWithFailure-PT-030
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-11 03:39:44] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-11 03:39:44] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-11 03:39:44] [INFO ] Load time of PNML (sax parser for PT used): 222 ms
[2023-03-11 03:39:44] [INFO ] Transformed 2164 places.
[2023-03-11 03:39:44] [INFO ] Transformed 5580 transitions.
[2023-03-11 03:39:44] [INFO ] Parsed PT model containing 2164 places and 5580 transitions and 15000 arcs in 301 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 10 ms.
Support contains 148 out of 2164 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 2164/2164 places, 5580/5580 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 2163 transition count 5580
Applied a total of 1 rules in 203 ms. Remains 2163 /2164 variables (removed 1) and now considering 5580/5580 (removed 0) transitions.
// Phase 1: matrix 5580 rows 2163 cols
[2023-03-11 03:39:45] [INFO ] Computed 32 place invariants in 180 ms
[2023-03-11 03:39:46] [INFO ] Implicit Places using invariants in 802 ms returned []
[2023-03-11 03:39:46] [INFO ] Invariant cache hit.
[2023-03-11 03:39:46] [INFO ] State equation strengthened by 1770 read => feed constraints.
[2023-03-11 03:39:47] [INFO ] Implicit Places using invariants and state equation in 1946 ms returned []
Implicit Place search using SMT with State Equation took 2774 ms to find 0 implicit places.
[2023-03-11 03:39:47] [INFO ] Invariant cache hit.
[2023-03-11 03:39:50] [INFO ] Dead Transitions using invariants and state equation in 2734 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 2163/2164 places, 5580/5580 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5715 ms. Remains : 2163/2164 places, 5580/5580 transitions.
Support contains 148 out of 2163 places after structural reductions.
[2023-03-11 03:39:51] [INFO ] Flatten gal took : 317 ms
[2023-03-11 03:39:51] [INFO ] Flatten gal took : 177 ms
[2023-03-11 03:39:51] [INFO ] Input system was already deterministic with 5580 transitions.
Incomplete random walk after 10000 steps, including 13 resets, run finished after 454 ms. (steps per millisecond=22 ) properties (out of 101) seen :65
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 35) seen :0
Running SMT prover for 35 properties.
[2023-03-11 03:39:52] [INFO ] Invariant cache hit.
[2023-03-11 03:39:53] [INFO ] [Real]Absence check using 30 positive place invariants in 27 ms returned sat
[2023-03-11 03:39:53] [INFO ] [Real]Absence check using 30 positive and 2 generalized place invariants in 18 ms returned sat
[2023-03-11 03:39:58] [INFO ] After 4404ms SMT Verify possible using state equation in real domain returned unsat :0 sat :8 real:27
[2023-03-11 03:39:58] [INFO ] State equation strengthened by 1770 read => feed constraints.
[2023-03-11 03:40:00] [INFO ] After 2199ms SMT Verify possible using 1770 Read/Feed constraints in real domain returned unsat :0 sat :0 real:35
[2023-03-11 03:40:00] [INFO ] After 8397ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:35
[2023-03-11 03:40:02] [INFO ] [Nat]Absence check using 30 positive place invariants in 24 ms returned sat
[2023-03-11 03:40:02] [INFO ] [Nat]Absence check using 30 positive and 2 generalized place invariants in 24 ms returned sat
[2023-03-11 03:40:11] [INFO ] After 8271ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :35
[2023-03-11 03:40:25] [INFO ] After 14608ms SMT Verify possible using 1770 Read/Feed constraints in natural domain returned unsat :0 sat :34
[2023-03-11 03:40:25] [INFO ] After 14611ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :34
Attempting to minimize the solution found.
Minimization took 4 ms.
[2023-03-11 03:40:25] [INFO ] After 25071ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :34
Parikh walk visited 12 properties in 889 ms.
Support contains 51 out of 2163 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 2163/2163 places, 5580/5580 transitions.
Drop transitions removed 162 transitions
Trivial Post-agglo rules discarded 162 transitions
Performed 162 trivial Post agglomeration. Transition count delta: 162
Iterating post reduction 0 with 162 rules applied. Total rules applied 162 place count 2163 transition count 5418
Reduce places removed 162 places and 0 transitions.
Performed 31 Post agglomeration using F-continuation condition.Transition count delta: 31
Iterating post reduction 1 with 193 rules applied. Total rules applied 355 place count 2001 transition count 5387
Reduce places removed 31 places and 0 transitions.
Iterating post reduction 2 with 31 rules applied. Total rules applied 386 place count 1970 transition count 5387
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 5 Pre rules applied. Total rules applied 386 place count 1970 transition count 5382
Deduced a syphon composed of 5 places in 2 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 3 with 10 rules applied. Total rules applied 396 place count 1965 transition count 5382
Performed 820 Post agglomeration using F-continuation condition.Transition count delta: 820
Deduced a syphon composed of 820 places in 4 ms
Reduce places removed 820 places and 0 transitions.
Iterating global reduction 3 with 1640 rules applied. Total rules applied 2036 place count 1145 transition count 4562
Drop transitions removed 768 transitions
Redundant transition composition rules discarded 768 transitions
Iterating global reduction 3 with 768 rules applied. Total rules applied 2804 place count 1145 transition count 3794
Free-agglomeration rule (complex) applied 1 times.
Iterating global reduction 3 with 1 rules applied. Total rules applied 2805 place count 1145 transition count 3793
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 2806 place count 1144 transition count 3793
Partial Free-agglomeration rule applied 920 times.
Drop transitions removed 920 transitions
Iterating global reduction 4 with 920 rules applied. Total rules applied 3726 place count 1144 transition count 3793
Partial Free-agglomeration rule applied 116 times.
Drop transitions removed 116 transitions
Iterating global reduction 4 with 116 rules applied. Total rules applied 3842 place count 1144 transition count 3793
Applied a total of 3842 rules in 1034 ms. Remains 1144 /2163 variables (removed 1019) and now considering 3793/5580 (removed 1787) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1036 ms. Remains : 1144/2163 places, 3793/5580 transitions.
Incomplete random walk after 10000 steps, including 64 resets, run finished after 277 ms. (steps per millisecond=36 ) properties (out of 23) seen :14
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=625 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=666 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=666 ) properties (out of 9) seen :0
Running SMT prover for 9 properties.
// Phase 1: matrix 3793 rows 1144 cols
[2023-03-11 03:40:28] [INFO ] Computed 32 place invariants in 62 ms
[2023-03-11 03:40:28] [INFO ] [Real]Absence check using 30 positive place invariants in 13 ms returned sat
[2023-03-11 03:40:28] [INFO ] [Real]Absence check using 30 positive and 2 generalized place invariants in 15 ms returned sat
[2023-03-11 03:40:31] [INFO ] After 2231ms SMT Verify possible using state equation in real domain returned unsat :0 sat :6 real:3
[2023-03-11 03:40:31] [INFO ] State equation strengthened by 3479 read => feed constraints.
[2023-03-11 03:40:32] [INFO ] After 1672ms SMT Verify possible using 3479 Read/Feed constraints in real domain returned unsat :0 sat :0 real:9
[2023-03-11 03:40:32] [INFO ] After 4468ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:9
[2023-03-11 03:40:33] [INFO ] [Nat]Absence check using 30 positive place invariants in 31 ms returned sat
[2023-03-11 03:40:33] [INFO ] [Nat]Absence check using 30 positive and 2 generalized place invariants in 28 ms returned sat
[2023-03-11 03:40:35] [INFO ] After 2294ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :9
[2023-03-11 03:40:38] [INFO ] After 2382ms SMT Verify possible using 3479 Read/Feed constraints in natural domain returned unsat :0 sat :9
[2023-03-11 03:40:41] [INFO ] After 5324ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :9
Attempting to minimize the solution found.
Minimization took 1755 ms.
[2023-03-11 03:40:43] [INFO ] After 10147ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :9
Parikh walk visited 0 properties in 52 ms.
Support contains 25 out of 1144 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1144/1144 places, 3793/3793 transitions.
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 1144 transition count 3789
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 8 place count 1140 transition count 3789
Performed 13 Post agglomeration using F-continuation condition.Transition count delta: 13
Deduced a syphon composed of 13 places in 2 ms
Reduce places removed 13 places and 0 transitions.
Iterating global reduction 2 with 26 rules applied. Total rules applied 34 place count 1127 transition count 3776
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 35 place count 1127 transition count 3775
Free-agglomeration rule (complex) applied 1 times.
Iterating global reduction 2 with 1 rules applied. Total rules applied 36 place count 1127 transition count 3774
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 37 place count 1126 transition count 3774
Partial Free-agglomeration rule applied 66 times.
Drop transitions removed 66 transitions
Iterating global reduction 3 with 66 rules applied. Total rules applied 103 place count 1126 transition count 3774
Applied a total of 103 rules in 492 ms. Remains 1126 /1144 variables (removed 18) and now considering 3774/3793 (removed 19) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 492 ms. Remains : 1126/1144 places, 3774/3793 transitions.
Incomplete random walk after 10000 steps, including 68 resets, run finished after 458 ms. (steps per millisecond=21 ) properties (out of 9) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 8) seen :0
Running SMT prover for 8 properties.
// Phase 1: matrix 3774 rows 1126 cols
[2023-03-11 03:40:44] [INFO ] Computed 32 place invariants in 70 ms
[2023-03-11 03:40:44] [INFO ] [Real]Absence check using 30 positive place invariants in 14 ms returned sat
[2023-03-11 03:40:44] [INFO ] [Real]Absence check using 30 positive and 2 generalized place invariants in 14 ms returned sat
[2023-03-11 03:40:46] [INFO ] After 1744ms SMT Verify possible using state equation in real domain returned unsat :0 sat :3 real:5
[2023-03-11 03:40:46] [INFO ] State equation strengthened by 3622 read => feed constraints.
[2023-03-11 03:40:47] [INFO ] After 1036ms SMT Verify possible using 3622 Read/Feed constraints in real domain returned unsat :0 sat :0 real:8
[2023-03-11 03:40:47] [INFO ] After 3289ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:8
[2023-03-11 03:40:47] [INFO ] [Nat]Absence check using 30 positive place invariants in 12 ms returned sat
[2023-03-11 03:40:47] [INFO ] [Nat]Absence check using 30 positive and 2 generalized place invariants in 12 ms returned sat
[2023-03-11 03:40:49] [INFO ] After 1696ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :8
[2023-03-11 03:40:51] [INFO ] After 2248ms SMT Verify possible using 3622 Read/Feed constraints in natural domain returned unsat :0 sat :8
[2023-03-11 03:40:54] [INFO ] After 4403ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :8
Attempting to minimize the solution found.
Minimization took 1524 ms.
[2023-03-11 03:40:55] [INFO ] After 8052ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :8
Fused 8 Parikh solutions to 7 different solutions.
Parikh walk visited 0 properties in 51 ms.
Support contains 22 out of 1126 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1126/1126 places, 3774/3774 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 1125 transition count 3773
Partial Free-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 3 place count 1125 transition count 3773
Applied a total of 3 rules in 231 ms. Remains 1125 /1126 variables (removed 1) and now considering 3773/3774 (removed 1) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 231 ms. Remains : 1125/1126 places, 3773/3774 transitions.
Incomplete random walk after 10000 steps, including 66 resets, run finished after 365 ms. (steps per millisecond=27 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 8) seen :0
Interrupted probabilistic random walk after 180705 steps, run timeout after 3001 ms. (steps per millisecond=60 ) properties seen :{}
Probabilistic random walk after 180705 steps, saw 38548 distinct states, run finished after 3002 ms. (steps per millisecond=60 ) properties seen :0
Running SMT prover for 8 properties.
// Phase 1: matrix 3773 rows 1125 cols
[2023-03-11 03:40:59] [INFO ] Computed 32 place invariants in 86 ms
[2023-03-11 03:40:59] [INFO ] [Real]Absence check using 30 positive place invariants in 9 ms returned sat
[2023-03-11 03:40:59] [INFO ] [Real]Absence check using 30 positive and 2 generalized place invariants in 8 ms returned sat
[2023-03-11 03:41:01] [INFO ] After 1598ms SMT Verify possible using state equation in real domain returned unsat :0 sat :2 real:6
[2023-03-11 03:41:01] [INFO ] State equation strengthened by 3623 read => feed constraints.
[2023-03-11 03:41:02] [INFO ] After 694ms SMT Verify possible using 3623 Read/Feed constraints in real domain returned unsat :0 sat :0 real:8
[2023-03-11 03:41:02] [INFO ] After 2635ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:8
[2023-03-11 03:41:02] [INFO ] [Nat]Absence check using 30 positive place invariants in 12 ms returned sat
[2023-03-11 03:41:02] [INFO ] [Nat]Absence check using 30 positive and 2 generalized place invariants in 13 ms returned sat
[2023-03-11 03:41:04] [INFO ] After 2054ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :8
[2023-03-11 03:41:06] [INFO ] After 2062ms SMT Verify possible using 3623 Read/Feed constraints in natural domain returned unsat :0 sat :8
[2023-03-11 03:41:08] [INFO ] After 4338ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :8
Attempting to minimize the solution found.
Minimization took 1704 ms.
[2023-03-11 03:41:10] [INFO ] After 8514ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :8
Parikh walk visited 0 properties in 112 ms.
Support contains 22 out of 1125 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1125/1125 places, 3773/3773 transitions.
Applied a total of 0 rules in 102 ms. Remains 1125 /1125 variables (removed 0) and now considering 3773/3773 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 102 ms. Remains : 1125/1125 places, 3773/3773 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1125/1125 places, 3773/3773 transitions.
Applied a total of 0 rules in 89 ms. Remains 1125 /1125 variables (removed 0) and now considering 3773/3773 (removed 0) transitions.
[2023-03-11 03:41:11] [INFO ] Invariant cache hit.
[2023-03-11 03:41:12] [INFO ] Implicit Places using invariants in 1103 ms returned []
[2023-03-11 03:41:12] [INFO ] Invariant cache hit.
[2023-03-11 03:41:13] [INFO ] State equation strengthened by 3623 read => feed constraints.
[2023-03-11 03:41:30] [INFO ] Implicit Places using invariants and state equation in 18641 ms returned []
Implicit Place search using SMT with State Equation took 19750 ms to find 0 implicit places.
[2023-03-11 03:41:31] [INFO ] Redundant transitions in 343 ms returned []
[2023-03-11 03:41:31] [INFO ] Invariant cache hit.
[2023-03-11 03:41:32] [INFO ] Dead Transitions using invariants and state equation in 1553 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 21751 ms. Remains : 1125/1125 places, 3773/3773 transitions.
[2023-03-11 03:41:32] [INFO ] Flatten gal took : 123 ms
[2023-03-11 03:41:32] [INFO ] Flatten gal took : 130 ms
[2023-03-11 03:41:33] [INFO ] Input system was already deterministic with 5580 transitions.
Computed a total of 122 stabilizing places and 210 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 2163/2163 places, 5580/5580 transitions.
Applied a total of 0 rules in 52 ms. Remains 2163 /2163 variables (removed 0) and now considering 5580/5580 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 53 ms. Remains : 2163/2163 places, 5580/5580 transitions.
[2023-03-11 03:41:33] [INFO ] Flatten gal took : 88 ms
[2023-03-11 03:41:33] [INFO ] Flatten gal took : 97 ms
[2023-03-11 03:41:33] [INFO ] Input system was already deterministic with 5580 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2163/2163 places, 5580/5580 transitions.
Drop transitions removed 203 transitions
Trivial Post-agglo rules discarded 203 transitions
Performed 203 trivial Post agglomeration. Transition count delta: 203
Iterating post reduction 0 with 203 rules applied. Total rules applied 203 place count 2163 transition count 5377
Reduce places removed 203 places and 0 transitions.
Iterating post reduction 1 with 203 rules applied. Total rules applied 406 place count 1960 transition count 5377
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 406 place count 1960 transition count 5375
Deduced a syphon composed of 2 places in 2 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 410 place count 1958 transition count 5375
Performed 28 Post agglomeration using F-continuation condition.Transition count delta: 28
Deduced a syphon composed of 28 places in 1 ms
Reduce places removed 28 places and 0 transitions.
Iterating global reduction 2 with 56 rules applied. Total rules applied 466 place count 1930 transition count 5347
Applied a total of 466 rules in 257 ms. Remains 1930 /2163 variables (removed 233) and now considering 5347/5580 (removed 233) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 258 ms. Remains : 1930/2163 places, 5347/5580 transitions.
[2023-03-11 03:41:34] [INFO ] Flatten gal took : 75 ms
[2023-03-11 03:41:34] [INFO ] Flatten gal took : 84 ms
[2023-03-11 03:41:34] [INFO ] Input system was already deterministic with 5347 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2163/2163 places, 5580/5580 transitions.
Applied a total of 0 rules in 53 ms. Remains 2163 /2163 variables (removed 0) and now considering 5580/5580 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 54 ms. Remains : 2163/2163 places, 5580/5580 transitions.
[2023-03-11 03:41:34] [INFO ] Flatten gal took : 84 ms
[2023-03-11 03:41:34] [INFO ] Flatten gal took : 113 ms
[2023-03-11 03:41:34] [INFO ] Input system was already deterministic with 5580 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2163/2163 places, 5580/5580 transitions.
Applied a total of 0 rules in 55 ms. Remains 2163 /2163 variables (removed 0) and now considering 5580/5580 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 55 ms. Remains : 2163/2163 places, 5580/5580 transitions.
[2023-03-11 03:41:35] [INFO ] Flatten gal took : 76 ms
[2023-03-11 03:41:35] [INFO ] Flatten gal took : 105 ms
[2023-03-11 03:41:35] [INFO ] Input system was already deterministic with 5580 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2163/2163 places, 5580/5580 transitions.
Applied a total of 0 rules in 61 ms. Remains 2163 /2163 variables (removed 0) and now considering 5580/5580 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 62 ms. Remains : 2163/2163 places, 5580/5580 transitions.
[2023-03-11 03:41:35] [INFO ] Flatten gal took : 88 ms
[2023-03-11 03:41:35] [INFO ] Flatten gal took : 100 ms
[2023-03-11 03:41:35] [INFO ] Input system was already deterministic with 5580 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2163/2163 places, 5580/5580 transitions.
Applied a total of 0 rules in 74 ms. Remains 2163 /2163 variables (removed 0) and now considering 5580/5580 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 79 ms. Remains : 2163/2163 places, 5580/5580 transitions.
[2023-03-11 03:41:36] [INFO ] Flatten gal took : 90 ms
[2023-03-11 03:41:36] [INFO ] Flatten gal took : 104 ms
[2023-03-11 03:41:36] [INFO ] Input system was already deterministic with 5580 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2163/2163 places, 5580/5580 transitions.
Drop transitions removed 207 transitions
Trivial Post-agglo rules discarded 207 transitions
Performed 207 trivial Post agglomeration. Transition count delta: 207
Iterating post reduction 0 with 207 rules applied. Total rules applied 207 place count 2163 transition count 5373
Reduce places removed 207 places and 0 transitions.
Iterating post reduction 1 with 207 rules applied. Total rules applied 414 place count 1956 transition count 5373
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 414 place count 1956 transition count 5372
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 416 place count 1955 transition count 5372
Performed 29 Post agglomeration using F-continuation condition.Transition count delta: 29
Deduced a syphon composed of 29 places in 2 ms
Reduce places removed 29 places and 0 transitions.
Iterating global reduction 2 with 58 rules applied. Total rules applied 474 place count 1926 transition count 5343
Applied a total of 474 rules in 209 ms. Remains 1926 /2163 variables (removed 237) and now considering 5343/5580 (removed 237) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 210 ms. Remains : 1926/2163 places, 5343/5580 transitions.
[2023-03-11 03:41:36] [INFO ] Flatten gal took : 73 ms
[2023-03-11 03:41:36] [INFO ] Flatten gal took : 80 ms
[2023-03-11 03:41:37] [INFO ] Input system was already deterministic with 5343 transitions.
Finished random walk after 6401 steps, including 20 resets, run visited all 1 properties in 41 ms. (steps per millisecond=156 )
FORMULA CANInsertWithFailure-PT-030-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 2163/2163 places, 5580/5580 transitions.
Applied a total of 0 rules in 51 ms. Remains 2163 /2163 variables (removed 0) and now considering 5580/5580 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 52 ms. Remains : 2163/2163 places, 5580/5580 transitions.
[2023-03-11 03:41:37] [INFO ] Flatten gal took : 69 ms
[2023-03-11 03:41:37] [INFO ] Flatten gal took : 78 ms
[2023-03-11 03:41:37] [INFO ] Input system was already deterministic with 5580 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2163/2163 places, 5580/5580 transitions.
Drop transitions removed 208 transitions
Trivial Post-agglo rules discarded 208 transitions
Performed 208 trivial Post agglomeration. Transition count delta: 208
Iterating post reduction 0 with 208 rules applied. Total rules applied 208 place count 2163 transition count 5372
Reduce places removed 208 places and 0 transitions.
Iterating post reduction 1 with 208 rules applied. Total rules applied 416 place count 1955 transition count 5372
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 416 place count 1955 transition count 5371
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 418 place count 1954 transition count 5371
Performed 29 Post agglomeration using F-continuation condition.Transition count delta: 29
Deduced a syphon composed of 29 places in 1 ms
Reduce places removed 29 places and 0 transitions.
Iterating global reduction 2 with 58 rules applied. Total rules applied 476 place count 1925 transition count 5342
Applied a total of 476 rules in 171 ms. Remains 1925 /2163 variables (removed 238) and now considering 5342/5580 (removed 238) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 173 ms. Remains : 1925/2163 places, 5342/5580 transitions.
[2023-03-11 03:41:37] [INFO ] Flatten gal took : 68 ms
[2023-03-11 03:41:37] [INFO ] Flatten gal took : 72 ms
[2023-03-11 03:41:38] [INFO ] Input system was already deterministic with 5342 transitions.
Finished random walk after 1224 steps, including 3 resets, run visited all 1 properties in 13 ms. (steps per millisecond=94 )
FORMULA CANInsertWithFailure-PT-030-CTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 2163/2163 places, 5580/5580 transitions.
Drop transitions removed 195 transitions
Trivial Post-agglo rules discarded 195 transitions
Performed 195 trivial Post agglomeration. Transition count delta: 195
Iterating post reduction 0 with 195 rules applied. Total rules applied 195 place count 2163 transition count 5385
Reduce places removed 195 places and 0 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 1 with 197 rules applied. Total rules applied 392 place count 1968 transition count 5383
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 394 place count 1966 transition count 5383
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 394 place count 1966 transition count 5381
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 398 place count 1964 transition count 5381
Performed 28 Post agglomeration using F-continuation condition.Transition count delta: 28
Deduced a syphon composed of 28 places in 1 ms
Reduce places removed 28 places and 0 transitions.
Iterating global reduction 3 with 56 rules applied. Total rules applied 454 place count 1936 transition count 5353
Applied a total of 454 rules in 172 ms. Remains 1936 /2163 variables (removed 227) and now considering 5353/5580 (removed 227) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 172 ms. Remains : 1936/2163 places, 5353/5580 transitions.
[2023-03-11 03:41:38] [INFO ] Flatten gal took : 71 ms
[2023-03-11 03:41:38] [INFO ] Flatten gal took : 78 ms
[2023-03-11 03:41:38] [INFO ] Input system was already deterministic with 5353 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2163/2163 places, 5580/5580 transitions.
Drop transitions removed 206 transitions
Trivial Post-agglo rules discarded 206 transitions
Performed 206 trivial Post agglomeration. Transition count delta: 206
Iterating post reduction 0 with 206 rules applied. Total rules applied 206 place count 2163 transition count 5374
Reduce places removed 206 places and 0 transitions.
Iterating post reduction 1 with 206 rules applied. Total rules applied 412 place count 1957 transition count 5374
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 412 place count 1957 transition count 5372
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 416 place count 1955 transition count 5372
Performed 28 Post agglomeration using F-continuation condition.Transition count delta: 28
Deduced a syphon composed of 28 places in 2 ms
Reduce places removed 28 places and 0 transitions.
Iterating global reduction 2 with 56 rules applied. Total rules applied 472 place count 1927 transition count 5344
Applied a total of 472 rules in 258 ms. Remains 1927 /2163 variables (removed 236) and now considering 5344/5580 (removed 236) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 258 ms. Remains : 1927/2163 places, 5344/5580 transitions.
[2023-03-11 03:41:39] [INFO ] Flatten gal took : 100 ms
[2023-03-11 03:41:39] [INFO ] Flatten gal took : 107 ms
[2023-03-11 03:41:39] [INFO ] Input system was already deterministic with 5344 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2163/2163 places, 5580/5580 transitions.
Applied a total of 0 rules in 86 ms. Remains 2163 /2163 variables (removed 0) and now considering 5580/5580 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 88 ms. Remains : 2163/2163 places, 5580/5580 transitions.
[2023-03-11 03:41:39] [INFO ] Flatten gal took : 102 ms
[2023-03-11 03:41:39] [INFO ] Flatten gal took : 115 ms
[2023-03-11 03:41:39] [INFO ] Input system was already deterministic with 5580 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2163/2163 places, 5580/5580 transitions.
Applied a total of 0 rules in 77 ms. Remains 2163 /2163 variables (removed 0) and now considering 5580/5580 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 78 ms. Remains : 2163/2163 places, 5580/5580 transitions.
[2023-03-11 03:41:40] [INFO ] Flatten gal took : 101 ms
[2023-03-11 03:41:40] [INFO ] Flatten gal took : 105 ms
[2023-03-11 03:41:40] [INFO ] Input system was already deterministic with 5580 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2163/2163 places, 5580/5580 transitions.
Applied a total of 0 rules in 74 ms. Remains 2163 /2163 variables (removed 0) and now considering 5580/5580 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 75 ms. Remains : 2163/2163 places, 5580/5580 transitions.
[2023-03-11 03:41:40] [INFO ] Flatten gal took : 72 ms
[2023-03-11 03:41:40] [INFO ] Flatten gal took : 77 ms
[2023-03-11 03:41:40] [INFO ] Input system was already deterministic with 5580 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2163/2163 places, 5580/5580 transitions.
Applied a total of 0 rules in 50 ms. Remains 2163 /2163 variables (removed 0) and now considering 5580/5580 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 50 ms. Remains : 2163/2163 places, 5580/5580 transitions.
[2023-03-11 03:41:41] [INFO ] Flatten gal took : 69 ms
[2023-03-11 03:41:41] [INFO ] Flatten gal took : 77 ms
[2023-03-11 03:41:41] [INFO ] Input system was already deterministic with 5580 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2163/2163 places, 5580/5580 transitions.
Applied a total of 0 rules in 65 ms. Remains 2163 /2163 variables (removed 0) and now considering 5580/5580 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 65 ms. Remains : 2163/2163 places, 5580/5580 transitions.
[2023-03-11 03:41:41] [INFO ] Flatten gal took : 85 ms
[2023-03-11 03:41:41] [INFO ] Flatten gal took : 97 ms
[2023-03-11 03:41:41] [INFO ] Input system was already deterministic with 5580 transitions.
[2023-03-11 03:41:41] [INFO ] Flatten gal took : 77 ms
[2023-03-11 03:41:41] [INFO ] Flatten gal took : 81 ms
[2023-03-11 03:41:42] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-11 03:41:42] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 2163 places, 5580 transitions and 14940 arcs took 18 ms.
Total runtime 117411 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT CANInsertWithFailure-PT-030
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/376
CTLFireability

FORMULA CANInsertWithFailure-PT-030-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CANInsertWithFailure-PT-030-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CANInsertWithFailure-PT-030-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CANInsertWithFailure-PT-030-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CANInsertWithFailure-PT-030-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CANInsertWithFailure-PT-030-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678506977810

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/376/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/376/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/376/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
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lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: LAUNCH task # 29 (type EXCL) for 28 CANInsertWithFailure-PT-030-CTLFireability-10
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 29 (type EXCL) for CANInsertWithFailure-PT-030-CTLFireability-10
lola: result : true
lola: markings : 40
lola: fired transitions : 42
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lola: LAUNCH task # 26 (type EXCL) for 25 CANInsertWithFailure-PT-030-CTLFireability-09
lola: time limit : 256 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-030-CTLFireability-10: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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CANInsertWithFailure-PT-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-07: CTL 1 0 0 0 1 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 0/256 1/32 CANInsertWithFailure-PT-030-CTLFireability-09 3764 m, 752 m/sec, 7913 t fired, .

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lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
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lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-030-CTLFireability-10: CTL true CTL model checker

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CANInsertWithFailure-PT-030-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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26 CTL EXCL 5/256 3/32 CANInsertWithFailure-PT-030-CTLFireability-09 91905 m, 17628 m/sec, 399356 t fired, .

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CANInsertWithFailure-PT-030-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
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CANInsertWithFailure-PT-030-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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26 CTL EXCL 10/256 5/32 CANInsertWithFailure-PT-030-CTLFireability-09 185741 m, 18767 m/sec, 850073 t fired, .

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26 CTL EXCL 15/256 6/32 CANInsertWithFailure-PT-030-CTLFireability-09 266126 m, 16077 m/sec, 1301832 t fired, .

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26 CTL EXCL 20/256 8/32 CANInsertWithFailure-PT-030-CTLFireability-09 344809 m, 15736 m/sec, 1792373 t fired, .

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26 CTL EXCL 25/256 10/32 CANInsertWithFailure-PT-030-CTLFireability-09 412244 m, 13487 m/sec, 2232024 t fired, .

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26 CTL EXCL 30/256 11/32 CANInsertWithFailure-PT-030-CTLFireability-09 471803 m, 11911 m/sec, 2634829 t fired, .

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26 CTL EXCL 35/256 12/32 CANInsertWithFailure-PT-030-CTLFireability-09 519484 m, 9536 m/sec, 2996977 t fired, .

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26 CTL EXCL 40/256 12/32 CANInsertWithFailure-PT-030-CTLFireability-09 553472 m, 6797 m/sec, 3428908 t fired, .

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26 CTL EXCL 45/256 14/32 CANInsertWithFailure-PT-030-CTLFireability-09 633938 m, 16093 m/sec, 3866599 t fired, .

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26 CTL EXCL 50/256 16/32 CANInsertWithFailure-PT-030-CTLFireability-09 713308 m, 15874 m/sec, 4320641 t fired, .

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26 CTL EXCL 55/256 17/32 CANInsertWithFailure-PT-030-CTLFireability-09 779126 m, 13163 m/sec, 4748901 t fired, .

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26 CTL EXCL 60/256 19/32 CANInsertWithFailure-PT-030-CTLFireability-09 849259 m, 14026 m/sec, 5244724 t fired, .

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26 CTL EXCL 65/256 20/32 CANInsertWithFailure-PT-030-CTLFireability-09 908026 m, 11753 m/sec, 5679751 t fired, .

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26 CTL EXCL 70/256 21/32 CANInsertWithFailure-PT-030-CTLFireability-09 965596 m, 11514 m/sec, 6119390 t fired, .

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26 CTL EXCL 75/256 22/32 CANInsertWithFailure-PT-030-CTLFireability-09 1018588 m, 10598 m/sec, 6559453 t fired, .

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26 CTL EXCL 80/256 22/32 CANInsertWithFailure-PT-030-CTLFireability-09 1042071 m, 4696 m/sec, 6958318 t fired, .

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26 CTL EXCL 85/256 24/32 CANInsertWithFailure-PT-030-CTLFireability-09 1138958 m, 19377 m/sec, 7409215 t fired, .

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26 CTL EXCL 90/256 27/32 CANInsertWithFailure-PT-030-CTLFireability-09 1237549 m, 19718 m/sec, 7891732 t fired, .

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26 CTL EXCL 95/256 28/32 CANInsertWithFailure-PT-030-CTLFireability-09 1319359 m, 16362 m/sec, 8370049 t fired, .

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26 CTL EXCL 100/256 30/32 CANInsertWithFailure-PT-030-CTLFireability-09 1394052 m, 14938 m/sec, 8847334 t fired, .

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44 CTL EXCL 15/266 8/32 CANInsertWithFailure-PT-030-CTLFireability-15 319325 m, 17019 m/sec, 1306890 t fired, .

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44 CTL EXCL 20/266 10/32 CANInsertWithFailure-PT-030-CTLFireability-15 403069 m, 16748 m/sec, 1748003 t fired, .

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44 CTL EXCL 25/266 11/32 CANInsertWithFailure-PT-030-CTLFireability-15 480457 m, 15477 m/sec, 2179549 t fired, .

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44 CTL EXCL 30/266 13/32 CANInsertWithFailure-PT-030-CTLFireability-15 553139 m, 14536 m/sec, 2601009 t fired, .

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44 CTL EXCL 35/266 14/32 CANInsertWithFailure-PT-030-CTLFireability-15 618870 m, 13146 m/sec, 3025267 t fired, .

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44 CTL EXCL 40/266 15/32 CANInsertWithFailure-PT-030-CTLFireability-15 663074 m, 8840 m/sec, 3460711 t fired, .

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44 CTL EXCL 45/266 16/32 CANInsertWithFailure-PT-030-CTLFireability-15 743311 m, 16047 m/sec, 3871324 t fired, .

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44 CTL EXCL 50/266 18/32 CANInsertWithFailure-PT-030-CTLFireability-15 835826 m, 18503 m/sec, 4328412 t fired, .

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44 CTL EXCL 55/266 20/32 CANInsertWithFailure-PT-030-CTLFireability-15 913063 m, 15447 m/sec, 4740905 t fired, .

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44 CTL EXCL 60/266 22/32 CANInsertWithFailure-PT-030-CTLFireability-15 988002 m, 14987 m/sec, 5178888 t fired, .

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44 CTL EXCL 65/266 23/32 CANInsertWithFailure-PT-030-CTLFireability-15 1058019 m, 14003 m/sec, 5613231 t fired, .

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44 CTL EXCL 70/266 24/32 CANInsertWithFailure-PT-030-CTLFireability-15 1122910 m, 12978 m/sec, 6032483 t fired, .

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44 CTL EXCL 75/266 25/32 CANInsertWithFailure-PT-030-CTLFireability-15 1184115 m, 12241 m/sec, 6438521 t fired, .

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44 CTL EXCL 80/266 26/32 CANInsertWithFailure-PT-030-CTLFireability-15 1232713 m, 9719 m/sec, 6831057 t fired, .

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44 CTL EXCL 85/266 27/32 CANInsertWithFailure-PT-030-CTLFireability-15 1274862 m, 8429 m/sec, 7236464 t fired, .

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20 CTL EXCL 60/458 30/32 CANInsertWithFailure-PT-030-CTLFireability-05 966313 m, 29717 m/sec, 5239814 t fired, .

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20 CTL EXCL 65/458 32/32 CANInsertWithFailure-PT-030-CTLFireability-05 1086659 m, 24069 m/sec, 5633773 t fired, .

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17 CTL EXCL 5/523 4/32 CANInsertWithFailure-PT-030-CTLFireability-04 120540 m, 24108 m/sec, 413261 t fired, .

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17 CTL EXCL 10/523 6/32 CANInsertWithFailure-PT-030-CTLFireability-04 224732 m, 20838 m/sec, 853830 t fired, .

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17 CTL EXCL 15/523 8/32 CANInsertWithFailure-PT-030-CTLFireability-04 316446 m, 18342 m/sec, 1292998 t fired, .

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17 CTL EXCL 20/523 10/32 CANInsertWithFailure-PT-030-CTLFireability-04 401203 m, 16951 m/sec, 1738889 t fired, .

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17 CTL EXCL 25/523 11/32 CANInsertWithFailure-PT-030-CTLFireability-04 479790 m, 15717 m/sec, 2176410 t fired, .

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17 CTL EXCL 30/523 13/32 CANInsertWithFailure-PT-030-CTLFireability-04 553551 m, 14752 m/sec, 2603554 t fired, .

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17 CTL EXCL 35/523 14/32 CANInsertWithFailure-PT-030-CTLFireability-04 619763 m, 13242 m/sec, 3031925 t fired, .

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17 CTL EXCL 40/523 15/32 CANInsertWithFailure-PT-030-CTLFireability-04 663593 m, 8766 m/sec, 3466482 t fired, .

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17 CTL EXCL 45/523 16/32 CANInsertWithFailure-PT-030-CTLFireability-04 746585 m, 16598 m/sec, 3886809 t fired, .

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17 CTL EXCL 50/523 18/32 CANInsertWithFailure-PT-030-CTLFireability-04 839020 m, 18487 m/sec, 4344221 t fired, .

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17 CTL EXCL 55/523 20/32 CANInsertWithFailure-PT-030-CTLFireability-04 920831 m, 16362 m/sec, 4784887 t fired, .

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17 CTL EXCL 60/523 22/32 CANInsertWithFailure-PT-030-CTLFireability-04 996738 m, 15181 m/sec, 5232026 t fired, .

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17 CTL EXCL 65/523 23/32 CANInsertWithFailure-PT-030-CTLFireability-04 1066992 m, 14050 m/sec, 5669874 t fired, .

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17 CTL EXCL 70/523 24/32 CANInsertWithFailure-PT-030-CTLFireability-04 1132096 m, 13020 m/sec, 6092566 t fired, .

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17 CTL EXCL 75/523 26/32 CANInsertWithFailure-PT-030-CTLFireability-04 1193378 m, 12256 m/sec, 6500736 t fired, .

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17 CTL EXCL 80/523 27/32 CANInsertWithFailure-PT-030-CTLFireability-04 1241695 m, 9663 m/sec, 6919914 t fired, .

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14 CTL EXCL 5/608 2/32 CANInsertWithFailure-PT-030-CTLFireability-03 25208 m, 5041 m/sec, 57690 t fired, .

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14 CTL EXCL 50/608 12/32 CANInsertWithFailure-PT-030-CTLFireability-03 268270 m, 5457 m/sec, 707117 t fired, .

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14 CTL EXCL 55/608 13/32 CANInsertWithFailure-PT-030-CTLFireability-03 296397 m, 5625 m/sec, 773268 t fired, .

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14 CTL EXCL 60/608 14/32 CANInsertWithFailure-PT-030-CTLFireability-03 324826 m, 5685 m/sec, 830116 t fired, .

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14 CTL EXCL 65/608 15/32 CANInsertWithFailure-PT-030-CTLFireability-03 351165 m, 5267 m/sec, 892746 t fired, .

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14 CTL EXCL 70/608 16/32 CANInsertWithFailure-PT-030-CTLFireability-03 377513 m, 5269 m/sec, 960088 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 100/978 32/32 CANInsertWithFailure-PT-030-CTLFireability-00 1527209 m, 18372 m/sec, 8320706 t fired, .

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6 CTL EXCL 5/1415 3/32 CANInsertWithFailure-PT-030-CTLFireability-01 93362 m, 18672 m/sec, 408141 t fired, .

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6 CTL EXCL 10/1415 5/32 CANInsertWithFailure-PT-030-CTLFireability-01 195062 m, 20340 m/sec, 900855 t fired, .

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6 CTL EXCL 15/1415 7/32 CANInsertWithFailure-PT-030-CTLFireability-01 279167 m, 16821 m/sec, 1384057 t fired, .

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6 CTL EXCL 20/1415 8/32 CANInsertWithFailure-PT-030-CTLFireability-01 357034 m, 15573 m/sec, 1873654 t fired, .

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6 CTL EXCL 25/1415 10/32 CANInsertWithFailure-PT-030-CTLFireability-01 429189 m, 14431 m/sec, 2351586 t fired, .

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6 CTL EXCL 30/1415 11/32 CANInsertWithFailure-PT-030-CTLFireability-01 497649 m, 13692 m/sec, 2822330 t fired, .

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6 CTL EXCL 35/1415 12/32 CANInsertWithFailure-PT-030-CTLFireability-01 540927 m, 8655 m/sec, 3304178 t fired, .

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6 CTL EXCL 45/1415 16/32 CANInsertWithFailure-PT-030-CTLFireability-01 704849 m, 17870 m/sec, 4276195 t fired, .

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6 CTL EXCL 50/1415 17/32 CANInsertWithFailure-PT-030-CTLFireability-01 780972 m, 15224 m/sec, 4766620 t fired, .

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CANInsertWithFailure-PT-030-CTLFireability-07: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-10: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-12: CTL false CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-030-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-01: DISJ 0 1 1 0 2 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
6 CTL EXCL 75/1415 23/32 CANInsertWithFailure-PT-030-CTLFireability-01 1065541 m, 6286 m/sec, 7085591 t fired, .

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CANInsertWithFailure-PT-030-CTLFireability-02: CTL false CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-03: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-07: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-10: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-12: CTL false CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-030-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-01: DISJ 0 1 1 0 2 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
6 CTL EXCL 80/1415 25/32 CANInsertWithFailure-PT-030-CTLFireability-01 1172060 m, 21303 m/sec, 7563136 t fired, .

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CANInsertWithFailure-PT-030-CTLFireability-02: CTL false CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-03: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-07: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-10: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-12: CTL false CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-030-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-01: DISJ 0 1 1 0 2 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
6 CTL EXCL 85/1415 27/32 CANInsertWithFailure-PT-030-CTLFireability-01 1264038 m, 18395 m/sec, 8045545 t fired, .

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CANInsertWithFailure-PT-030-CTLFireability-02: CTL false CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-03: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-07: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-10: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-12: CTL false CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-030-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-01: DISJ 0 1 1 0 2 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
6 CTL EXCL 90/1415 29/32 CANInsertWithFailure-PT-030-CTLFireability-01 1344176 m, 16027 m/sec, 8531246 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-030-CTLFireability-02: CTL false CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-03: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-07: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-10: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-12: CTL false CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-030-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-01: DISJ 0 1 1 0 2 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
6 CTL EXCL 95/1415 30/32 CANInsertWithFailure-PT-030-CTLFireability-01 1416472 m, 14459 m/sec, 9001159 t fired, .

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CANInsertWithFailure-PT-030-CTLFireability-02: CTL false CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-03: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-07: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-10: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-12: CTL false CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-030-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-01: DISJ 0 1 1 0 2 0 0 0
CANInsertWithFailure-PT-030-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
6 CTL EXCL 100/1415 31/32 CANInsertWithFailure-PT-030-CTLFireability-01 1482888 m, 13283 m/sec, 9448615 t fired, .

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lola: CANCELED task # 6 (type EXCL) for CANInsertWithFailure-PT-030-CTLFireability-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-030-CTLFireability-02: CTL false CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-03: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-07: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-10: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-12: CTL false CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-030-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-01: DISJ 0 1 0 0 2 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-030-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: LAUNCH task # 8 (type EXCL) for 3 CANInsertWithFailure-PT-030-CTLFireability-01
lola: time limit : 2725 sec
lola: memory limit: 32 pages
lola: FINISHED task # 8 (type EXCL) for CANInsertWithFailure-PT-030-CTLFireability-01
lola: result : false
lola: markings : 39
lola: fired transitions : 120
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 14

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-030-CTLFireability-00: CTL unknown AGGR
CANInsertWithFailure-PT-030-CTLFireability-01: DISJ unknown DISJ
CANInsertWithFailure-PT-030-CTLFireability-02: CTL false CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-03: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-04: CTL unknown AGGR
CANInsertWithFailure-PT-030-CTLFireability-05: CTL unknown AGGR
CANInsertWithFailure-PT-030-CTLFireability-07: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-09: CTL unknown AGGR
CANInsertWithFailure-PT-030-CTLFireability-10: CTL true CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-11: CTL unknown AGGR
CANInsertWithFailure-PT-030-CTLFireability-12: CTL false CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-13: CTL unknown AGGR
CANInsertWithFailure-PT-030-CTLFireability-14: CTL false CTL model checker
CANInsertWithFailure-PT-030-CTLFireability-15: CTL unknown AGGR


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CANInsertWithFailure-PT-030"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is CANInsertWithFailure-PT-030, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r039-tajo-167813692900722"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CANInsertWithFailure-PT-030.tgz
mv CANInsertWithFailure-PT-030 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;