Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r039-tajo-167813692900706.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is CANInsertWithFailure-PT-010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r039-tajo-167813692900706
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 9.9K Feb 26 00:02 CTLCardinality.txt
-rw-r--r-- 1 mcc users 90K Feb 26 00:02 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K Feb 25 23:59 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K Feb 25 23:59 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.8K Feb 25 15:40 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 15:40 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K Feb 25 15:40 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:40 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 26 00:04 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 88K Feb 26 00:04 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.1K Feb 26 00:03 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 26 00:03 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 15:40 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 15:40 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 698K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CANInsertWithFailure-PT-010-CTLFireability-00
FORMULA_NAME CANInsertWithFailure-PT-010-CTLFireability-01
FORMULA_NAME CANInsertWithFailure-PT-010-CTLFireability-02
FORMULA_NAME CANInsertWithFailure-PT-010-CTLFireability-03
FORMULA_NAME CANInsertWithFailure-PT-010-CTLFireability-04
FORMULA_NAME CANInsertWithFailure-PT-010-CTLFireability-05
FORMULA_NAME CANInsertWithFailure-PT-010-CTLFireability-06
FORMULA_NAME CANInsertWithFailure-PT-010-CTLFireability-07
FORMULA_NAME CANInsertWithFailure-PT-010-CTLFireability-08
FORMULA_NAME CANInsertWithFailure-PT-010-CTLFireability-09
FORMULA_NAME CANInsertWithFailure-PT-010-CTLFireability-10
FORMULA_NAME CANInsertWithFailure-PT-010-CTLFireability-11
FORMULA_NAME CANInsertWithFailure-PT-010-CTLFireability-12
FORMULA_NAME CANInsertWithFailure-PT-010-CTLFireability-13
FORMULA_NAME CANInsertWithFailure-PT-010-CTLFireability-14
FORMULA_NAME CANInsertWithFailure-PT-010-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678505506030

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=CANInsertWithFailure-PT-010
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-11 03:31:48] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-11 03:31:48] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-11 03:31:48] [INFO ] Load time of PNML (sax parser for PT used): 156 ms
[2023-03-11 03:31:48] [INFO ] Transformed 324 places.
[2023-03-11 03:31:48] [INFO ] Transformed 660 transitions.
[2023-03-11 03:31:48] [INFO ] Parsed PT model containing 324 places and 660 transitions and 1800 arcs in 348 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 18 ms.
Support contains 90 out of 324 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 324/324 places, 660/660 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 323 transition count 660
Applied a total of 1 rules in 40 ms. Remains 323 /324 variables (removed 1) and now considering 660/660 (removed 0) transitions.
// Phase 1: matrix 660 rows 323 cols
[2023-03-11 03:31:49] [INFO ] Computed 12 place invariants in 22 ms
[2023-03-11 03:31:49] [INFO ] Implicit Places using invariants in 321 ms returned []
[2023-03-11 03:31:49] [INFO ] Invariant cache hit.
[2023-03-11 03:31:49] [INFO ] State equation strengthened by 190 read => feed constraints.
[2023-03-11 03:31:49] [INFO ] Implicit Places using invariants and state equation in 506 ms returned []
Implicit Place search using SMT with State Equation took 908 ms to find 0 implicit places.
[2023-03-11 03:31:49] [INFO ] Invariant cache hit.
[2023-03-11 03:31:50] [INFO ] Dead Transitions using invariants and state equation in 320 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 323/324 places, 660/660 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1297 ms. Remains : 323/324 places, 660/660 transitions.
Support contains 90 out of 323 places after structural reductions.
[2023-03-11 03:31:50] [INFO ] Flatten gal took : 72 ms
[2023-03-11 03:31:50] [INFO ] Flatten gal took : 27 ms
[2023-03-11 03:31:50] [INFO ] Input system was already deterministic with 660 transitions.
Support contains 89 out of 323 places (down from 90) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 46 resets, run finished after 725 ms. (steps per millisecond=13 ) properties (out of 69) seen :62
Incomplete Best-First random walk after 10001 steps, including 4 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 7) seen :1
Incomplete Best-First random walk after 10001 steps, including 4 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 75 ms. (steps per millisecond=133 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 7 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 5 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10000 steps, including 5 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 6) seen :1
Incomplete Best-First random walk after 10001 steps, including 4 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
[2023-03-11 03:31:51] [INFO ] Invariant cache hit.
[2023-03-11 03:31:51] [INFO ] [Real]Absence check using 10 positive place invariants in 4 ms returned sat
[2023-03-11 03:31:51] [INFO ] [Real]Absence check using 10 positive and 2 generalized place invariants in 3 ms returned sat
[2023-03-11 03:31:52] [INFO ] After 366ms SMT Verify possible using state equation in real domain returned unsat :0 sat :4 real:1
[2023-03-11 03:31:52] [INFO ] State equation strengthened by 190 read => feed constraints.
[2023-03-11 03:31:52] [INFO ] After 122ms SMT Verify possible using 190 Read/Feed constraints in real domain returned unsat :1 sat :0 real:4
[2023-03-11 03:31:52] [INFO ] After 654ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:4
[2023-03-11 03:31:52] [INFO ] [Nat]Absence check using 10 positive place invariants in 4 ms returned sat
[2023-03-11 03:31:52] [INFO ] [Nat]Absence check using 10 positive and 2 generalized place invariants in 4 ms returned sat
[2023-03-11 03:31:52] [INFO ] After 353ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :4
[2023-03-11 03:31:53] [INFO ] After 235ms SMT Verify possible using 190 Read/Feed constraints in natural domain returned unsat :1 sat :4
[2023-03-11 03:31:53] [INFO ] After 476ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :4
Attempting to minimize the solution found.
Minimization took 177 ms.
[2023-03-11 03:31:53] [INFO ] After 1182ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :4
Fused 5 Parikh solutions to 4 different solutions.
Parikh walk visited 0 properties in 11 ms.
Support contains 12 out of 323 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 323/323 places, 660/660 transitions.
Drop transitions removed 63 transitions
Trivial Post-agglo rules discarded 63 transitions
Performed 63 trivial Post agglomeration. Transition count delta: 63
Iterating post reduction 0 with 63 rules applied. Total rules applied 63 place count 323 transition count 597
Reduce places removed 63 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 64 rules applied. Total rules applied 127 place count 260 transition count 596
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 128 place count 259 transition count 596
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 128 place count 259 transition count 594
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 132 place count 257 transition count 594
Performed 85 Post agglomeration using F-continuation condition.Transition count delta: 85
Deduced a syphon composed of 85 places in 0 ms
Reduce places removed 85 places and 0 transitions.
Iterating global reduction 3 with 170 rules applied. Total rules applied 302 place count 172 transition count 509
Drop transitions removed 70 transitions
Redundant transition composition rules discarded 70 transitions
Iterating global reduction 3 with 70 rules applied. Total rules applied 372 place count 172 transition count 439
Free-agglomeration rule (complex) applied 3 times.
Iterating global reduction 3 with 3 rules applied. Total rules applied 375 place count 172 transition count 436
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 3 with 3 rules applied. Total rules applied 378 place count 169 transition count 436
Partial Free-agglomeration rule applied 99 times.
Drop transitions removed 99 transitions
Iterating global reduction 4 with 99 rules applied. Total rules applied 477 place count 169 transition count 436
Partial Free-agglomeration rule applied 16 times.
Drop transitions removed 16 transitions
Iterating global reduction 4 with 16 rules applied. Total rules applied 493 place count 169 transition count 436
Applied a total of 493 rules in 134 ms. Remains 169 /323 variables (removed 154) and now considering 436/660 (removed 224) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 135 ms. Remains : 169/323 places, 436/660 transitions.
Incomplete random walk after 10000 steps, including 198 resets, run finished after 221 ms. (steps per millisecond=45 ) properties (out of 4) seen :1
Incomplete Best-First random walk after 10001 steps, including 19 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 21 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 6 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
// Phase 1: matrix 436 rows 169 cols
[2023-03-11 03:31:53] [INFO ] Computed 12 place invariants in 4 ms
[2023-03-11 03:31:54] [INFO ] [Real]Absence check using 10 positive place invariants in 4 ms returned sat
[2023-03-11 03:31:54] [INFO ] [Real]Absence check using 10 positive and 2 generalized place invariants in 16 ms returned sat
[2023-03-11 03:31:54] [INFO ] After 241ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1 real:2
[2023-03-11 03:31:54] [INFO ] State equation strengthened by 372 read => feed constraints.
[2023-03-11 03:31:54] [INFO ] After 54ms SMT Verify possible using 372 Read/Feed constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-11 03:31:54] [INFO ] After 453ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-11 03:31:54] [INFO ] [Nat]Absence check using 10 positive place invariants in 3 ms returned sat
[2023-03-11 03:31:54] [INFO ] [Nat]Absence check using 10 positive and 2 generalized place invariants in 1 ms returned sat
[2023-03-11 03:31:54] [INFO ] After 182ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2023-03-11 03:31:54] [INFO ] After 138ms SMT Verify possible using 372 Read/Feed constraints in natural domain returned unsat :0 sat :3
[2023-03-11 03:31:55] [INFO ] After 309ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 41 ms.
[2023-03-11 03:31:55] [INFO ] After 596ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Parikh walk visited 0 properties in 5 ms.
Support contains 9 out of 169 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 169/169 places, 436/436 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 167 transition count 434
Applied a total of 4 rules in 27 ms. Remains 167 /169 variables (removed 2) and now considering 434/436 (removed 2) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 27 ms. Remains : 167/169 places, 434/436 transitions.
Incomplete random walk after 10000 steps, including 205 resets, run finished after 196 ms. (steps per millisecond=51 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 20 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10000 steps, including 19 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 13 resets, run finished after 54 ms. (steps per millisecond=185 ) properties (out of 3) seen :0
Interrupted probabilistic random walk after 446761 steps, run timeout after 3001 ms. (steps per millisecond=148 ) properties seen :{}
Probabilistic random walk after 446761 steps, saw 66268 distinct states, run finished after 3015 ms. (steps per millisecond=148 ) properties seen :0
Running SMT prover for 3 properties.
// Phase 1: matrix 434 rows 167 cols
[2023-03-11 03:31:58] [INFO ] Computed 12 place invariants in 14 ms
[2023-03-11 03:31:58] [INFO ] [Real]Absence check using 10 positive place invariants in 3 ms returned sat
[2023-03-11 03:31:58] [INFO ] [Real]Absence check using 10 positive and 2 generalized place invariants in 1 ms returned sat
[2023-03-11 03:31:58] [INFO ] After 140ms SMT Verify possible using state equation in real domain returned unsat :0 sat :2 real:1
[2023-03-11 03:31:58] [INFO ] State equation strengthened by 374 read => feed constraints.
[2023-03-11 03:31:58] [INFO ] After 82ms SMT Verify possible using 374 Read/Feed constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-11 03:31:58] [INFO ] After 337ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-11 03:31:58] [INFO ] [Nat]Absence check using 10 positive place invariants in 4 ms returned sat
[2023-03-11 03:31:58] [INFO ] [Nat]Absence check using 10 positive and 2 generalized place invariants in 2 ms returned sat
[2023-03-11 03:31:59] [INFO ] After 120ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2023-03-11 03:31:59] [INFO ] After 133ms SMT Verify possible using 374 Read/Feed constraints in natural domain returned unsat :0 sat :3
[2023-03-11 03:31:59] [INFO ] After 238ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 60 ms.
[2023-03-11 03:31:59] [INFO ] After 537ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Parikh walk visited 0 properties in 10 ms.
Support contains 9 out of 167 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 167/167 places, 434/434 transitions.
Applied a total of 0 rules in 20 ms. Remains 167 /167 variables (removed 0) and now considering 434/434 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 20 ms. Remains : 167/167 places, 434/434 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 167/167 places, 434/434 transitions.
Applied a total of 0 rules in 16 ms. Remains 167 /167 variables (removed 0) and now considering 434/434 (removed 0) transitions.
[2023-03-11 03:31:59] [INFO ] Invariant cache hit.
[2023-03-11 03:31:59] [INFO ] Implicit Places using invariants in 182 ms returned []
[2023-03-11 03:31:59] [INFO ] Invariant cache hit.
[2023-03-11 03:31:59] [INFO ] State equation strengthened by 374 read => feed constraints.
[2023-03-11 03:32:00] [INFO ] Implicit Places using invariants and state equation in 622 ms returned []
Implicit Place search using SMT with State Equation took 817 ms to find 0 implicit places.
[2023-03-11 03:32:00] [INFO ] Redundant transitions in 28 ms returned []
[2023-03-11 03:32:00] [INFO ] Invariant cache hit.
[2023-03-11 03:32:00] [INFO ] Dead Transitions using invariants and state equation in 303 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1188 ms. Remains : 167/167 places, 434/434 transitions.
Graph (trivial) has 341 edges and 167 vertex of which 106 / 167 are part of one of the 2 SCC in 3 ms
Free SCC test removed 104 places
Drop transitions removed 239 transitions
Ensure Unique test removed 94 transitions
Reduce isomorphic transitions removed 333 transitions.
Graph (complete) has 164 edges and 63 vertex of which 38 are kept as prefixes of interest. Removing 25 places using SCC suffix rule.1 ms
Discarding 25 places :
Also discarding 8 output transitions
Drop transitions removed 8 transitions
Drop transitions removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 0 with 16 rules applied. Total rules applied 18 place count 38 transition count 77
Discarding 12 places :
Symmetric choice reduction at 1 with 12 rule applications. Total rules 30 place count 26 transition count 53
Iterating global reduction 1 with 12 rules applied. Total rules applied 42 place count 26 transition count 53
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 1 with 6 rules applied. Total rules applied 48 place count 26 transition count 47
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 50 place count 25 transition count 46
Drop transitions removed 4 transitions
Redundant transition composition rules discarded 4 transitions
Iterating global reduction 2 with 4 rules applied. Total rules applied 54 place count 25 transition count 42
Free-agglomeration rule applied 2 times.
Iterating global reduction 2 with 2 rules applied. Total rules applied 56 place count 25 transition count 40
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 58 place count 23 transition count 40
Partial Free-agglomeration rule applied 3 times.
Drop transitions removed 3 transitions
Iterating global reduction 3 with 3 rules applied. Total rules applied 61 place count 23 transition count 40
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 3 with 1 rules applied. Total rules applied 62 place count 22 transition count 39
Applied a total of 62 rules in 26 ms. Remains 22 /167 variables (removed 145) and now considering 39/434 (removed 395) transitions.
Running SMT prover for 3 properties.
// Phase 1: matrix 39 rows 22 cols
[2023-03-11 03:32:00] [INFO ] Computed 2 place invariants in 0 ms
[2023-03-11 03:32:00] [INFO ] [Real]Absence check using 2 positive place invariants in 0 ms returned sat
[2023-03-11 03:32:00] [INFO ] After 15ms SMT Verify possible using state equation in real domain returned unsat :0 sat :3
[2023-03-11 03:32:00] [INFO ] After 27ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 11 ms.
[2023-03-11 03:32:00] [INFO ] After 86ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :3
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA CANInsertWithFailure-PT-010-CTLFireability-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-11 03:32:00] [INFO ] Flatten gal took : 61 ms
[2023-03-11 03:32:00] [INFO ] Flatten gal took : 55 ms
[2023-03-11 03:32:00] [INFO ] Input system was already deterministic with 660 transitions.
Computed a total of 42 stabilizing places and 70 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 323/323 places, 660/660 transitions.
Drop transitions removed 66 transitions
Trivial Post-agglo rules discarded 66 transitions
Performed 66 trivial Post agglomeration. Transition count delta: 66
Iterating post reduction 0 with 66 rules applied. Total rules applied 66 place count 323 transition count 594
Reduce places removed 66 places and 0 transitions.
Iterating post reduction 1 with 66 rules applied. Total rules applied 132 place count 257 transition count 594
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 132 place count 257 transition count 592
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 136 place count 255 transition count 592
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 2 with 16 rules applied. Total rules applied 152 place count 247 transition count 584
Applied a total of 152 rules in 62 ms. Remains 247 /323 variables (removed 76) and now considering 584/660 (removed 76) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 64 ms. Remains : 247/323 places, 584/660 transitions.
[2023-03-11 03:32:01] [INFO ] Flatten gal took : 22 ms
[2023-03-11 03:32:01] [INFO ] Flatten gal took : 23 ms
[2023-03-11 03:32:01] [INFO ] Input system was already deterministic with 584 transitions.
Starting structural reductions in LTL mode, iteration 0 : 323/323 places, 660/660 transitions.
Applied a total of 0 rules in 6 ms. Remains 323 /323 variables (removed 0) and now considering 660/660 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 323/323 places, 660/660 transitions.
[2023-03-11 03:32:01] [INFO ] Flatten gal took : 37 ms
[2023-03-11 03:32:01] [INFO ] Flatten gal took : 21 ms
[2023-03-11 03:32:01] [INFO ] Input system was already deterministic with 660 transitions.
Starting structural reductions in LTL mode, iteration 0 : 323/323 places, 660/660 transitions.
Applied a total of 0 rules in 6 ms. Remains 323 /323 variables (removed 0) and now considering 660/660 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 323/323 places, 660/660 transitions.
[2023-03-11 03:32:01] [INFO ] Flatten gal took : 24 ms
[2023-03-11 03:32:01] [INFO ] Flatten gal took : 21 ms
[2023-03-11 03:32:01] [INFO ] Input system was already deterministic with 660 transitions.
Starting structural reductions in LTL mode, iteration 0 : 323/323 places, 660/660 transitions.
Applied a total of 0 rules in 5 ms. Remains 323 /323 variables (removed 0) and now considering 660/660 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 323/323 places, 660/660 transitions.
[2023-03-11 03:32:01] [INFO ] Flatten gal took : 24 ms
[2023-03-11 03:32:01] [INFO ] Flatten gal took : 20 ms
[2023-03-11 03:32:01] [INFO ] Input system was already deterministic with 660 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 323/323 places, 660/660 transitions.
Drop transitions removed 68 transitions
Trivial Post-agglo rules discarded 68 transitions
Performed 68 trivial Post agglomeration. Transition count delta: 68
Iterating post reduction 0 with 68 rules applied. Total rules applied 68 place count 323 transition count 592
Reduce places removed 68 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 69 rules applied. Total rules applied 137 place count 255 transition count 591
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 138 place count 254 transition count 591
Performed 10 Post agglomeration using F-continuation condition.Transition count delta: 10
Deduced a syphon composed of 10 places in 1 ms
Reduce places removed 10 places and 0 transitions.
Iterating global reduction 3 with 20 rules applied. Total rules applied 158 place count 244 transition count 581
Applied a total of 158 rules in 73 ms. Remains 244 /323 variables (removed 79) and now considering 581/660 (removed 79) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 74 ms. Remains : 244/323 places, 581/660 transitions.
[2023-03-11 03:32:01] [INFO ] Flatten gal took : 25 ms
[2023-03-11 03:32:01] [INFO ] Flatten gal took : 12 ms
[2023-03-11 03:32:01] [INFO ] Input system was already deterministic with 581 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 323/323 places, 660/660 transitions.
Drop transitions removed 68 transitions
Trivial Post-agglo rules discarded 68 transitions
Performed 68 trivial Post agglomeration. Transition count delta: 68
Iterating post reduction 0 with 68 rules applied. Total rules applied 68 place count 323 transition count 592
Reduce places removed 68 places and 0 transitions.
Iterating post reduction 1 with 68 rules applied. Total rules applied 136 place count 255 transition count 592
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 136 place count 255 transition count 591
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 138 place count 254 transition count 591
Performed 9 Post agglomeration using F-continuation condition.Transition count delta: 9
Deduced a syphon composed of 9 places in 0 ms
Reduce places removed 9 places and 0 transitions.
Iterating global reduction 2 with 18 rules applied. Total rules applied 156 place count 245 transition count 582
Applied a total of 156 rules in 16 ms. Remains 245 /323 variables (removed 78) and now considering 582/660 (removed 78) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 245/323 places, 582/660 transitions.
[2023-03-11 03:32:01] [INFO ] Flatten gal took : 11 ms
[2023-03-11 03:32:01] [INFO ] Flatten gal took : 12 ms
[2023-03-11 03:32:01] [INFO ] Input system was already deterministic with 582 transitions.
Finished random walk after 34 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=34 )
FORMULA CANInsertWithFailure-PT-010-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 323/323 places, 660/660 transitions.
Applied a total of 0 rules in 3 ms. Remains 323 /323 variables (removed 0) and now considering 660/660 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 323/323 places, 660/660 transitions.
[2023-03-11 03:32:01] [INFO ] Flatten gal took : 12 ms
[2023-03-11 03:32:01] [INFO ] Flatten gal took : 12 ms
[2023-03-11 03:32:01] [INFO ] Input system was already deterministic with 660 transitions.
Starting structural reductions in LTL mode, iteration 0 : 323/323 places, 660/660 transitions.
Applied a total of 0 rules in 3 ms. Remains 323 /323 variables (removed 0) and now considering 660/660 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 323/323 places, 660/660 transitions.
[2023-03-11 03:32:01] [INFO ] Flatten gal took : 12 ms
[2023-03-11 03:32:01] [INFO ] Flatten gal took : 12 ms
[2023-03-11 03:32:01] [INFO ] Input system was already deterministic with 660 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 323/323 places, 660/660 transitions.
Drop transitions removed 70 transitions
Trivial Post-agglo rules discarded 70 transitions
Performed 70 trivial Post agglomeration. Transition count delta: 70
Iterating post reduction 0 with 70 rules applied. Total rules applied 70 place count 323 transition count 590
Reduce places removed 70 places and 0 transitions.
Iterating post reduction 1 with 70 rules applied. Total rules applied 140 place count 253 transition count 590
Performed 10 Post agglomeration using F-continuation condition.Transition count delta: 10
Deduced a syphon composed of 10 places in 1 ms
Reduce places removed 10 places and 0 transitions.
Iterating global reduction 2 with 20 rules applied. Total rules applied 160 place count 243 transition count 580
Applied a total of 160 rules in 14 ms. Remains 243 /323 variables (removed 80) and now considering 580/660 (removed 80) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 243/323 places, 580/660 transitions.
[2023-03-11 03:32:01] [INFO ] Flatten gal took : 9 ms
[2023-03-11 03:32:01] [INFO ] Flatten gal took : 10 ms
[2023-03-11 03:32:01] [INFO ] Input system was already deterministic with 580 transitions.
Finished random walk after 1288 steps, including 13 resets, run visited all 1 properties in 6 ms. (steps per millisecond=214 )
FORMULA CANInsertWithFailure-PT-010-CTLFireability-09 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 323/323 places, 660/660 transitions.
Applied a total of 0 rules in 4 ms. Remains 323 /323 variables (removed 0) and now considering 660/660 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 323/323 places, 660/660 transitions.
[2023-03-11 03:32:01] [INFO ] Flatten gal took : 12 ms
[2023-03-11 03:32:01] [INFO ] Flatten gal took : 12 ms
[2023-03-11 03:32:02] [INFO ] Input system was already deterministic with 660 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 323/323 places, 660/660 transitions.
Drop transitions removed 67 transitions
Trivial Post-agglo rules discarded 67 transitions
Performed 67 trivial Post agglomeration. Transition count delta: 67
Iterating post reduction 0 with 67 rules applied. Total rules applied 67 place count 323 transition count 593
Reduce places removed 67 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 68 rules applied. Total rules applied 135 place count 256 transition count 592
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 136 place count 255 transition count 592
Performed 10 Post agglomeration using F-continuation condition.Transition count delta: 10
Deduced a syphon composed of 10 places in 1 ms
Reduce places removed 10 places and 0 transitions.
Iterating global reduction 3 with 20 rules applied. Total rules applied 156 place count 245 transition count 582
Applied a total of 156 rules in 18 ms. Remains 245 /323 variables (removed 78) and now considering 582/660 (removed 78) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 245/323 places, 582/660 transitions.
[2023-03-11 03:32:02] [INFO ] Flatten gal took : 11 ms
[2023-03-11 03:32:02] [INFO ] Flatten gal took : 12 ms
[2023-03-11 03:32:02] [INFO ] Input system was already deterministic with 582 transitions.
Starting structural reductions in LTL mode, iteration 0 : 323/323 places, 660/660 transitions.
Applied a total of 0 rules in 3 ms. Remains 323 /323 variables (removed 0) and now considering 660/660 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 323/323 places, 660/660 transitions.
[2023-03-11 03:32:02] [INFO ] Flatten gal took : 20 ms
[2023-03-11 03:32:02] [INFO ] Flatten gal took : 13 ms
[2023-03-11 03:32:02] [INFO ] Input system was already deterministic with 660 transitions.
Starting structural reductions in LTL mode, iteration 0 : 323/323 places, 660/660 transitions.
Applied a total of 0 rules in 3 ms. Remains 323 /323 variables (removed 0) and now considering 660/660 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 323/323 places, 660/660 transitions.
[2023-03-11 03:32:02] [INFO ] Flatten gal took : 12 ms
[2023-03-11 03:32:02] [INFO ] Flatten gal took : 14 ms
[2023-03-11 03:32:02] [INFO ] Input system was already deterministic with 660 transitions.
Starting structural reductions in LTL mode, iteration 0 : 323/323 places, 660/660 transitions.
Applied a total of 0 rules in 2 ms. Remains 323 /323 variables (removed 0) and now considering 660/660 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 323/323 places, 660/660 transitions.
[2023-03-11 03:32:02] [INFO ] Flatten gal took : 11 ms
[2023-03-11 03:32:02] [INFO ] Flatten gal took : 12 ms
[2023-03-11 03:32:02] [INFO ] Input system was already deterministic with 660 transitions.
Starting structural reductions in LTL mode, iteration 0 : 323/323 places, 660/660 transitions.
Applied a total of 0 rules in 3 ms. Remains 323 /323 variables (removed 0) and now considering 660/660 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 323/323 places, 660/660 transitions.
[2023-03-11 03:32:02] [INFO ] Flatten gal took : 12 ms
[2023-03-11 03:32:02] [INFO ] Flatten gal took : 12 ms
[2023-03-11 03:32:02] [INFO ] Input system was already deterministic with 660 transitions.
[2023-03-11 03:32:02] [INFO ] Flatten gal took : 12 ms
[2023-03-11 03:32:02] [INFO ] Flatten gal took : 12 ms
[2023-03-11 03:32:02] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-11 03:32:02] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 323 places, 660 transitions and 1780 arcs took 3 ms.
Total runtime 14031 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT CANInsertWithFailure-PT-010
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA CANInsertWithFailure-PT-010-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CANInsertWithFailure-PT-010-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CANInsertWithFailure-PT-010-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CANInsertWithFailure-PT-010-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CANInsertWithFailure-PT-010-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CANInsertWithFailure-PT-010-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CANInsertWithFailure-PT-010-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678506108850

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 40 (type SKEL/FNDP) for 21 CANInsertWithFailure-PT-010-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 41 (type SKEL/EQUN) for 21 CANInsertWithFailure-PT-010-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 42 (type SKEL/SRCH) for 21 CANInsertWithFailure-PT-010-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 43 (type SKEL/SRCH) for 21 CANInsertWithFailure-PT-010-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 42 (type SKEL/SRCH) for CANInsertWithFailure-PT-010-CTLFireability-10
lola: result : true
lola: markings : 11
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 40 (type FNDP) for CANInsertWithFailure-PT-010-CTLFireability-10 (obsolete)
lola: CANCELED task # 41 (type EQUN) for CANInsertWithFailure-PT-010-CTLFireability-10 (obsolete)
lola: CANCELED task # 43 (type SRCH) for CANInsertWithFailure-PT-010-CTLFireability-10 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 40 (type SKEL/FNDP) for CANInsertWithFailure-PT-010-CTLFireability-10
lola: result : true
lola: fired transitions : 9
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/374/CTLFireability-41.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 41 (type SKEL/EQUN) for CANInsertWithFailure-PT-010-CTLFireability-10
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 7 (type EXCL) for 6 CANInsertWithFailure-PT-010-CTLFireability-03
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 44 (type FNDP) for 21 CANInsertWithFailure-PT-010-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 45 (type EQUN) for 21 CANInsertWithFailure-PT-010-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 47 (type SRCH) for 21 CANInsertWithFailure-PT-010-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 7 (type EXCL) for CANInsertWithFailure-PT-010-CTLFireability-03
lola: result : true
lola: markings : 878
lola: fired transitions : 1607
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 21 CANInsertWithFailure-PT-010-CTLFireability-10
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 47 (type SRCH) for CANInsertWithFailure-PT-010-CTLFireability-10
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
sara: try reading problem file /home/mcc/execution/374/CTLFireability-45.sara.
lola: FINISHED task # 46 (type EXCL) for CANInsertWithFailure-PT-010-CTLFireability-10
lola: result : true
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 44 (type FNDP) for CANInsertWithFailure-PT-010-CTLFireability-10 (obsolete)
lola: CANCELED task # 45 (type EQUN) for CANInsertWithFailure-PT-010-CTLFireability-10 (obsolete)
lola: LAUNCH task # 19 (type EXCL) for 18 CANInsertWithFailure-PT-010-CTLFireability-08
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: FINISHED task # 45 (type EQUN) for CANInsertWithFailure-PT-010-CTLFireability-10
lola: result : unknown
lola: FINISHED task # 19 (type EXCL) for CANInsertWithFailure-PT-010-CTLFireability-08
lola: result : true
lola: markings : 1062
lola: fired transitions : 1264
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 CANInsertWithFailure-PT-010-CTLFireability-11
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 44 (type FNDP) for CANInsertWithFailure-PT-010-CTLFireability-10
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
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lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: rewrite Frontend/Parser/formula_rewrite.k:812
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lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
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lola: rewrite Frontend/Parser/formula_rewrite.k:811
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CANInsertWithFailure-PT-010-CTLFireability-03: CTL true CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-08: CTL true CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-10: EF true state space

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25 CTL EXCL 5/360 3/32 CANInsertWithFailure-PT-010-CTLFireability-11 413209 m, 82641 m/sec, 2825290 t fired, .

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25 CTL EXCL 10/360 4/32 CANInsertWithFailure-PT-010-CTLFireability-11 782033 m, 73764 m/sec, 5734770 t fired, .

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25 CTL EXCL 15/360 6/32 CANInsertWithFailure-PT-010-CTLFireability-11 1186484 m, 80890 m/sec, 8504677 t fired, .

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25 CTL EXCL 20/360 8/32 CANInsertWithFailure-PT-010-CTLFireability-11 1559672 m, 74637 m/sec, 11462279 t fired, .

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CANInsertWithFailure-PT-010-CTLFireability-10: EF true state space

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25 CTL EXCL 25/360 10/32 CANInsertWithFailure-PT-010-CTLFireability-11 1954247 m, 78915 m/sec, 14450714 t fired, .

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CANInsertWithFailure-PT-010-CTLFireability-10: EF true state space

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25 CTL EXCL 30/360 12/32 CANInsertWithFailure-PT-010-CTLFireability-11 2300838 m, 69318 m/sec, 17296760 t fired, .

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CANInsertWithFailure-PT-010-CTLFireability-08: CTL true CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-10: EF true state space

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25 CTL EXCL 35/360 13/32 CANInsertWithFailure-PT-010-CTLFireability-11 2655240 m, 70880 m/sec, 20261523 t fired, .

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25 CTL EXCL 40/360 15/32 CANInsertWithFailure-PT-010-CTLFireability-11 2981295 m, 65211 m/sec, 22981315 t fired, .

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25 CTL EXCL 45/360 16/32 CANInsertWithFailure-PT-010-CTLFireability-11 3313815 m, 66504 m/sec, 25917563 t fired, .

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25 CTL EXCL 50/360 18/32 CANInsertWithFailure-PT-010-CTLFireability-11 3621560 m, 61549 m/sec, 28723734 t fired, .

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25 CTL EXCL 55/360 19/32 CANInsertWithFailure-PT-010-CTLFireability-11 3924260 m, 60540 m/sec, 31362531 t fired, .

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25 CTL EXCL 60/360 20/32 CANInsertWithFailure-PT-010-CTLFireability-11 4125480 m, 40244 m/sec, 34003229 t fired, .

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25 CTL EXCL 75/360 24/32 CANInsertWithFailure-PT-010-CTLFireability-11 4992954 m, 56972 m/sec, 42103414 t fired, .

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25 CTL EXCL 80/360 25/32 CANInsertWithFailure-PT-010-CTLFireability-11 5191177 m, 39644 m/sec, 44828361 t fired, .

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25 CTL EXCL 90/360 28/32 CANInsertWithFailure-PT-010-CTLFireability-11 5890757 m, 68922 m/sec, 50451914 t fired, .

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25 CTL EXCL 100/360 31/32 CANInsertWithFailure-PT-010-CTLFireability-11 6620176 m, 75204 m/sec, 56237441 t fired, .

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37 CTL EXCL 5/388 3/32 CANInsertWithFailure-PT-010-CTLFireability-15 367517 m, 73503 m/sec, 2372928 t fired, .

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37 CTL EXCL 10/388 4/32 CANInsertWithFailure-PT-010-CTLFireability-15 659906 m, 58477 m/sec, 4766905 t fired, .

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37 CTL EXCL 15/388 6/32 CANInsertWithFailure-PT-010-CTLFireability-15 990043 m, 66027 m/sec, 7174129 t fired, .

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37 CTL EXCL 20/388 7/32 CANInsertWithFailure-PT-010-CTLFireability-15 1285270 m, 59045 m/sec, 9541964 t fired, .

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37 CTL EXCL 35/388 12/32 CANInsertWithFailure-PT-010-CTLFireability-15 2200230 m, 73661 m/sec, 16659944 t fired, .

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37 CTL EXCL 40/388 14/32 CANInsertWithFailure-PT-010-CTLFireability-15 2521066 m, 64167 m/sec, 19107402 t fired, .

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37 CTL EXCL 45/388 15/32 CANInsertWithFailure-PT-010-CTLFireability-15 2858911 m, 67569 m/sec, 21533482 t fired, .

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37 CTL EXCL 50/388 17/32 CANInsertWithFailure-PT-010-CTLFireability-15 3179425 m, 64102 m/sec, 23864492 t fired, .

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37 CTL EXCL 55/388 18/32 CANInsertWithFailure-PT-010-CTLFireability-15 3426876 m, 49490 m/sec, 26012947 t fired, .

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37 CTL EXCL 60/388 20/32 CANInsertWithFailure-PT-010-CTLFireability-15 3681805 m, 50985 m/sec, 28143076 t fired, .

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37 CTL EXCL 65/388 21/32 CANInsertWithFailure-PT-010-CTLFireability-15 3987736 m, 61186 m/sec, 30430356 t fired, .

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37 CTL EXCL 70/388 22/32 CANInsertWithFailure-PT-010-CTLFireability-15 4253118 m, 53076 m/sec, 32658713 t fired, .

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37 CTL EXCL 75/388 24/32 CANInsertWithFailure-PT-010-CTLFireability-15 4511053 m, 51587 m/sec, 34845654 t fired, .

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37 CTL EXCL 80/388 25/32 CANInsertWithFailure-PT-010-CTLFireability-15 4813023 m, 60394 m/sec, 37155534 t fired, .

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37 CTL EXCL 85/388 27/32 CANInsertWithFailure-PT-010-CTLFireability-15 5125075 m, 62410 m/sec, 39543383 t fired, .

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37 CTL EXCL 90/388 28/32 CANInsertWithFailure-PT-010-CTLFireability-15 5350900 m, 45165 m/sec, 41787913 t fired, .

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37 CTL EXCL 95/388 29/32 CANInsertWithFailure-PT-010-CTLFireability-15 5645800 m, 58980 m/sec, 44054534 t fired, .

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37 CTL EXCL 105/388 32/32 CANInsertWithFailure-PT-010-CTLFireability-15 6130801 m, 48820 m/sec, 48499569 t fired, .

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34 CTL EXCL 35/423 22/32 CANInsertWithFailure-PT-010-CTLFireability-14 4101081 m, 113881 m/sec, 17251186 t fired, .

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34 CTL EXCL 40/423 24/32 CANInsertWithFailure-PT-010-CTLFireability-14 4638384 m, 107460 m/sec, 19603935 t fired, .

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4 CTL EXCL 5/1066 3/32 CANInsertWithFailure-PT-010-CTLFireability-01 495226 m, 99045 m/sec, 2461866 t fired, .

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4 CTL EXCL 10/1066 5/32 CANInsertWithFailure-PT-010-CTLFireability-01 909767 m, 82908 m/sec, 4733853 t fired, .

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4 CTL EXCL 15/1066 8/32 CANInsertWithFailure-PT-010-CTLFireability-01 1327048 m, 83456 m/sec, 6960646 t fired, .

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4 CTL EXCL 20/1066 10/32 CANInsertWithFailure-PT-010-CTLFireability-01 1783856 m, 91361 m/sec, 9259980 t fired, .

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4 CTL EXCL 25/1066 13/32 CANInsertWithFailure-PT-010-CTLFireability-01 2275700 m, 98368 m/sec, 11718268 t fired, .

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4 CTL EXCL 30/1066 15/32 CANInsertWithFailure-PT-010-CTLFireability-01 2726474 m, 90154 m/sec, 14071339 t fired, .

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4 CTL EXCL 35/1066 17/32 CANInsertWithFailure-PT-010-CTLFireability-01 3142088 m, 83122 m/sec, 16324387 t fired, .

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4 CTL EXCL 50/1066 24/32 CANInsertWithFailure-PT-010-CTLFireability-01 4403230 m, 77107 m/sec, 22945495 t fired, .

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CANInsertWithFailure-PT-010-CTLFireability-03: CTL true CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-05: CTL true CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-07: CTL false CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-08: CTL true CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-10: EF true state space
CANInsertWithFailure-PT-010-CTLFireability-12: CTL true CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-010-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-010-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-010-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-010-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-010-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 100/3125 31/32 CANInsertWithFailure-PT-010-CTLFireability-00 6543155 m, 68530 m/sec, 56169301 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-010-CTLFireability-03: CTL true CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-05: CTL true CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-07: CTL false CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-08: CTL true CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-10: EF true state space
CANInsertWithFailure-PT-010-CTLFireability-12: CTL true CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-010-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
CANInsertWithFailure-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-010-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-010-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-010-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-010-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 105/3125 32/32 CANInsertWithFailure-PT-010-CTLFireability-00 6861295 m, 63628 m/sec, 58709061 t fired, .

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lola: CANCELED task # 1 (type EXCL) for CANInsertWithFailure-PT-010-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-010-CTLFireability-03: CTL true CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-05: CTL true CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-07: CTL false CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-08: CTL true CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-10: EF true state space
CANInsertWithFailure-PT-010-CTLFireability-12: CTL true CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CANInsertWithFailure-PT-010-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-010-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-010-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-010-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-010-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
CANInsertWithFailure-PT-010-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-010-CTLFireability-00: CTL unknown AGGR
CANInsertWithFailure-PT-010-CTLFireability-01: CTL unknown AGGR
CANInsertWithFailure-PT-010-CTLFireability-03: CTL true CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-04: CTL unknown AGGR
CANInsertWithFailure-PT-010-CTLFireability-05: CTL true CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-07: CTL false CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-08: CTL true CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-10: EF true state space
CANInsertWithFailure-PT-010-CTLFireability-11: CTL unknown AGGR
CANInsertWithFailure-PT-010-CTLFireability-12: CTL true CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-13: CTL false CTL model checker
CANInsertWithFailure-PT-010-CTLFireability-14: CTL unknown AGGR
CANInsertWithFailure-PT-010-CTLFireability-15: CTL unknown AGGR


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CANInsertWithFailure-PT-010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is CANInsertWithFailure-PT-010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r039-tajo-167813692900706"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CANInsertWithFailure-PT-010.tgz
mv CANInsertWithFailure-PT-010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;