About the Execution of LoLa+red for CANInsertWithFailure-PT-005
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
341.439 | 8076.00 | 17739.00 | 78.60 | TTTFFTTTTFFFTTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2023-input.r039-tajo-167813692900698.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is CANInsertWithFailure-PT-005, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r039-tajo-167813692900698
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 664K
-rw-r--r-- 1 mcc users 8.7K Feb 26 00:35 CTLCardinality.txt
-rw-r--r-- 1 mcc users 74K Feb 26 00:35 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.6K Feb 26 00:32 CTLFireability.txt
-rw-r--r-- 1 mcc users 67K Feb 26 00:32 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.6K Feb 25 15:40 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 15:40 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2K Feb 25 15:40 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Feb 25 15:40 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 26 00:37 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 126K Feb 26 00:37 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.3K Feb 26 00:36 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 56K Feb 26 00:36 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 15:40 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 15:40 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 202K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME CANInsertWithFailure-PT-005-CTLFireability-00
FORMULA_NAME CANInsertWithFailure-PT-005-CTLFireability-01
FORMULA_NAME CANInsertWithFailure-PT-005-CTLFireability-02
FORMULA_NAME CANInsertWithFailure-PT-005-CTLFireability-03
FORMULA_NAME CANInsertWithFailure-PT-005-CTLFireability-04
FORMULA_NAME CANInsertWithFailure-PT-005-CTLFireability-05
FORMULA_NAME CANInsertWithFailure-PT-005-CTLFireability-06
FORMULA_NAME CANInsertWithFailure-PT-005-CTLFireability-07
FORMULA_NAME CANInsertWithFailure-PT-005-CTLFireability-08
FORMULA_NAME CANInsertWithFailure-PT-005-CTLFireability-09
FORMULA_NAME CANInsertWithFailure-PT-005-CTLFireability-10
FORMULA_NAME CANInsertWithFailure-PT-005-CTLFireability-11
FORMULA_NAME CANInsertWithFailure-PT-005-CTLFireability-12
FORMULA_NAME CANInsertWithFailure-PT-005-CTLFireability-13
FORMULA_NAME CANInsertWithFailure-PT-005-CTLFireability-14
FORMULA_NAME CANInsertWithFailure-PT-005-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678505419858
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=CANInsertWithFailure-PT-005
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-11 03:30:21] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-11 03:30:21] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-11 03:30:21] [INFO ] Load time of PNML (sax parser for PT used): 50 ms
[2023-03-11 03:30:21] [INFO ] Transformed 114 places.
[2023-03-11 03:30:21] [INFO ] Transformed 180 transitions.
[2023-03-11 03:30:21] [INFO ] Parsed PT model containing 114 places and 180 transitions and 500 arcs in 111 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 10 ms.
Support contains 87 out of 114 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 114/114 places, 180/180 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 113 transition count 180
Applied a total of 1 rules in 14 ms. Remains 113 /114 variables (removed 1) and now considering 180/180 (removed 0) transitions.
// Phase 1: matrix 180 rows 113 cols
[2023-03-11 03:30:21] [INFO ] Computed 7 place invariants in 15 ms
[2023-03-11 03:30:22] [INFO ] Implicit Places using invariants in 161 ms returned []
[2023-03-11 03:30:22] [INFO ] Invariant cache hit.
[2023-03-11 03:30:22] [INFO ] State equation strengthened by 45 read => feed constraints.
[2023-03-11 03:30:22] [INFO ] Implicit Places using invariants and state equation in 133 ms returned []
Implicit Place search using SMT with State Equation took 320 ms to find 0 implicit places.
[2023-03-11 03:30:22] [INFO ] Invariant cache hit.
[2023-03-11 03:30:22] [INFO ] Dead Transitions using invariants and state equation in 113 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 113/114 places, 180/180 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 449 ms. Remains : 113/114 places, 180/180 transitions.
Support contains 87 out of 113 places after structural reductions.
[2023-03-11 03:30:22] [INFO ] Flatten gal took : 32 ms
[2023-03-11 03:30:22] [INFO ] Flatten gal took : 12 ms
[2023-03-11 03:30:22] [INFO ] Input system was already deterministic with 180 transitions.
Incomplete random walk after 10000 steps, including 107 resets, run finished after 429 ms. (steps per millisecond=23 ) properties (out of 88) seen :80
Incomplete Best-First random walk after 10001 steps, including 25 resets, run finished after 75 ms. (steps per millisecond=133 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 26 resets, run finished after 82 ms. (steps per millisecond=121 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10000 steps, including 26 resets, run finished after 77 ms. (steps per millisecond=129 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 28 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10000 steps, including 25 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 24 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 25 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 28 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 8) seen :0
Running SMT prover for 8 properties.
[2023-03-11 03:30:23] [INFO ] Invariant cache hit.
[2023-03-11 03:30:23] [INFO ] [Real]Absence check using 5 positive place invariants in 1 ms returned sat
[2023-03-11 03:30:23] [INFO ] [Real]Absence check using 5 positive and 2 generalized place invariants in 2 ms returned sat
[2023-03-11 03:30:23] [INFO ] After 61ms SMT Verify possible using state equation in real domain returned unsat :1 sat :4 real:3
[2023-03-11 03:30:23] [INFO ] State equation strengthened by 45 read => feed constraints.
[2023-03-11 03:30:23] [INFO ] After 23ms SMT Verify possible using 45 Read/Feed constraints in real domain returned unsat :2 sat :0 real:6
[2023-03-11 03:30:23] [INFO ] After 179ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0 real:6
[2023-03-11 03:30:23] [INFO ] [Nat]Absence check using 5 positive place invariants in 1 ms returned sat
[2023-03-11 03:30:23] [INFO ] [Nat]Absence check using 5 positive and 2 generalized place invariants in 2 ms returned sat
[2023-03-11 03:30:23] [INFO ] After 115ms SMT Verify possible using state equation in natural domain returned unsat :2 sat :6
[2023-03-11 03:30:23] [INFO ] After 81ms SMT Verify possible using 45 Read/Feed constraints in natural domain returned unsat :3 sat :5
[2023-03-11 03:30:23] [INFO ] After 147ms SMT Verify possible using trap constraints in natural domain returned unsat :3 sat :5
Attempting to minimize the solution found.
Minimization took 55 ms.
[2023-03-11 03:30:23] [INFO ] After 390ms SMT Verify possible using all constraints in natural domain returned unsat :3 sat :5
Fused 8 Parikh solutions to 5 different solutions.
Parikh walk visited 0 properties in 10 ms.
Support contains 14 out of 113 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 113/113 places, 180/180 transitions.
Drop transitions removed 24 transitions
Trivial Post-agglo rules discarded 24 transitions
Performed 24 trivial Post agglomeration. Transition count delta: 24
Iterating post reduction 0 with 24 rules applied. Total rules applied 24 place count 113 transition count 156
Reduce places removed 24 places and 0 transitions.
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Iterating post reduction 1 with 28 rules applied. Total rules applied 52 place count 89 transition count 152
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 56 place count 85 transition count 152
Performed 14 Post agglomeration using F-continuation condition.Transition count delta: 14
Deduced a syphon composed of 14 places in 0 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 3 with 28 rules applied. Total rules applied 84 place count 71 transition count 138
Drop transitions removed 6 transitions
Redundant transition composition rules discarded 6 transitions
Iterating global reduction 3 with 6 rules applied. Total rules applied 90 place count 71 transition count 132
Partial Free-agglomeration rule applied 23 times.
Drop transitions removed 23 transitions
Iterating global reduction 3 with 23 rules applied. Total rules applied 113 place count 71 transition count 132
Applied a total of 113 rules in 21 ms. Remains 71 /113 variables (removed 42) and now considering 132/180 (removed 48) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 21 ms. Remains : 71/113 places, 132/180 transitions.
Incomplete random walk after 10000 steps, including 330 resets, run finished after 158 ms. (steps per millisecond=63 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 69 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 66 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 65 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 63 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10000 steps, including 64 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 5) seen :0
Probably explored full state space saw : 20613 states, properties seen :0
Probabilistic random walk after 114725 steps, saw 20613 distinct states, run finished after 474 ms. (steps per millisecond=242 ) properties seen :0
Explored full state space saw : 20613 states, properties seen :0
Exhaustive walk after 114725 steps, saw 20613 distinct states, run finished after 482 ms. (steps per millisecond=238 ) properties seen :0
Successfully simplified 8 atomic propositions for a total of 16 simplifications.
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 9 ms
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 8 ms
[2023-03-11 03:30:25] [INFO ] Input system was already deterministic with 180 transitions.
Support contains 80 out of 113 places (down from 81) after GAL structural reductions.
Computed a total of 22 stabilizing places and 35 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 113/113 places, 180/180 transitions.
Applied a total of 0 rules in 3 ms. Remains 113 /113 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 113/113 places, 180/180 transitions.
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 7 ms
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 7 ms
[2023-03-11 03:30:25] [INFO ] Input system was already deterministic with 180 transitions.
Starting structural reductions in LTL mode, iteration 0 : 113/113 places, 180/180 transitions.
Applied a total of 0 rules in 3 ms. Remains 113 /113 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 113/113 places, 180/180 transitions.
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 7 ms
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 8 ms
[2023-03-11 03:30:25] [INFO ] Input system was already deterministic with 180 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 113/113 places, 180/180 transitions.
Drop transitions removed 34 transitions
Trivial Post-agglo rules discarded 34 transitions
Performed 34 trivial Post agglomeration. Transition count delta: 34
Iterating post reduction 0 with 34 rules applied. Total rules applied 34 place count 113 transition count 146
Reduce places removed 34 places and 0 transitions.
Iterating post reduction 1 with 34 rules applied. Total rules applied 68 place count 79 transition count 146
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Deduced a syphon composed of 5 places in 1 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 2 with 10 rules applied. Total rules applied 78 place count 74 transition count 141
Applied a total of 78 rules in 11 ms. Remains 74 /113 variables (removed 39) and now considering 141/180 (removed 39) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 74/113 places, 141/180 transitions.
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 5 ms
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 6 ms
[2023-03-11 03:30:25] [INFO ] Input system was already deterministic with 141 transitions.
Starting structural reductions in LTL mode, iteration 0 : 113/113 places, 180/180 transitions.
Applied a total of 0 rules in 3 ms. Remains 113 /113 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 113/113 places, 180/180 transitions.
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 6 ms
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 7 ms
[2023-03-11 03:30:25] [INFO ] Input system was already deterministic with 180 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 113/113 places, 180/180 transitions.
Drop transitions removed 31 transitions
Trivial Post-agglo rules discarded 31 transitions
Performed 31 trivial Post agglomeration. Transition count delta: 31
Iterating post reduction 0 with 31 rules applied. Total rules applied 31 place count 113 transition count 149
Reduce places removed 31 places and 0 transitions.
Iterating post reduction 1 with 31 rules applied. Total rules applied 62 place count 82 transition count 149
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 62 place count 82 transition count 148
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 64 place count 81 transition count 148
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 1 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 2 with 8 rules applied. Total rules applied 72 place count 77 transition count 144
Applied a total of 72 rules in 12 ms. Remains 77 /113 variables (removed 36) and now considering 144/180 (removed 36) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 77/113 places, 144/180 transitions.
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 5 ms
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 6 ms
[2023-03-11 03:30:25] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 113/113 places, 180/180 transitions.
Applied a total of 0 rules in 2 ms. Remains 113 /113 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 113/113 places, 180/180 transitions.
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 5 ms
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 8 ms
[2023-03-11 03:30:25] [INFO ] Input system was already deterministic with 180 transitions.
Starting structural reductions in LTL mode, iteration 0 : 113/113 places, 180/180 transitions.
Applied a total of 0 rules in 2 ms. Remains 113 /113 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 113/113 places, 180/180 transitions.
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 6 ms
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 7 ms
[2023-03-11 03:30:25] [INFO ] Input system was already deterministic with 180 transitions.
Starting structural reductions in LTL mode, iteration 0 : 113/113 places, 180/180 transitions.
Applied a total of 0 rules in 3 ms. Remains 113 /113 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 113/113 places, 180/180 transitions.
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 6 ms
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 7 ms
[2023-03-11 03:30:25] [INFO ] Input system was already deterministic with 180 transitions.
Starting structural reductions in LTL mode, iteration 0 : 113/113 places, 180/180 transitions.
Applied a total of 0 rules in 2 ms. Remains 113 /113 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 113/113 places, 180/180 transitions.
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 6 ms
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 7 ms
[2023-03-11 03:30:25] [INFO ] Input system was already deterministic with 180 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 113/113 places, 180/180 transitions.
Drop transitions removed 28 transitions
Trivial Post-agglo rules discarded 28 transitions
Performed 28 trivial Post agglomeration. Transition count delta: 28
Iterating post reduction 0 with 28 rules applied. Total rules applied 28 place count 113 transition count 152
Reduce places removed 28 places and 0 transitions.
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Iterating post reduction 1 with 33 rules applied. Total rules applied 61 place count 85 transition count 147
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 2 with 5 rules applied. Total rules applied 66 place count 80 transition count 147
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 3 with 10 rules applied. Total rules applied 76 place count 75 transition count 142
Applied a total of 76 rules in 11 ms. Remains 75 /113 variables (removed 38) and now considering 142/180 (removed 38) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 75/113 places, 142/180 transitions.
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 4 ms
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 11 ms
[2023-03-11 03:30:25] [INFO ] Input system was already deterministic with 142 transitions.
Starting structural reductions in LTL mode, iteration 0 : 113/113 places, 180/180 transitions.
Applied a total of 0 rules in 2 ms. Remains 113 /113 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 113/113 places, 180/180 transitions.
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 5 ms
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 5 ms
[2023-03-11 03:30:25] [INFO ] Input system was already deterministic with 180 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 113/113 places, 180/180 transitions.
Drop transitions removed 25 transitions
Trivial Post-agglo rules discarded 25 transitions
Performed 25 trivial Post agglomeration. Transition count delta: 25
Iterating post reduction 0 with 25 rules applied. Total rules applied 25 place count 113 transition count 155
Reduce places removed 25 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 26 rules applied. Total rules applied 51 place count 88 transition count 154
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 52 place count 87 transition count 154
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 52 place count 87 transition count 152
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 56 place count 85 transition count 152
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 62 place count 82 transition count 149
Applied a total of 62 rules in 12 ms. Remains 82 /113 variables (removed 31) and now considering 149/180 (removed 31) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 82/113 places, 149/180 transitions.
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 5 ms
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 5 ms
[2023-03-11 03:30:25] [INFO ] Input system was already deterministic with 149 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 113/113 places, 180/180 transitions.
Drop transitions removed 35 transitions
Trivial Post-agglo rules discarded 35 transitions
Performed 35 trivial Post agglomeration. Transition count delta: 35
Iterating post reduction 0 with 35 rules applied. Total rules applied 35 place count 113 transition count 145
Reduce places removed 35 places and 0 transitions.
Iterating post reduction 1 with 35 rules applied. Total rules applied 70 place count 78 transition count 145
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 2 with 10 rules applied. Total rules applied 80 place count 73 transition count 140
Applied a total of 80 rules in 8 ms. Remains 73 /113 variables (removed 40) and now considering 140/180 (removed 40) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 73/113 places, 140/180 transitions.
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 5 ms
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 4 ms
[2023-03-11 03:30:25] [INFO ] Input system was already deterministic with 140 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 113/113 places, 180/180 transitions.
Drop transitions removed 21 transitions
Trivial Post-agglo rules discarded 21 transitions
Performed 21 trivial Post agglomeration. Transition count delta: 21
Iterating post reduction 0 with 21 rules applied. Total rules applied 21 place count 113 transition count 159
Reduce places removed 21 places and 0 transitions.
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Iterating post reduction 1 with 26 rules applied. Total rules applied 47 place count 92 transition count 154
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 2 with 5 rules applied. Total rules applied 52 place count 87 transition count 154
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 52 place count 87 transition count 153
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 54 place count 86 transition count 153
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 58 place count 84 transition count 151
Applied a total of 58 rules in 10 ms. Remains 84 /113 variables (removed 29) and now considering 151/180 (removed 29) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 84/113 places, 151/180 transitions.
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 4 ms
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 5 ms
[2023-03-11 03:30:25] [INFO ] Input system was already deterministic with 151 transitions.
Starting structural reductions in LTL mode, iteration 0 : 113/113 places, 180/180 transitions.
Applied a total of 0 rules in 1 ms. Remains 113 /113 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 113/113 places, 180/180 transitions.
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 5 ms
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 6 ms
[2023-03-11 03:30:25] [INFO ] Input system was already deterministic with 180 transitions.
Starting structural reductions in LTL mode, iteration 0 : 113/113 places, 180/180 transitions.
Applied a total of 0 rules in 1 ms. Remains 113 /113 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 113/113 places, 180/180 transitions.
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 5 ms
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 5 ms
[2023-03-11 03:30:25] [INFO ] Input system was already deterministic with 180 transitions.
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 5 ms
[2023-03-11 03:30:25] [INFO ] Flatten gal took : 5 ms
[2023-03-11 03:30:25] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-11 03:30:25] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 113 places, 180 transitions and 490 arcs took 1 ms.
Total runtime 4255 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT CANInsertWithFailure-PT-005
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/369
CTLFireability
FORMULA CANInsertWithFailure-PT-005-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CANInsertWithFailure-PT-005-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CANInsertWithFailure-PT-005-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CANInsertWithFailure-PT-005-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CANInsertWithFailure-PT-005-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CANInsertWithFailure-PT-005-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CANInsertWithFailure-PT-005-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CANInsertWithFailure-PT-005-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CANInsertWithFailure-PT-005-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CANInsertWithFailure-PT-005-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CANInsertWithFailure-PT-005-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CANInsertWithFailure-PT-005-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CANInsertWithFailure-PT-005-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CANInsertWithFailure-PT-005-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CANInsertWithFailure-PT-005-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CANInsertWithFailure-PT-005-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678505427934
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/369/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/369/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/369/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 10 (type EXCL) for 9 CANInsertWithFailure-PT-005-CTLFireability-03
lola: time limit : 128 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 10 (type EXCL) for CANInsertWithFailure-PT-005-CTLFireability-03
lola: result : false
lola: markings : 102
lola: fired transitions : 131
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 CANInsertWithFailure-PT-005-CTLFireability-00
lola: time limit : 133 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for CANInsertWithFailure-PT-005-CTLFireability-00
lola: result : true
lola: markings : 13
lola: fired transitions : 26
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 CANInsertWithFailure-PT-005-CTLFireability-04
lola: time limit : 138 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:776
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 13 (type EXCL) for CANInsertWithFailure-PT-005-CTLFireability-04
lola: result : false
lola: markings : 5
lola: fired transitions : 18
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 56 (type EXCL) for 21 CANInsertWithFailure-PT-005-CTLFireability-07
lola: time limit : 144 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 56 (type EXCL) for CANInsertWithFailure-PT-005-CTLFireability-07
lola: result : true
lola: markings : 13
lola: fired transitions : 13
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 35 (type EXCL) for 34 CANInsertWithFailure-PT-005-CTLFireability-10
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 35 (type EXCL) for CANInsertWithFailure-PT-005-CTLFireability-10
lola: result : false
lola: markings : 43467
lola: fired transitions : 411568
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 54 (type EXCL) for 49 CANInsertWithFailure-PT-005-CTLFireability-15
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 54 (type EXCL) for CANInsertWithFailure-PT-005-CTLFireability-15
lola: result : true
lola: markings : 13
lola: fired transitions : 13
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 52 (type EXCL) for 49 CANInsertWithFailure-PT-005-CTLFireability-15
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: FINISHED task # 52 (type EXCL) for CANInsertWithFailure-PT-005-CTLFireability-15
lola: result : false
lola: markings : 26515
lola: fired transitions : 86494
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 CANInsertWithFailure-PT-005-CTLFireability-14
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for CANInsertWithFailure-PT-005-CTLFireability-14
lola: result : false
lola: markings : 152783
lola: fired transitions : 622147
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 28 CANInsertWithFailure-PT-005-CTLFireability-08
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for CANInsertWithFailure-PT-005-CTLFireability-08
lola: result : true
lola: markings : 100
lola: fired transitions : 124
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 CANInsertWithFailure-PT-005-CTLFireability-06
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for CANInsertWithFailure-PT-005-CTLFireability-06
lola: result : true
lola: markings : 64
lola: fired transitions : 159
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 CANInsertWithFailure-PT-005-CTLFireability-05
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for CANInsertWithFailure-PT-005-CTLFireability-05
lola: result : true
lola: markings : 123
lola: fired transitions : 174
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 CANInsertWithFailure-PT-005-CTLFireability-01
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for CANInsertWithFailure-PT-005-CTLFireability-01
lola: result : true
lola: markings : 13
lola: fired transitions : 66
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 57 (type EXCL) for 40 CANInsertWithFailure-PT-005-CTLFireability-12
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 57 (type EXCL) for CANInsertWithFailure-PT-005-CTLFireability-12
lola: result : false
lola: markings : 10
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 21 CANInsertWithFailure-PT-005-CTLFireability-07
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 24 (type EXCL) for CANInsertWithFailure-PT-005-CTLFireability-07
lola: result : true
lola: markings : 5
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 CANInsertWithFailure-PT-005-CTLFireability-02
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for CANInsertWithFailure-PT-005-CTLFireability-02
lola: result : true
lola: markings : 34353
lola: fired transitions : 160588
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 32 (type EXCL) for 31 CANInsertWithFailure-PT-005-CTLFireability-09
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 32 (type EXCL) for CANInsertWithFailure-PT-005-CTLFireability-09
lola: result : false
lola: markings : 6
lola: fired transitions : 19
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 43 CANInsertWithFailure-PT-005-CTLFireability-13
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for CANInsertWithFailure-PT-005-CTLFireability-13
lola: result : true
lola: markings : 8
lola: fired transitions : 61
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 37 CANInsertWithFailure-PT-005-CTLFireability-11
lola: time limit : 3599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for CANInsertWithFailure-PT-005-CTLFireability-11
lola: result : false
lola: markings : 13584
lola: fired transitions : 170181
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CANInsertWithFailure-PT-005-CTLFireability-00: CTL true CTL model checker
CANInsertWithFailure-PT-005-CTLFireability-01: CTL true CTL model checker
CANInsertWithFailure-PT-005-CTLFireability-02: CTL true CTL model checker
CANInsertWithFailure-PT-005-CTLFireability-03: CTL false CTL model checker
CANInsertWithFailure-PT-005-CTLFireability-04: CTL false CTL model checker
CANInsertWithFailure-PT-005-CTLFireability-05: CTL true CTL model checker
CANInsertWithFailure-PT-005-CTLFireability-06: CTL true CTL model checker
CANInsertWithFailure-PT-005-CTLFireability-07: DISJ true CTL model checker
CANInsertWithFailure-PT-005-CTLFireability-08: CTL true CTL model checker
CANInsertWithFailure-PT-005-CTLFireability-09: CTL false CTL model checker
CANInsertWithFailure-PT-005-CTLFireability-10: CTL false CTL model checker
CANInsertWithFailure-PT-005-CTLFireability-11: CTL false CTL model checker
CANInsertWithFailure-PT-005-CTLFireability-12: EFAG true tscc_search
CANInsertWithFailure-PT-005-CTLFireability-13: CTL true CTL model checker
CANInsertWithFailure-PT-005-CTLFireability-14: CTL false CTL model checker
CANInsertWithFailure-PT-005-CTLFireability-15: CONJ false CTL model checker
Time elapsed: 1 secs. Pages in use: 1
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CANInsertWithFailure-PT-005"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is CANInsertWithFailure-PT-005, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r039-tajo-167813692900698"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/CANInsertWithFailure-PT-005.tgz
mv CANInsertWithFailure-PT-005 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;