About the Execution of LoLa+red for BridgeAndVehicles-PT-V10P10N10
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
446.867 | 29210.00 | 84646.00 | 83.80 | TTTFTFTFTFFTFFFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2023-input.r039-tajo-167813692200174.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
....................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is BridgeAndVehicles-PT-V10P10N10, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r039-tajo-167813692200174
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.6M
-rw-r--r-- 1 mcc users 12K Feb 25 12:04 CTLCardinality.txt
-rw-r--r-- 1 mcc users 96K Feb 25 12:04 CTLCardinality.xml
-rw-r--r-- 1 mcc users 49K Feb 25 12:03 CTLFireability.txt
-rw-r--r-- 1 mcc users 218K Feb 25 12:03 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 5.1K Feb 25 15:35 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 15:35 LTLCardinality.xml
-rw-r--r-- 1 mcc users 18K Feb 25 15:35 LTLFireability.txt
-rw-r--r-- 1 mcc users 62K Feb 25 15:35 LTLFireability.xml
-rw-r--r-- 1 mcc users 26K Feb 25 12:09 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 193K Feb 25 12:09 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 118K Feb 25 12:08 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 526K Feb 25 12:08 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 15:35 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.3K Feb 25 15:35 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 10 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 223K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-00
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-01
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-02
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-04
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-08
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-10
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-11
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-12
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-13
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1678483413638
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BridgeAndVehicles-PT-V10P10N10
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 21:23:35] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-10 21:23:35] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 21:23:35] [INFO ] Load time of PNML (sax parser for PT used): 65 ms
[2023-03-10 21:23:35] [INFO ] Transformed 48 places.
[2023-03-10 21:23:35] [INFO ] Transformed 288 transitions.
[2023-03-10 21:23:35] [INFO ] Parsed PT model containing 48 places and 288 transitions and 2090 arcs in 151 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 22 ms.
Working with output stream class java.io.PrintStream
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 111 resets, run finished after 535 ms. (steps per millisecond=18 ) properties (out of 15) seen :1
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-08 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 38 resets, run finished after 101 ms. (steps per millisecond=99 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10000 steps, including 54 resets, run finished after 169 ms. (steps per millisecond=59 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10000 steps, including 49 resets, run finished after 142 ms. (steps per millisecond=70 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 53 resets, run finished after 112 ms. (steps per millisecond=89 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10000 steps, including 44 resets, run finished after 114 ms. (steps per millisecond=87 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10000 steps, including 54 resets, run finished after 121 ms. (steps per millisecond=82 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 43 resets, run finished after 107 ms. (steps per millisecond=93 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 40 resets, run finished after 114 ms. (steps per millisecond=87 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10000 steps, including 41 resets, run finished after 117 ms. (steps per millisecond=85 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10000 steps, including 34 resets, run finished after 85 ms. (steps per millisecond=117 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 40 resets, run finished after 84 ms. (steps per millisecond=119 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 40 resets, run finished after 83 ms. (steps per millisecond=120 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 47 resets, run finished after 129 ms. (steps per millisecond=77 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 40 resets, run finished after 79 ms. (steps per millisecond=126 ) properties (out of 14) seen :0
Interrupted probabilistic random walk after 771877 steps, run timeout after 6001 ms. (steps per millisecond=128 ) properties seen :{}
Probabilistic random walk after 771877 steps, saw 187068 distinct states, run finished after 6006 ms. (steps per millisecond=128 ) properties seen :0
Running SMT prover for 14 properties.
[2023-03-10 21:23:43] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
// Phase 1: matrix 90 rows 48 cols
[2023-03-10 21:23:43] [INFO ] Computed 7 place invariants in 7 ms
[2023-03-10 21:23:44] [INFO ] [Real]Absence check using 7 positive place invariants in 2 ms returned sat
[2023-03-10 21:23:44] [INFO ] After 213ms SMT Verify possible using all constraints in real domain returned unsat :3 sat :0 real:11
[2023-03-10 21:23:44] [INFO ] [Nat]Absence check using 7 positive place invariants in 1 ms returned sat
[2023-03-10 21:23:44] [INFO ] After 52ms SMT Verify possible using state equation in natural domain returned unsat :13 sat :1
[2023-03-10 21:23:44] [INFO ] State equation strengthened by 22 read => feed constraints.
[2023-03-10 21:23:44] [INFO ] After 38ms SMT Verify possible using 22 Read/Feed constraints in natural domain returned unsat :13 sat :1
[2023-03-10 21:23:44] [INFO ] After 79ms SMT Verify possible using trap constraints in natural domain returned unsat :13 sat :1
Attempting to minimize the solution found.
Minimization took 33 ms.
[2023-03-10 21:23:44] [INFO ] After 248ms SMT Verify possible using all constraints in natural domain returned unsat :13 sat :1
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-15 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-13 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-12 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-11 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-10 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-04 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-02 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-01 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 14 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 1 ms.
Support contains 14 out of 48 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 48/48 places, 288/288 transitions.
Applied a total of 0 rules in 31 ms. Remains 48 /48 variables (removed 0) and now considering 288/288 (removed 0) transitions.
[2023-03-10 21:23:44] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
[2023-03-10 21:23:44] [INFO ] Invariant cache hit.
[2023-03-10 21:23:44] [INFO ] Dead Transitions using invariants and state equation in 137 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 170 ms. Remains : 48/48 places, 288/288 transitions.
Incomplete random walk after 10000 steps, including 111 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 43 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 1) seen :0
Probably explored full state space saw : 259553 states, properties seen :0
Probabilistic random walk after 1080827 steps, saw 259553 distinct states, run finished after 2231 ms. (steps per millisecond=484 ) properties seen :0
Explored full state space saw : 259556 states, properties seen :0
Exhaustive walk after 1080838 steps, saw 259556 distinct states, run finished after 1763 ms. (steps per millisecond=613 ) properties seen :0
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07 FALSE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
All properties solved without resorting to model-checking.
Total runtime 13151 ms.
starting LoLA
BK_INPUT BridgeAndVehicles-PT-V10P10N10
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678483442848
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 1 (type CNST) for 0 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-00
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 1 (type CNST) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-00
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 13 (type CNST) for 12 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-04
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 13 (type CNST) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-04
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 55 (type EXCL) for 15 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 51 (type FNDP) for 15 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type EQUN) for 15 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SRCH) for 15 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 34 (type CNST) for 33 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 34 (type CNST) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-11
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-52.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 52 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05
lola: result : false
lola: CANCELED task # 51 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 54 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 55 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 115 (type EXCL) for 3 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-01
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 98 (type FNDP) for 42 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 104 (type EQUN) for 42 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 106 (type SRCH) for 42 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 51 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05
lola: result : unknown
lola: fired transitions : 6482
lola: tried executions : 76
lola: time used : 1.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-104.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 115 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-01
lola: result : false
lola: markings : 51288
lola: fired transitions : 75396
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 96 (type EXCL) for 45 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-15
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 96 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-15
lola: result : false
lola: markings : 55154
lola: fired transitions : 112307
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 82 (type EXCL) for 39 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-13
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 106 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14
lola: result : false
lola: markings : 251269
lola: fired transitions : 756598
lola: time used : 2.000000
lola: memory pages used : 1
lola: CANCELED task # 98 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 104 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 49 (type FNDP) for 18 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 18 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SRCH) for 18 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 98 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14
lola: result : unknown
lola: fired transitions : 307067
lola: tried executions : 4138
lola: time used : 2.000000
lola: memory pages used : 0
lola: FINISHED task # 104 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 50 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06
lola: result : false
lola: CANCELED task # 49 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 58 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 92 (type FNDP) for 9 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 101 (type EQUN) for 9 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 116 (type SRCH) for 9 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 49 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06
lola: result : unknown
lola: fired transitions : 15155
lola: tried executions : 156
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-101.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 101 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03
lola: result : false
lola: CANCELED task # 92 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 116 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 61 (type FNDP) for 21 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type FNDP) for 24 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type EQUN) for 21 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 92 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 8114
lola: tried executions : 79
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 62 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-08
lola: result : true
lola: fired transitions : 84
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 84 (type FNDP) for 27 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-63.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 82 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-13
lola: result : false
lola: markings : 48024
lola: fired transitions : 72132
lola: time used : 2.000000
lola: memory pages used : 1
lola: LAUNCH task # 128 (type EXCL) for 6 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-02
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 128 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-02
lola: result : false
lola: markings : 48198
lola: fired transitions : 72306
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 78 (type EXCL) for 30 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-10
lola: time limit : 898 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-00: INITIAL true preprocessing
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-01: AG true tandem / relaxed
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-02: AG true tandem / relaxed
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-04: INITIAL true preprocessing
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06: AG true state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-08: EF true findpath
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-13: EF false tandem / relaxed
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14: EF false tandem / insertion
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-15: AG true tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07: EF 0 3 2 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09: EF 0 4 1 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-10: EF 0 4 1 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-12: EF 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
61 EF FNDP 2/597 0/5 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07 398622 t fired, 4495 attempts, .
63 EF STEQ 2/717 0/5 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07 sara is running.
78 EF EXCL 0/898 1/32 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-10 22179 m, 4435 m/sec, 43226 t fired, .
84 EF FNDP 2/717 0/5 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09 365638 t fired, 7555 attempts, .
Time elapsed: 5 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 78 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-10
lola: result : false
lola: markings : 56174
lola: fired transitions : 111536
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 120 (type EXCL) for 36 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-12
lola: time limit : 1198 sec
lola: memory limit: 32 pages
lola: FINISHED task # 120 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-12
lola: result : false
lola: markings : 61605
lola: fired transitions : 97429
lola: time used : 3.000000
lola: memory pages used : 1
lola: LAUNCH task # 100 (type EXCL) for 27 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09
lola: time limit : 1795 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-00: INITIAL true preprocessing
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-01: AG true tandem / relaxed
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-02: AG true tandem / relaxed
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-04: INITIAL true preprocessing
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06: AG true state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-08: EF true findpath
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-10: EF false tandem / relaxed
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-12: EF false tandem / relaxed
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-13: EF false tandem / relaxed
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14: EF false tandem / insertion
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-15: AG true tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07: EF 0 3 2 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09: EF 0 3 2 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
61 EF FNDP 7/1193 0/5 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07 1153368 t fired, 13162 attempts, .
63 EF STEQ 7/1193 0/5 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07 sara is running.
84 EF FNDP 7/1792 0/5 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09 1117749 t fired, 23189 attempts, .
100 EF EXCL 1/1795 1/32 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09 27425 m, 5485 m/sec, 52848 t fired, .
Time elapsed: 10 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 100 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09
lola: result : false
lola: markings : 73093
lola: fired transitions : 146019
lola: time used : 3.000000
lola: memory pages used : 1
lola: CANCELED task # 84 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 66 (type EXCL) for 21 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07
lola: time limit : 3588 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 65 (type SRCH) for 21 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 84 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 1428634
lola: tried executions : 29652
lola: time used : 9.000000
lola: memory pages used : 0
lola: FINISHED task # 65 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07
lola: result : false
lola: markings : 241573
lola: fired transitions : 736714
lola: time used : 2.000000
lola: memory pages used : 1
lola: CANCELED task # 61 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 63 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 66 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-00: INITIAL true preprocessing
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-01: AG true tandem / relaxed
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-02: AG true tandem / relaxed
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-04: INITIAL true preprocessing
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06: AG true state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07: EF false tandem / insertion
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-08: EF true findpath
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09: EF false tandem / relaxed
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-10: EF false tandem / relaxed
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-12: EF false tandem / relaxed
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-13: EF false tandem / relaxed
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14: EF false tandem / insertion
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-15: AG true tandem / relaxed
Time elapsed: 14 secs. Pages in use: 3
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-PT-V10P10N10"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is BridgeAndVehicles-PT-V10P10N10, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r039-tajo-167813692200174"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-PT-V10P10N10.tgz
mv BridgeAndVehicles-PT-V10P10N10 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;