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Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r039-tajo-167813692100118
Last Updated
May 14, 2023

About the Execution of LoLa+red for BridgeAndVehicles-COL-V80P20N10

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1569.936 31668.00 3711091.00 7236.70 TTFTFFFTFFTFFFTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r039-tajo-167813692100118.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is BridgeAndVehicles-COL-V80P20N10, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r039-tajo-167813692100118
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 544K
-rw-r--r-- 1 mcc users 9.8K Feb 25 12:17 CTLCardinality.txt
-rw-r--r-- 1 mcc users 102K Feb 25 12:17 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Feb 25 12:13 CTLFireability.txt
-rw-r--r-- 1 mcc users 41K Feb 25 12:13 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.2K Feb 25 15:36 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 15:36 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 15:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:36 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 12:39 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 119K Feb 25 12:39 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 25 12:35 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 82K Feb 25 12:35 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 15:36 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 15:36 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 10 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 45K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678480727755

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BridgeAndVehicles-COL-V80P20N10
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 20:38:49] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-10 20:38:49] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 20:38:49] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-10 20:38:49] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-10 20:38:50] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 407 ms
[2023-03-10 20:38:50] [INFO ] Imported 15 HL places and 11 HL transitions for a total of 188 PT places and 289218.0 transition bindings in 16 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 20 ms.
Working with output stream class java.io.PrintStream
[2023-03-10 20:38:50] [INFO ] Built PT skeleton of HLPN with 15 places and 11 transitions 56 arcs in 3 ms.
[2023-03-10 20:38:50] [INFO ] Skeletonized 16 HLPN properties in 1 ms.
Remains 16 properties that can be checked using skeleton over-approximation.
Reduce places removed 3 places and 0 transitions.
Computed a total of 9 stabilizing places and 6 stable transitions
Graph (complete) has 22 edges and 12 vertex of which 10 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.1 ms
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
[2023-03-10 20:38:50] [INFO ] Flatten gal took : 11 ms
[2023-03-10 20:38:50] [INFO ] Flatten gal took : 1 ms
FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02 FALSE TECHNIQUES CPN_APPROX
FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09 FALSE TECHNIQUES CPN_APPROX
FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10 TRUE TECHNIQUES CPN_APPROX
FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13 FALSE TECHNIQUES CPN_APPROX
Arc [1:1*[(MOD (ADD $cA 1) 81)]] contains successor/predecessor on variables of sort voitureA
Arc [6:1*[(MOD (ADD (MOD (MINUS $cB 1) 81) 81) 81)]] contains successor/predecessor on variables of sort voitureB
Arc [13:1*[(MOD (ADD $cpt 1) 11)]] contains successor/predecessor on variables of sort compteur
Arc [14:1*[(MOD (ADD $s 1) 2)]] contains successor/predecessor on variables of sort sens
[2023-03-10 20:38:50] [INFO ] Unfolded HLPN to a Petri net with 188 places and 2108 transitions 15950 arcs in 114 ms.
[2023-03-10 20:38:50] [INFO ] Unfolded 16 HLPN properties in 1 ms.
Incomplete random walk after 10001 steps, including 14 resets, run finished after 510 ms. (steps per millisecond=19 ) properties (out of 12) seen :5
FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10000 steps, including 5 resets, run finished after 101 ms. (steps per millisecond=99 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 4 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 6 resets, run finished after 125 ms. (steps per millisecond=80 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 5 resets, run finished after 83 ms. (steps per millisecond=120 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 5 resets, run finished after 80 ms. (steps per millisecond=125 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 6 resets, run finished after 77 ms. (steps per millisecond=129 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 5 resets, run finished after 70 ms. (steps per millisecond=142 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
[2023-03-10 20:38:51] [INFO ] Flow matrix only has 370 transitions (discarded 1738 similar events)
// Phase 1: matrix 370 rows 188 cols
[2023-03-10 20:38:51] [INFO ] Computed 7 place invariants in 39 ms
[2023-03-10 20:38:52] [INFO ] [Real]Absence check using 7 positive place invariants in 6 ms returned sat
[2023-03-10 20:38:52] [INFO ] After 402ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0 real:5
[2023-03-10 20:38:52] [INFO ] [Nat]Absence check using 7 positive place invariants in 2 ms returned sat
[2023-03-10 20:38:52] [INFO ] After 136ms SMT Verify possible using all constraints in natural domain returned unsat :7 sat :0
FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 7 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 2754 ms.
starting LoLA
BK_INPUT BridgeAndVehicles-COL-V80P20N10
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678480759423
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393352 kB
MemFree: 16068960 kB
After kill :
MemTotal: 16393352 kB
MemFree: 16068400 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 56 (type SKEL/FNDP) for 0 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SKEL/EQUN) for 0 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/SRCH) for 0 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SKEL/SRCH) for 0 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: TR BINDINGS
lola: FINISHED task # 60 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: result : true
lola: markings : 62
lola: fired transitions : 61
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 56 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 57 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 59 (type SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 63 (type SKEL/FNDP) for 12 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type SKEL/EQUN) for 12 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SKEL/SRCH) for 12 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SKEL/SRCH) for 12 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 56 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 72
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: TR BINDINGS DONE
lola: Places: 188, Transitions: 2108
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-64.sara.
lola: FINISHED task # 67 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04
lola: result : false
lola: markings : 32803
lola: fired transitions : 45764
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 63 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 64 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 66 (type SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 111 (type SKEL/FNDP) for 39 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 112 (type SKEL/EQUN) for 39 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 114 (type SKEL/SRCH) for 39 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 115 (type SKEL/SRCH) for 39 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 114 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 111 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 112 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 115 (type SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 118 (type SKEL/FNDP) for 9 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 119 (type SKEL/FNDP) for 18 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 125 (type SKEL/EQUN) for 9 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 127 (type SKEL/EQUN) for 18 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 111 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13
lola: result : unknown
lola: fired transitions : 541
lola: tried executions : 542
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: @ trans enregistrement_A
lola: FINISHED task # 64 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04
lola: result : unknown
lola: FINISHED task # 63 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 61225
lola: tried executions : 621
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-125.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-57.sara.
sara: place or transition ordering is non-deterministic
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: @ trans decision
lola: @ trans altern_cpt
lola: @ trans autorisation_A
lola: @ trans liberation_A
lola: @ trans enregistrement_B
lola: @ trans timeout_A
lola: @ trans timeout_B
lola: @ trans liberation_B
lola: @ trans basculement
lola: @ trans autorisation_B
lola: FINISHED task # 125 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03
lola: result : unknown
lola: LAUNCH task # 120 (type SKEL/FNDP) for 24 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages

lola: FINISHED task # 57 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-127.sara.

lola: FINISHED task # 127 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-112.sara.
lola: result : false
lola: CANCELED task # 119 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 122 (type SKEL/FNDP) for 33 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 146 (type SKEL/EQUN) for 33 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 119 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06
lola: result : unknown
lola: fired transitions : 181684
lola: tried executions : 200
lola: time used : 0.000000
lola: memory pages used : 0
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 122 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 33
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 146 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 89 (type SKEL/FNDP) for 36 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 90 (type SKEL/EQUN) for 36 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages

lola: FINISHED task # 112 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-146.sara.

lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 146 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-90.sara.
sara: place or transition ordering is non-deterministic

lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: FINISHED task # 90 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12
lola: result : false
lola: CANCELED task # 89 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 159 (type SKEL/FNDP) for 42 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 160 (type SKEL/EQUN) for 42 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 89 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12
lola: result : unknown
lola: fired transitions : 1668451
lola: tried executions : 1903
lola: time used : 1.000000
lola: memory pages used : 0
lola: FINISHED task # 159 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14
lola: result : true
lola: fired transitions : 193
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 160 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 95 (type SKEL/FNDP) for 45 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type SKEL/EQUN) for 45 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-96.sara.

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-160.sara.

lola: LAUNCH INITIAL
lola: LAUNCH task # 7 (type CNST) for 6 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 10 (type CNST) for 9 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 28 (type CNST) for 27 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 31 (type CNST) for 30 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 160 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14
lola: result : true
lola: FINISHED task # 28 (type CNST) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09
lola: result : false
lola: FINISHED task # 31 (type CNST) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10
lola: result : true
lola: FINISHED task # 7 (type CNST) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02
lola: result : false
lola: FINISHED task # 96 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15
lola: result : false
lola: CANCELED task # 95 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 105 (type SKEL/FNDP) for 15 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 10 (type CNST) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03
lola: result : true
lola: CANCELED task # 118 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 117 (type SKEL/FNDP) for 21 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 123 (type SKEL/EQUN) for 21 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 95 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15
lola: result : unknown
lola: fired transitions : 4392098
lola: tried executions : 54225
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 118 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 12466808
lola: tried executions : 12466809
lola: time used : 2.000000
lola: memory pages used : 0
lola: Rule S: 0 transitions removed,0 places removed
lola: FINISHED task # 105 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 269
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-123.sara.
lola: LAUNCH task # 71 (type SKEL/FNDP) for 3 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages

lola: FINISHED task # 117 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
lola: result : true
lola: fired transitions : 49
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 123 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 129 (type SKEL/EQUN) for 24 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 142 (type SKEL/SRCH) for 24 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 123 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-129.sara.
sara: place or transition ordering is non-deterministic

lola: planning for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04 stopped (result already fixed).
lola: FINISHED task # 129 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08
lola: result : false
lola: CANCELED task # 120 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 142 (type SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 72 (type SKEL/EQUN) for 3 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type SKEL/SRCH) for 3 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type SKEL/SRCH) for 3 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 120 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08
lola: result : unknown
lola: fired transitions : 5092558
lola: tried executions : 7
lola: time used : 3.000000
lola: memory pages used : 0
lola: FINISHED task # 75 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01
lola: result : false
lola: markings : 26163
lola: fired transitions : 39123
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 71 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 72 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 74 (type SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-72.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 71 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 738215
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: planning for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01 stopped (result already fixed).
lola: FINISHED task # 72 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 170 (type EXCL) for 33 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 166 (type FNDP) for 33 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 167 (type EQUN) for 33 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 169 (type SRCH) for 33 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 166 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 33
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 167 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 169 (type SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 170 (type EXCL) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11 (obsolete)
lola: FINISHED task # 167 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 178 (type EXCL) for 15 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05
lola: time limit : 1198 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 173 (type FNDP) for 15 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 174 (type EQUN) for 15 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 177 (type SRCH) for 15 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-174.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic
sara: warning, failure of lp_solve (at job 8)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03: AG true preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10: AG true preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11: AG false findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15: EF false skeleton: state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00: EF 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05: AG 0 1 4 0 1 0 0 4
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07: EF 0 5 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14: EF 0 5 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
173 EF FNDP 1/598 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 19699 t fired, 49 attempts, .
174 EF STEQ 1/718 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 sara is running.
177 EF SRCH 1/718 1/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 14646 m, 2929 m/sec, 25028 t fired, .
178 EF EXCL 1/899 1/32 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 16375 m, 3275 m/sec, 21227 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03: AG true preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10: AG true preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11: AG false findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15: EF false skeleton: state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00: EF 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05: AG 0 1 4 0 1 0 0 4
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07: EF 0 5 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14: EF 0 5 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
173 EF FNDP 6/598 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 117945 t fired, 274 attempts, .
174 EF STEQ 6/718 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 sara is running.
177 EF SRCH 6/718 1/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 71751 m, 11421 m/sec, 126096 t fired, .
178 EF EXCL 6/899 1/32 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 113469 m, 19418 m/sec, 148376 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03: AG true preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10: AG true preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11: AG false findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15: EF false skeleton: state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00: EF 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05: AG 0 1 4 0 1 0 0 4
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07: EF 0 5 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14: EF 0 5 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
173 EF FNDP 12/593 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 201033 t fired, 456 attempts, .
174 EF STEQ 12/713 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 sara is running.
177 EF SRCH 12/713 1/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 127291 m, 11108 m/sec, 226282 t fired, .
178 EF EXCL 12/899 2/32 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 139155 m, 5137 m/sec, 182226 t fired, .

Time elapsed: 16 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03: AG true preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10: AG true preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11: AG false findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15: EF false skeleton: state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00: EF 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05: AG 0 1 4 0 1 0 0 4
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07: EF 0 5 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14: EF 0 5 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
173 EF FNDP 17/587 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 287766 t fired, 641 attempts, .
174 EF STEQ 17/707 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 sara is running.
177 EF SRCH 17/707 2/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 185928 m, 11727 m/sec, 329648 t fired, .
178 EF EXCL 17/899 2/32 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 164315 m, 5032 m/sec, 215517 t fired, .

Time elapsed: 21 secs. Pages in use: 4
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03: AG true preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10: AG true preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11: AG false findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15: EF false skeleton: state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00: EF 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05: AG 0 1 4 0 1 0 0 4
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07: EF 0 5 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14: EF 0 5 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
173 EF FNDP 22/582 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 375431 t fired, 823 attempts, .
174 EF STEQ 22/702 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 sara is running.
177 EF SRCH 22/702 2/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 243378 m, 11490 m/sec, 430957 t fired, .
178 EF EXCL 22/899 2/32 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 187120 m, 4561 m/sec, 245591 t fired, .

Time elapsed: 26 secs. Pages in use: 4
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 177 (type SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05
lola: result : true
lola: markings : 256032
lola: fired transitions : 453424
lola: time used : 23.000000
lola: memory pages used : 2
lola: CANCELED task # 173 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 174 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 178 (type EXCL) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 183 (type EXCL) for 21 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
lola: time limit : 1191 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 191 (type FNDP) for 0 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 192 (type EQUN) for 0 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 194 (type SRCH) for 0 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 173 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05
lola: result : unknown
lola: fired transitions : 393138
lola: tried executions : 860
lola: time used : 23.000000
lola: memory pages used : 0
lola: FINISHED task # 174 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 194 (type SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: result : true
lola: markings : 101
lola: fired transitions : 100
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 191 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 192 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 185 (type FNDP) for 42 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 186 (type EQUN) for 42 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 188 (type SRCH) for 42 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-192.sara.
lola: FINISHED task # 191 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 99
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 185 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14
lola: result : true
lola: fired transitions : 92
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 186 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 188 (type SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 176 (type FNDP) for 21 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 179 (type EQUN) for 21 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 182 (type SRCH) for 21 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-186.sara.
lola: FINISHED task # 176 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
lola: result : true
lola: fired transitions : 49
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 179 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 182 (type SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 183 (type EXCL) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00: EF true tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03: AG true preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04: EF false skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05: AG false tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07: EF true findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10: AG true preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11: AG false findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14: EF true findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15: EF false skeleton: state equation


Time elapsed: 27 secs. Pages in use: 4
sara: place or transition ordering is non-deterministic

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V80P20N10"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is BridgeAndVehicles-COL-V80P20N10, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r039-tajo-167813692100118"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V80P20N10.tgz
mv BridgeAndVehicles-COL-V80P20N10 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;