About the Execution of LoLa+red for BridgeAndVehicles-COL-V10P10N10
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2471.707 | 34114.00 | 53109.00 | 112.40 | FTTTFFFFFFTFFTTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2023-input.r039-tajo-167813691900010.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
..................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is BridgeAndVehicles-COL-V10P10N10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r039-tajo-167813691900010
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 628K
-rw-r--r-- 1 mcc users 9.8K Feb 25 12:04 CTLCardinality.txt
-rw-r--r-- 1 mcc users 98K Feb 25 12:04 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.8K Feb 25 12:03 CTLFireability.txt
-rw-r--r-- 1 mcc users 64K Feb 25 12:03 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 15:35 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 15:35 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 15:35 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:35 LTLFireability.xml
-rw-r--r-- 1 mcc users 18K Feb 25 12:09 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 172K Feb 25 12:09 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 14K Feb 25 12:08 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 98K Feb 25 12:08 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 15:35 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 15:35 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 10 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 38K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-CTLFireability-00
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-CTLFireability-01
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-CTLFireability-02
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-CTLFireability-03
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-CTLFireability-04
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-CTLFireability-05
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-CTLFireability-06
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-CTLFireability-07
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-CTLFireability-08
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-CTLFireability-09
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-CTLFireability-10
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-CTLFireability-11
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-CTLFireability-12
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-CTLFireability-13
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-CTLFireability-14
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678478724554
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BridgeAndVehicles-COL-V10P10N10
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-10 20:05:26] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-10 20:05:26] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-10 20:05:26] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-10 20:05:26] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-10 20:05:27] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 509 ms
[2023-03-10 20:05:27] [INFO ] Imported 15 HL places and 11 HL transitions for a total of 48 PT places and 5438.0 transition bindings in 22 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 13 ms.
[2023-03-10 20:05:27] [INFO ] Built PT skeleton of HLPN with 15 places and 11 transitions 56 arcs in 14 ms.
[2023-03-10 20:05:27] [INFO ] Skeletonized 2 HLPN properties in 1 ms. Removed 14 properties that had guard overlaps.
Computed a total of 12 stabilizing places and 6 stable transitions
Graph (complete) has 51 edges and 15 vertex of which 13 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.2 ms
Remains 1 properties that can be checked using skeleton over-approximation.
Reduce places removed 3 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
Computed a total of 9 stabilizing places and 6 stable transitions
Graph (complete) has 22 edges and 12 vertex of which 10 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.1 ms
Finished random walk after 30 steps, including 0 resets, run visited all 1 properties in 7 ms. (steps per millisecond=4 )
[2023-03-10 20:05:27] [INFO ] Flatten gal took : 19 ms
[2023-03-10 20:05:27] [INFO ] Flatten gal took : 2 ms
Arc [13:1*[(MOD (ADD $cpt 1) 11)]] contains successor/predecessor on variables of sort compteur
Arc [1:1*[(MOD (ADD $cA 1) 11)]] contains successor/predecessor on variables of sort voitureA
Arc [6:1*[(MOD (ADD (MOD (MINUS $cB 1) 11) 11) 11)]] contains successor/predecessor on variables of sort voitureB
Arc [14:1*[(MOD (ADD $s 1) 2)]] contains successor/predecessor on variables of sort sens
[2023-03-10 20:05:27] [INFO ] Unfolded HLPN to a Petri net with 48 places and 288 transitions 2090 arcs in 23 ms.
[2023-03-10 20:05:27] [INFO ] Unfolded 16 HLPN properties in 1 ms.
Support contains 46 out of 48 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 48/48 places, 288/288 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 46 transition count 288
Applied a total of 2 rules in 14 ms. Remains 46 /48 variables (removed 2) and now considering 288/288 (removed 0) transitions.
[2023-03-10 20:05:27] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
// Phase 1: matrix 90 rows 46 cols
[2023-03-10 20:05:27] [INFO ] Computed 5 place invariants in 7 ms
[2023-03-10 20:05:27] [INFO ] Dead Transitions using invariants and state equation in 486 ms found 0 transitions.
[2023-03-10 20:05:27] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
[2023-03-10 20:05:27] [INFO ] Invariant cache hit.
[2023-03-10 20:05:27] [INFO ] Implicit Places using invariants in 45 ms returned []
[2023-03-10 20:05:27] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
[2023-03-10 20:05:27] [INFO ] Invariant cache hit.
[2023-03-10 20:05:28] [INFO ] State equation strengthened by 22 read => feed constraints.
[2023-03-10 20:05:28] [INFO ] Implicit Places using invariants and state equation in 56 ms returned []
Implicit Place search using SMT with State Equation took 117 ms to find 0 implicit places.
[2023-03-10 20:05:28] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
[2023-03-10 20:05:28] [INFO ] Invariant cache hit.
[2023-03-10 20:05:28] [INFO ] Dead Transitions using invariants and state equation in 187 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 46/48 places, 288/288 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 850 ms. Remains : 46/48 places, 288/288 transitions.
Support contains 46 out of 46 places after structural reductions.
[2023-03-10 20:05:28] [INFO ] Flatten gal took : 142 ms
[2023-03-10 20:05:29] [INFO ] Flatten gal took : 125 ms
[2023-03-10 20:05:30] [INFO ] Input system was already deterministic with 288 transitions.
Incomplete random walk after 10000 steps, including 111 resets, run finished after 710 ms. (steps per millisecond=14 ) properties (out of 41) seen :37
Incomplete Best-First random walk after 10001 steps, including 45 resets, run finished after 266 ms. (steps per millisecond=37 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10000 steps, including 43 resets, run finished after 233 ms. (steps per millisecond=42 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 49 resets, run finished after 197 ms. (steps per millisecond=50 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10000 steps, including 47 resets, run finished after 189 ms. (steps per millisecond=52 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
[2023-03-10 20:05:31] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
[2023-03-10 20:05:31] [INFO ] Invariant cache hit.
[2023-03-10 20:05:32] [INFO ] [Real]Absence check using 5 positive place invariants in 14 ms returned sat
[2023-03-10 20:05:32] [INFO ] After 175ms SMT Verify possible using all constraints in real domain returned unsat :3 sat :0 real:1
[2023-03-10 20:05:32] [INFO ] [Nat]Absence check using 5 positive place invariants in 2 ms returned sat
[2023-03-10 20:05:32] [INFO ] After 64ms SMT Verify possible using all constraints in natural domain returned unsat :4 sat :0
Fused 4 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 4 atomic propositions for a total of 16 simplifications.
FORMULA BridgeAndVehicles-COL-V10P10N10-CTLFireability-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-10 20:05:32] [INFO ] Flatten gal took : 54 ms
[2023-03-10 20:05:32] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA BridgeAndVehicles-COL-V10P10N10-CTLFireability-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-10 20:05:32] [INFO ] Flatten gal took : 57 ms
[2023-03-10 20:05:33] [INFO ] Input system was already deterministic with 288 transitions.
Computed a total of 29 stabilizing places and 44 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 46/46 places, 288/288 transitions.
Applied a total of 0 rules in 73 ms. Remains 46 /46 variables (removed 0) and now considering 288/288 (removed 0) transitions.
[2023-03-10 20:05:33] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
[2023-03-10 20:05:33] [INFO ] Invariant cache hit.
[2023-03-10 20:05:33] [INFO ] Dead Transitions using invariants and state equation in 278 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 352 ms. Remains : 46/46 places, 288/288 transitions.
[2023-03-10 20:05:33] [INFO ] Flatten gal took : 23 ms
[2023-03-10 20:05:33] [INFO ] Flatten gal took : 40 ms
[2023-03-10 20:05:33] [INFO ] Input system was already deterministic with 288 transitions.
Starting structural reductions in LTL mode, iteration 0 : 46/46 places, 288/288 transitions.
Applied a total of 0 rules in 3 ms. Remains 46 /46 variables (removed 0) and now considering 288/288 (removed 0) transitions.
[2023-03-10 20:05:33] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
[2023-03-10 20:05:33] [INFO ] Invariant cache hit.
[2023-03-10 20:05:34] [INFO ] Dead Transitions using invariants and state equation in 251 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 260 ms. Remains : 46/46 places, 288/288 transitions.
[2023-03-10 20:05:34] [INFO ] Flatten gal took : 29 ms
[2023-03-10 20:05:34] [INFO ] Flatten gal took : 34 ms
[2023-03-10 20:05:34] [INFO ] Input system was already deterministic with 288 transitions.
Starting structural reductions in LTL mode, iteration 0 : 46/46 places, 288/288 transitions.
Applied a total of 0 rules in 2 ms. Remains 46 /46 variables (removed 0) and now considering 288/288 (removed 0) transitions.
[2023-03-10 20:05:34] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
[2023-03-10 20:05:34] [INFO ] Invariant cache hit.
[2023-03-10 20:05:34] [INFO ] Dead Transitions using invariants and state equation in 248 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 252 ms. Remains : 46/46 places, 288/288 transitions.
[2023-03-10 20:05:34] [INFO ] Flatten gal took : 11 ms
[2023-03-10 20:05:34] [INFO ] Flatten gal took : 13 ms
[2023-03-10 20:05:34] [INFO ] Input system was already deterministic with 288 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 46/46 places, 288/288 transitions.
Applied a total of 0 rules in 14 ms. Remains 46 /46 variables (removed 0) and now considering 288/288 (removed 0) transitions.
[2023-03-10 20:05:34] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
[2023-03-10 20:05:34] [INFO ] Invariant cache hit.
[2023-03-10 20:05:34] [INFO ] Dead Transitions using invariants and state equation in 136 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 153 ms. Remains : 46/46 places, 288/288 transitions.
[2023-03-10 20:05:34] [INFO ] Flatten gal took : 10 ms
[2023-03-10 20:05:34] [INFO ] Flatten gal took : 13 ms
[2023-03-10 20:05:34] [INFO ] Input system was already deterministic with 288 transitions.
Starting structural reductions in LTL mode, iteration 0 : 46/46 places, 288/288 transitions.
Applied a total of 0 rules in 2 ms. Remains 46 /46 variables (removed 0) and now considering 288/288 (removed 0) transitions.
[2023-03-10 20:05:34] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
[2023-03-10 20:05:34] [INFO ] Invariant cache hit.
[2023-03-10 20:05:35] [INFO ] Dead Transitions using invariants and state equation in 182 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 198 ms. Remains : 46/46 places, 288/288 transitions.
[2023-03-10 20:05:35] [INFO ] Flatten gal took : 13 ms
[2023-03-10 20:05:35] [INFO ] Flatten gal took : 27 ms
[2023-03-10 20:05:35] [INFO ] Input system was already deterministic with 288 transitions.
Starting structural reductions in LTL mode, iteration 0 : 46/46 places, 288/288 transitions.
Applied a total of 0 rules in 2 ms. Remains 46 /46 variables (removed 0) and now considering 288/288 (removed 0) transitions.
[2023-03-10 20:05:35] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
[2023-03-10 20:05:35] [INFO ] Invariant cache hit.
[2023-03-10 20:05:35] [INFO ] Dead Transitions using invariants and state equation in 246 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 250 ms. Remains : 46/46 places, 288/288 transitions.
[2023-03-10 20:05:35] [INFO ] Flatten gal took : 8 ms
[2023-03-10 20:05:35] [INFO ] Flatten gal took : 8 ms
[2023-03-10 20:05:35] [INFO ] Input system was already deterministic with 288 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 46/46 places, 288/288 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 45 transition count 287
Applied a total of 2 rules in 18 ms. Remains 45 /46 variables (removed 1) and now considering 287/288 (removed 1) transitions.
[2023-03-10 20:05:35] [INFO ] Flow matrix only has 89 transitions (discarded 198 similar events)
// Phase 1: matrix 89 rows 45 cols
[2023-03-10 20:05:35] [INFO ] Computed 5 place invariants in 5 ms
[2023-03-10 20:05:35] [INFO ] Dead Transitions using invariants and state equation in 282 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 301 ms. Remains : 45/46 places, 287/288 transitions.
[2023-03-10 20:05:35] [INFO ] Flatten gal took : 10 ms
[2023-03-10 20:05:35] [INFO ] Flatten gal took : 12 ms
[2023-03-10 20:05:35] [INFO ] Input system was already deterministic with 287 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 46/46 places, 288/288 transitions.
Applied a total of 0 rules in 21 ms. Remains 46 /46 variables (removed 0) and now considering 288/288 (removed 0) transitions.
[2023-03-10 20:05:35] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
// Phase 1: matrix 90 rows 46 cols
[2023-03-10 20:05:35] [INFO ] Computed 5 place invariants in 2 ms
[2023-03-10 20:05:36] [INFO ] Dead Transitions using invariants and state equation in 188 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 212 ms. Remains : 46/46 places, 288/288 transitions.
[2023-03-10 20:05:36] [INFO ] Flatten gal took : 9 ms
[2023-03-10 20:05:36] [INFO ] Flatten gal took : 12 ms
[2023-03-10 20:05:36] [INFO ] Input system was already deterministic with 288 transitions.
Starting structural reductions in LTL mode, iteration 0 : 46/46 places, 288/288 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 45 transition count 287
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 45 transition count 287
Applied a total of 2 rules in 5 ms. Remains 45 /46 variables (removed 1) and now considering 287/288 (removed 1) transitions.
[2023-03-10 20:05:36] [INFO ] Flow matrix only has 89 transitions (discarded 198 similar events)
// Phase 1: matrix 89 rows 45 cols
[2023-03-10 20:05:36] [INFO ] Computed 5 place invariants in 1 ms
[2023-03-10 20:05:36] [INFO ] Dead Transitions using invariants and state equation in 165 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 173 ms. Remains : 45/46 places, 287/288 transitions.
[2023-03-10 20:05:36] [INFO ] Flatten gal took : 9 ms
[2023-03-10 20:05:36] [INFO ] Flatten gal took : 10 ms
[2023-03-10 20:05:36] [INFO ] Input system was already deterministic with 287 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 46/46 places, 288/288 transitions.
Applied a total of 0 rules in 22 ms. Remains 46 /46 variables (removed 0) and now considering 288/288 (removed 0) transitions.
[2023-03-10 20:05:36] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
// Phase 1: matrix 90 rows 46 cols
[2023-03-10 20:05:36] [INFO ] Computed 5 place invariants in 0 ms
[2023-03-10 20:05:36] [INFO ] Dead Transitions using invariants and state equation in 206 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 243 ms. Remains : 46/46 places, 288/288 transitions.
[2023-03-10 20:05:36] [INFO ] Flatten gal took : 8 ms
[2023-03-10 20:05:36] [INFO ] Flatten gal took : 11 ms
[2023-03-10 20:05:36] [INFO ] Input system was already deterministic with 288 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 46/46 places, 288/288 transitions.
Applied a total of 0 rules in 8 ms. Remains 46 /46 variables (removed 0) and now considering 288/288 (removed 0) transitions.
[2023-03-10 20:05:36] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
[2023-03-10 20:05:36] [INFO ] Invariant cache hit.
[2023-03-10 20:05:36] [INFO ] Dead Transitions using invariants and state equation in 179 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 191 ms. Remains : 46/46 places, 288/288 transitions.
[2023-03-10 20:05:36] [INFO ] Flatten gal took : 7 ms
[2023-03-10 20:05:36] [INFO ] Flatten gal took : 11 ms
[2023-03-10 20:05:36] [INFO ] Input system was already deterministic with 288 transitions.
Starting structural reductions in LTL mode, iteration 0 : 46/46 places, 288/288 transitions.
Applied a total of 0 rules in 1 ms. Remains 46 /46 variables (removed 0) and now considering 288/288 (removed 0) transitions.
[2023-03-10 20:05:36] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
[2023-03-10 20:05:36] [INFO ] Invariant cache hit.
[2023-03-10 20:05:37] [INFO ] Dead Transitions using invariants and state equation in 108 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 111 ms. Remains : 46/46 places, 288/288 transitions.
[2023-03-10 20:05:37] [INFO ] Flatten gal took : 9 ms
[2023-03-10 20:05:37] [INFO ] Flatten gal took : 12 ms
[2023-03-10 20:05:37] [INFO ] Input system was already deterministic with 288 transitions.
Starting structural reductions in LTL mode, iteration 0 : 46/46 places, 288/288 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 45 transition count 287
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 45 transition count 287
Applied a total of 2 rules in 3 ms. Remains 45 /46 variables (removed 1) and now considering 287/288 (removed 1) transitions.
[2023-03-10 20:05:37] [INFO ] Flow matrix only has 89 transitions (discarded 198 similar events)
// Phase 1: matrix 89 rows 45 cols
[2023-03-10 20:05:37] [INFO ] Computed 5 place invariants in 1 ms
[2023-03-10 20:05:37] [INFO ] Dead Transitions using invariants and state equation in 279 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 286 ms. Remains : 45/46 places, 287/288 transitions.
[2023-03-10 20:05:37] [INFO ] Flatten gal took : 10 ms
[2023-03-10 20:05:37] [INFO ] Flatten gal took : 12 ms
[2023-03-10 20:05:37] [INFO ] Input system was already deterministic with 287 transitions.
Starting structural reductions in LTL mode, iteration 0 : 46/46 places, 288/288 transitions.
Applied a total of 0 rules in 1 ms. Remains 46 /46 variables (removed 0) and now considering 288/288 (removed 0) transitions.
[2023-03-10 20:05:37] [INFO ] Flow matrix only has 90 transitions (discarded 198 similar events)
// Phase 1: matrix 90 rows 46 cols
[2023-03-10 20:05:37] [INFO ] Computed 5 place invariants in 1 ms
[2023-03-10 20:05:37] [INFO ] Dead Transitions using invariants and state equation in 112 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 114 ms. Remains : 46/46 places, 288/288 transitions.
[2023-03-10 20:05:37] [INFO ] Flatten gal took : 9 ms
[2023-03-10 20:05:37] [INFO ] Flatten gal took : 13 ms
[2023-03-10 20:05:37] [INFO ] Input system was already deterministic with 288 transitions.
[2023-03-10 20:05:37] [INFO ] Flatten gal took : 50 ms
[2023-03-10 20:05:38] [INFO ] Flatten gal took : 46 ms
[2023-03-10 20:05:38] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 43 ms.
[2023-03-10 20:05:38] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 46 places, 288 transitions and 2088 arcs took 2 ms.
Total runtime 11853 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT BridgeAndVehicles-COL-V10P10N10
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability
FORMULA BridgeAndVehicles-COL-V10P10N10-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V10P10N10-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V10P10N10-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V10P10N10-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V10P10N10-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V10P10N10-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V10P10N10-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V10P10N10-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V10P10N10-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V10P10N10-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V10P10N10-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V10P10N10-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V10P10N10-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V10P10N10-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678478758668
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 1.000000 secs.
lola: LAUNCH task # 1 (type EXCL) for 0 BridgeAndVehicles-COL-V10P10N10-CTLFireability-00
lola: time limit : 133 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 1 (type EXCL) for BridgeAndVehicles-COL-V10P10N10-CTLFireability-00
lola: result : false
lola: markings : 17565
lola: fired transitions : 91430
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 23 BridgeAndVehicles-COL-V10P10N10-CTLFireability-05
lola: time limit : 149 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 24 (type EXCL) for BridgeAndVehicles-COL-V10P10N10-CTLFireability-05
lola: result : false
lola: markings : 259556
lola: fired transitions : 1904750
lola: time used : 2.000000
lola: memory pages used : 2
lola: LAUNCH task # 48 (type EXCL) for 47 BridgeAndVehicles-COL-V10P10N10-CTLFireability-15
lola: time limit : 256 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for BridgeAndVehicles-COL-V10P10N10-CTLFireability-15
lola: result : true
lola: markings : 259556
lola: fired transitions : 831766
lola: time used : 1.000000
lola: memory pages used : 2
lola: LAUNCH task # 45 (type EXCL) for 44 BridgeAndVehicles-COL-V10P10N10-CTLFireability-14
lola: time limit : 276 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V10P10N10-CTLFireability-00: CTL false CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-05: CTL false CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V10P10N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V10P10N10-CTLFireability-02: CONJ 0 3 0 0 3 0 0 0
BridgeAndVehicles-COL-V10P10N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V10P10N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V10P10N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V10P10N10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V10P10N10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V10P10N10-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V10P10N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V10P10N10-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V10P10N10-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 1/276 1/32 BridgeAndVehicles-COL-V10P10N10-CTLFireability-14 147409 m, 29481 m/sec, 455342 t fired, .
Time elapsed: 9 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 14
lola: FINISHED task # 45 (type EXCL) for BridgeAndVehicles-COL-V10P10N10-CTLFireability-14
lola: result : true
lola: markings : 202612
lola: fired transitions : 1472251
lola: time used : 2.000000
lola: memory pages used : 1
lola: LAUNCH task # 42 (type EXCL) for 41 BridgeAndVehicles-COL-V10P10N10-CTLFireability-13
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 42 (type EXCL) for BridgeAndVehicles-COL-V10P10N10-CTLFireability-13
lola: result : true
lola: markings : 259556
lola: fired transitions : 1435051
lola: time used : 3.000000
lola: memory pages used : 2
lola: LAUNCH task # 33 (type EXCL) for 32 BridgeAndVehicles-COL-V10P10N10-CTLFireability-09
lola: time limit : 326 sec
lola: memory limit: 32 pages
lola: FINISHED task # 33 (type EXCL) for BridgeAndVehicles-COL-V10P10N10-CTLFireability-09
lola: result : false
lola: markings : 100836
lola: fired transitions : 828378
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 21 (type EXCL) for 20 BridgeAndVehicles-COL-V10P10N10-CTLFireability-04
lola: time limit : 358 sec
lola: memory limit: 32 pages
lola: FINISHED task # 21 (type EXCL) for BridgeAndVehicles-COL-V10P10N10-CTLFireability-04
lola: result : false
lola: markings : 6537
lola: fired transitions : 38754
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 15 (type EXCL) for 6 BridgeAndVehicles-COL-V10P10N10-CTLFireability-02
lola: time limit : 398 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V10P10N10-CTLFireability-00: CTL false CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-04: CTL false CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-05: CTL false CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-09: CTL false CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-13: CTL true CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-14: CTL true CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V10P10N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V10P10N10-CTLFireability-02: CONJ 0 2 1 0 3 0 0 0
BridgeAndVehicles-COL-V10P10N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V10P10N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V10P10N10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V10P10N10-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V10P10N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 0/398 1/32 BridgeAndVehicles-COL-V10P10N10-CTLFireability-02 20625 m, 4125 m/sec, 61165 t fired, .
Time elapsed: 14 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 14
lola: FINISHED task # 15 (type EXCL) for BridgeAndVehicles-COL-V10P10N10-CTLFireability-02
lola: result : true
lola: markings : 259556
lola: fired transitions : 867105
lola: time used : 5.000000
lola: memory pages used : 2
lola: LAUNCH task # 13 (type EXCL) for 6 BridgeAndVehicles-COL-V10P10N10-CTLFireability-02
lola: time limit : 447 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for BridgeAndVehicles-COL-V10P10N10-CTLFireability-02
lola: result : true
lola: markings : 1
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 BridgeAndVehicles-COL-V10P10N10-CTLFireability-01
lola: time limit : 596 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for BridgeAndVehicles-COL-V10P10N10-CTLFireability-01
lola: result : true
lola: markings : 6292
lola: fired transitions : 19476
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 36 (type EXCL) for 35 BridgeAndVehicles-COL-V10P10N10-CTLFireability-10
lola: time limit : 716 sec
lola: memory limit: 32 pages
lola: FINISHED task # 36 (type EXCL) for BridgeAndVehicles-COL-V10P10N10-CTLFireability-10
lola: result : true
lola: markings : 1019
lola: fired transitions : 2810
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 38 BridgeAndVehicles-COL-V10P10N10-CTLFireability-12
lola: time limit : 895 sec
lola: memory limit: 32 pages
lola: FINISHED task # 39 (type EXCL) for BridgeAndVehicles-COL-V10P10N10-CTLFireability-12
lola: result : false
lola: markings : 33
lola: fired transitions : 46
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 27 (type EXCL) for 26 BridgeAndVehicles-COL-V10P10N10-CTLFireability-06
lola: time limit : 1193 sec
lola: memory limit: 32 pages
lola: FINISHED task # 27 (type EXCL) for BridgeAndVehicles-COL-V10P10N10-CTLFireability-06
lola: result : false
lola: markings : 76
lola: fired transitions : 77
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 18 (type EXCL) for 17 BridgeAndVehicles-COL-V10P10N10-CTLFireability-03
lola: time limit : 1790 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V10P10N10-CTLFireability-00: CTL false CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-01: CTL true CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-02: CONJ true CONJ
BridgeAndVehicles-COL-V10P10N10-CTLFireability-04: CTL false CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-05: CTL false CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-06: CTL false CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-09: CTL false CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-10: CTL true CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-12: CTL false CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-13: CTL true CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-14: CTL true CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V10P10N10-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V10P10N10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
18 CTL EXCL 0/1790 1/32 BridgeAndVehicles-COL-V10P10N10-CTLFireability-03 79849 m, 15969 m/sec, 348079 t fired, .
Time elapsed: 19 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 14
lola: FINISHED task # 18 (type EXCL) for BridgeAndVehicles-COL-V10P10N10-CTLFireability-03
lola: result : true
lola: markings : 100836
lola: fired transitions : 437672
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 30 (type EXCL) for 29 BridgeAndVehicles-COL-V10P10N10-CTLFireability-08
lola: time limit : 3580 sec
lola: memory limit: 32 pages
lola: FINISHED task # 30 (type EXCL) for BridgeAndVehicles-COL-V10P10N10-CTLFireability-08
lola: result : false
lola: markings : 93562
lola: fired transitions : 191360
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V10P10N10-CTLFireability-00: CTL false CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-01: CTL true CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-02: CONJ true CONJ
BridgeAndVehicles-COL-V10P10N10-CTLFireability-03: CTL true CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-04: CTL false CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-05: CTL false CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-06: CTL false CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-08: CTL false CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-09: CTL false CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-10: CTL true CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-12: CTL false CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-13: CTL true CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-14: CTL true CTL model checker
BridgeAndVehicles-COL-V10P10N10-CTLFireability-15: CTL true CTL model checker
Time elapsed: 20 secs. Pages in use: 2
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V10P10N10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is BridgeAndVehicles-COL-V10P10N10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r039-tajo-167813691900010"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V10P10N10.tgz
mv BridgeAndVehicles-COL-V10P10N10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;