About the Execution of LoLA for BridgeAndVehicles-PT-V80P50N10
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
5627.691 | 372638.00 | 382624.00 | 258.10 | FTFFTFFTFFFF?F?F | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2023-input.r038-tajo-167813691200300.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is BridgeAndVehicles-PT-V80P50N10, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r038-tajo-167813691200300
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 7.5M
-rw-r--r-- 1 mcc users 21K Feb 25 12:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 131K Feb 25 12:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 180K Feb 25 12:17 CTLFireability.txt
-rw-r--r-- 1 mcc users 696K Feb 25 12:17 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 13K Feb 25 15:36 LTLCardinality.txt
-rw-r--r-- 1 mcc users 48K Feb 25 15:36 LTLCardinality.xml
-rw-r--r-- 1 mcc users 123K Feb 25 15:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 352K Feb 25 15:36 LTLFireability.xml
-rw-r--r-- 1 mcc users 69K Feb 25 12:49 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 357K Feb 25 12:49 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 791K Feb 25 12:45 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 3.0M Feb 25 12:45 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 4.8K Feb 25 15:36 UpperBounds.txt
-rw-r--r-- 1 mcc users 11K Feb 25 15:36 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 10 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 1.7M Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-LTLFireability-00
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-LTLFireability-01
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-LTLFireability-02
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-LTLFireability-03
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-LTLFireability-04
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-LTLFireability-05
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-LTLFireability-06
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-LTLFireability-07
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-LTLFireability-08
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-LTLFireability-09
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-LTLFireability-10
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-LTLFireability-11
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-LTLFireability-12
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-LTLFireability-13
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-LTLFireability-14
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1678421241954
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BridgeAndVehicles-PT-V80P50N10
Not applying reductions.
Model is PT
LTLFireability PT
starting LoLA
BK_INPUT BridgeAndVehicles-PT-V80P50N10
BK_EXAMINATION: LTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
LTLFireability
FORMULA BridgeAndVehicles-PT-V80P50N10-LTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P50N10-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P50N10-LTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P50N10-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P50N10-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P50N10-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P50N10-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P50N10-LTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P50N10-LTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P50N10-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P50N10-LTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P50N10-LTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P50N10-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V80P50N10-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678421614592
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/LTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:524
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:496
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:370
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:370
lola: rewrite Frontend/Parser/formula_rewrite.k:424
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: LAUNCH task # 8 (type EXCL) for 7 BridgeAndVehicles-PT-V80P50N10-LTLFireability-01
lola: time limit : 148 sec
lola: memory limit: 32 pages
lola: FINISHED task # 8 (type EXCL) for BridgeAndVehicles-PT-V80P50N10-LTLFireability-01
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 36 (type EXCL) for 33 BridgeAndVehicles-PT-V80P50N10-LTLFireability-07
lola: time limit : 162 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 77 (type FNDP) for 0 BridgeAndVehicles-PT-V80P50N10-LTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 78 (type EQUN) for 0 BridgeAndVehicles-PT-V80P50N10-LTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 80 (type SRCH) for 0 BridgeAndVehicles-PT-V80P50N10-LTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:764
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:797
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: FINISHED task # 77 (type FNDP) for BridgeAndVehicles-PT-V80P50N10-LTLFireability-00
lola: result : true
lola: fired transitions : 79
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 78 (type EQUN) for BridgeAndVehicles-PT-V80P50N10-LTLFireability-00 (obsolete)
lola: CANCELED task # 80 (type SRCH) for BridgeAndVehicles-PT-V80P50N10-LTLFireability-00 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 85 (type FNDP) for 40 BridgeAndVehicles-PT-V80P50N10-LTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 86 (type EQUN) for 40 BridgeAndVehicles-PT-V80P50N10-LTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 88 (type SRCH) for 40 BridgeAndVehicles-PT-V80P50N10-LTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 36 (type EXCL) for BridgeAndVehicles-PT-V80P50N10-LTLFireability-07
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 67 (type EXCL) for 66 BridgeAndVehicles-PT-V80P50N10-LTLFireability-14
lola: time limit : 188 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: FINISHED task # 88 (type SRCH) for BridgeAndVehicles-PT-V80P50N10-LTLFireability-08
lola: result : unknown
lola: markings : 8
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 90 (type FNDP) for 69 BridgeAndVehicles-PT-V80P50N10-LTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 85 (type FNDP) for BridgeAndVehicles-PT-V80P50N10-LTLFireability-08
lola: result : true
lola: fired transitions : 80
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 86 (type EQUN) for BridgeAndVehicles-PT-V80P50N10-LTLFireability-08 (obsolete)
lola: LAUNCH task # 91 (type EQUN) for 69 BridgeAndVehicles-PT-V80P50N10-LTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 93 (type SRCH) for 69 BridgeAndVehicles-PT-V80P50N10-LTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 90 (type FNDP) for BridgeAndVehicles-PT-V80P50N10-LTLFireability-15
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 91 (type EQUN) for BridgeAndVehicles-PT-V80P50N10-LTLFireability-15 (obsolete)
lola: CANCELED task # 93 (type SRCH) for BridgeAndVehicles-PT-V80P50N10-LTLFireability-15 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/LTLFireability-86.sara.
sara: try reading problem file /home/mcc/execution/LTLFireability-91.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-PT-V80P50N10-LTLFireability-00: CONJ false findpath
BridgeAndVehicles-PT-V80P50N10-LTLFireability-01: LTL true LTL model checker
BridgeAndVehicles-PT-V80P50N10-LTLFireability-08: CONJ false findpath
BridgeAndVehicles-PT-V80P50N10-LTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-04: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-05: CONJ 0 3 0 0 3 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-07: CONJ 0 1 0 0 3 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-11: CONJ 0 2 0 0 2 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
67 LTL EXCL 0/238 1/32 BridgeAndVehicles-PT-V80P50N10-LTLFireability-14 45462 m, 9092 m/sec, 210679 t fired, .
Time elapsed: 26 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 91 (type EQUN) for BridgeAndVehicles-PT-V80P50N10-LTLFireability-15
lola: result : true
lola: FINISHED task # 86 (type EQUN) for BridgeAndVehicles-PT-V80P50N10-LTLFireability-08
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-PT-V80P50N10-LTLFireability-00: CONJ false findpath
BridgeAndVehicles-PT-V80P50N10-LTLFireability-01: LTL true LTL model checker
BridgeAndVehicles-PT-V80P50N10-LTLFireability-08: CONJ false findpath
BridgeAndVehicles-PT-V80P50N10-LTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-04: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-05: CONJ 0 3 0 0 3 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-07: CONJ 0 1 0 0 3 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-11: CONJ 0 2 0 0 2 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
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lola: CANCELED task # 61 (type EXCL) for BridgeAndVehicles-PT-V80P50N10-LTLFireability-12 (memory limit exceeded)
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lola: LAUNCH task # 64 (type EXCL) for 63 BridgeAndVehicles-PT-V80P50N10-LTLFireability-13
lola: time limit : 1614 sec
lola: memory limit: 32 pages
lola: FINISHED task # 64 (type EXCL) for BridgeAndVehicles-PT-V80P50N10-LTLFireability-13
lola: result : false
lola: markings : 498
lola: fired transitions : 498
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 11 (type EXCL) for 10 BridgeAndVehicles-PT-V80P50N10-LTLFireability-02
lola: time limit : 3228 sec
lola: memory limit: 32 pages
lola: FINISHED task # 11 (type EXCL) for BridgeAndVehicles-PT-V80P50N10-LTLFireability-02
lola: result : false
lola: markings : 1689
lola: fired transitions : 2620
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
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BridgeAndVehicles-PT-V80P50N10-LTLFireability-00: CONJ false findpath
BridgeAndVehicles-PT-V80P50N10-LTLFireability-01: LTL true LTL model checker
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BridgeAndVehicles-PT-V80P50N10-LTLFireability-11: CONJ false LTL model checker
BridgeAndVehicles-PT-V80P50N10-LTLFireability-12: LTL unknown AGGR
BridgeAndVehicles-PT-V80P50N10-LTLFireability-13: LTL false LTL model checker
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-PT-V80P50N10"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-PT-V80P50N10, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r038-tajo-167813691200300"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-PT-V80P50N10.tgz
mv BridgeAndVehicles-PT-V80P50N10 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;