Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r038-tajo-167813691200298.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
........................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is BridgeAndVehicles-PT-V80P50N10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r038-tajo-167813691200298
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 7.5M
-rw-r--r-- 1 mcc users 21K Feb 25 12:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 131K Feb 25 12:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 180K Feb 25 12:17 CTLFireability.txt
-rw-r--r-- 1 mcc users 696K Feb 25 12:17 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 13K Feb 25 15:36 LTLCardinality.txt
-rw-r--r-- 1 mcc users 48K Feb 25 15:36 LTLCardinality.xml
-rw-r--r-- 1 mcc users 123K Feb 25 15:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 352K Feb 25 15:36 LTLFireability.xml
-rw-r--r-- 1 mcc users 69K Feb 25 12:49 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 357K Feb 25 12:49 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 791K Feb 25 12:45 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 3.0M Feb 25 12:45 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 4.8K Feb 25 15:36 UpperBounds.txt
-rw-r--r-- 1 mcc users 11K Feb 25 15:36 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 10 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 1.7M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-CTLFireability-00
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-CTLFireability-01
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-CTLFireability-02
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-CTLFireability-03
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-CTLFireability-04
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-CTLFireability-05
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-CTLFireability-06
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-CTLFireability-07
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-CTLFireability-08
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-CTLFireability-09
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-CTLFireability-10
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-CTLFireability-11
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-CTLFireability-12
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-CTLFireability-13
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-CTLFireability-14
FORMULA_NAME BridgeAndVehicles-PT-V80P50N10-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678421198988

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BridgeAndVehicles-PT-V80P50N10
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT BridgeAndVehicles-PT-V80P50N10
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA BridgeAndVehicles-PT-V80P50N10-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V80P50N10-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V80P50N10-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V80P50N10-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V80P50N10-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V80P50N10-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V80P50N10-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V80P50N10-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V80P50N10-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V80P50N10-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V80P50N10-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V80P50N10-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678421874638

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:460
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 22 (type EXCL) for 21 BridgeAndVehicles-PT-V80P50N10-CTLFireability-07
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:662
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:716
lola: rewrite Frontend/Parser/formula_rewrite.k:688
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:742
lola: LAUNCH task # 64 (type FNDP) for 61 BridgeAndVehicles-PT-V80P50N10-CTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type EQUN) for 61 BridgeAndVehicles-PT-V80P50N10-CTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SRCH) for 61 BridgeAndVehicles-PT-V80P50N10-CTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:715
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 69 (type SRCH) for BridgeAndVehicles-PT-V80P50N10-CTLFireability-15
lola: result : unknown
lola: markings : 12
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 71 (type FNDP) for 33 BridgeAndVehicles-PT-V80P50N10-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 71 (type FNDP) for BridgeAndVehicles-PT-V80P50N10-CTLFireability-11
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/CTLFireability-67.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-08: EFAGEF 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-11: DISJ 0 1 0 0 3 0 0 3
BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ 0 4 0 0 4 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF 0 1 2 0 2 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 1/188 1/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-07 73160 m, 14632 m/sec, 262622 t fired, .
64 EF FNDP 0/3581 0/5 BridgeAndVehicles-PT-V80P50N10-CTLFireability-15 4299 t fired, 13 attempts, .
67 EF STEQ 0/3581 0/5 BridgeAndVehicles-PT-V80P50N10-CTLFireability-15 sara is running.

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lola: FINISHED task # 64 (type FNDP) for BridgeAndVehicles-PT-V80P50N10-CTLFireability-15
lola: result : true
lola: fired transitions : 7082
lola: tried executions : 21
lola: time used : 1.000000
lola: memory pages used : 0
lola: CANCELED task # 67 (type EQUN) for BridgeAndVehicles-PT-V80P50N10-CTLFireability-15 (obsolete)
lola: FINISHED task # 67 (type EQUN) for BridgeAndVehicles-PT-V80P50N10-CTLFireability-15
lola: result : unknown
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-08: EFAGEF 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-11: DISJ 0 1 0 0 3 0 0 3
BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ 0 4 0 0 4 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 6/199 4/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-07 523350 m, 90038 m/sec, 1937863 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-08: EFAGEF 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-11: DISJ 0 1 0 0 3 0 0 3
BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ 0 4 0 0 4 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 11/199 7/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-07 1087213 m, 112772 m/sec, 3641907 t fired, .

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lola: FINISHED task # 22 (type EXCL) for BridgeAndVehicles-PT-V80P50N10-CTLFireability-07
lola: result : true
lola: markings : 1118372
lola: fired transitions : 3748106
lola: time used : 12.000000
lola: memory pages used : 7
lola: LAUNCH task # 59 (type EXCL) for 46 BridgeAndVehicles-PT-V80P50N10-CTLFireability-14
lola: time limit : 210 sec
lola: memory limit: 32 pages
lola: FINISHED task # 59 (type EXCL) for BridgeAndVehicles-PT-V80P50N10-CTLFireability-14
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 57 (type EXCL) for 46 BridgeAndVehicles-PT-V80P50N10-CTLFireability-14
lola: time limit : 223 sec
lola: memory limit: 32 pages
lola: FINISHED task # 57 (type EXCL) for BridgeAndVehicles-PT-V80P50N10-CTLFireability-14
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 53 (type EXCL) for 46 BridgeAndVehicles-PT-V80P50N10-CTLFireability-14
lola: time limit : 238 sec
lola: memory limit: 32 pages
lola: FINISHED task # 53 (type EXCL) for BridgeAndVehicles-PT-V80P50N10-CTLFireability-14
lola: result : true
lola: markings : 673
lola: fired transitions : 672
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 43 BridgeAndVehicles-PT-V80P50N10-CTLFireability-13
lola: time limit : 274 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-PT-V80P50N10-CTLFireability-07: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-08: EFAGEF 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-11: DISJ 0 1 0 0 3 0 0 3
BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 4/274 2/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-13 330945 m, 66189 m/sec, 884458 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-07: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-08: EFAGEF 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-11: DISJ 0 1 0 0 3 0 0 3
BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 9/274 5/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-13 708417 m, 75494 m/sec, 1918673 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-07: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-08: EFAGEF 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-11: DISJ 0 1 0 0 3 0 0 3
BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 14/274 7/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-13 1064051 m, 71126 m/sec, 3087484 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-07: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-08: EFAGEF 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-11: DISJ 0 1 0 0 3 0 0 3
BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 19/274 9/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-13 1400664 m, 67322 m/sec, 4203096 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-07: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-08: EFAGEF 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-11: DISJ 0 1 0 0 3 0 0 3
BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 24/274 11/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-13 1769618 m, 73790 m/sec, 5412982 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-07: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-08: EFAGEF 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 29/274 13/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-13 2140363 m, 74149 m/sec, 6642265 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-07: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-08: EFAGEF 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-11: DISJ 0 1 0 0 3 0 0 3
BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 34/274 15/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-13 2531398 m, 78207 m/sec, 7928146 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-07: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-08: EFAGEF 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-05: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-06: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-07: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-11: DISJ 0 0 0 0 3 0 1 3
BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 131/480 16/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-03 2609217 m, 20295 m/sec, 23837241 t fired, .

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lola: FINISHED task # 10 (type EXCL) for BridgeAndVehicles-PT-V80P50N10-CTLFireability-03
lola: result : true
lola: markings : 2693665
lola: fired transitions : 24608612
lola: time used : 135.000000
lola: memory pages used : 16
lola: LAUNCH task # 7 (type EXCL) for 6 BridgeAndVehicles-PT-V80P50N10-CTLFireability-02
lola: time limit : 537 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-PT-V80P50N10-CTLFireability-03: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-05: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-06: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-07: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 1/537 1/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-02 86800 m, 17360 m/sec, 197509 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-03: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-05: CTL true CTL model checker
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-07: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 6/537 4/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-02 520005 m, 86641 m/sec, 1193783 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-07: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 11/537 6/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-02 898781 m, 75755 m/sec, 2067164 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 16/537 8/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-02 1273976 m, 75039 m/sec, 2932272 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 21/537 10/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-02 1693408 m, 83886 m/sec, 3898032 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-03: CTL true CTL model checker
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL 0 1 0 0 1 0 0 0
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7 CTL EXCL 26/537 13/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-02 2140870 m, 89492 m/sec, 4929230 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-07: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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7 CTL EXCL 31/537 16/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-02 2600528 m, 91931 m/sec, 5983826 t fired, .

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lola: FINISHED task # 7 (type EXCL) for BridgeAndVehicles-PT-V80P50N10-CTLFireability-02
lola: result : true
lola: markings : 2619089
lola: fired transitions : 6025168
lola: time used : 31.000000
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lola: LAUNCH task # 4 (type EXCL) for 3 BridgeAndVehicles-PT-V80P50N10-CTLFireability-01
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-PT-V80P50N10-CTLFireability-02: CTL true CTL model checker
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL 0 1 0 0 1 0 0 0
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4 CTL EXCL 5/639 2/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-01 199876 m, 39975 m/sec, 1358776 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-02: CTL true CTL model checker
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 10/639 3/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-01 433502 m, 46725 m/sec, 2948538 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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4 CTL EXCL 15/639 4/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-01 673512 m, 48002 m/sec, 4563402 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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4 CTL EXCL 20/639 6/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-01 890437 m, 43385 m/sec, 6025600 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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4 CTL EXCL 25/639 7/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-01 1102074 m, 42327 m/sec, 7457884 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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4 CTL EXCL 30/639 8/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-01 1343801 m, 48345 m/sec, 9062679 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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4 CTL EXCL 35/639 10/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-01 1581254 m, 47490 m/sec, 10648441 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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4 CTL EXCL 40/639 11/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-01 1815454 m, 46840 m/sec, 12240943 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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4 CTL EXCL 45/639 12/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-01 2044566 m, 45822 m/sec, 13749694 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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4 CTL EXCL 50/639 14/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-01 2265802 m, 44247 m/sec, 15238345 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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4 CTL EXCL 55/639 15/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-01 2482588 m, 43357 m/sec, 16709678 t fired, .

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lola: FINISHED task # 4 (type EXCL) for BridgeAndVehicles-PT-V80P50N10-CTLFireability-01
lola: result : false
lola: markings : 2696696
lola: fired transitions : 18160655
lola: time used : 59.000000
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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66 LTL EXCL 1/784 1/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-00 12294 m, 2458 m/sec, 21511 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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66 LTL EXCL 6/784 3/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-00 259555 m, 49452 m/sec, 478466 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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66 LTL EXCL 11/784 4/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-00 482819 m, 44652 m/sec, 902816 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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66 LTL EXCL 16/784 6/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-00 630245 m, 29485 m/sec, 1273963 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 LTL EXCL 21/784 7/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-00 774878 m, 28926 m/sec, 1643624 t fired, .

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66 LTL EXCL 26/784 8/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-00 917722 m, 28568 m/sec, 2011491 t fired, .

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66 LTL EXCL 41/784 11/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-00 1352911 m, 28793 m/sec, 3123688 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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66 LTL EXCL 86/784 22/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-00 2728000 m, 30319 m/sec, 6684084 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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66 LTL EXCL 91/784 24/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-00 2882500 m, 30900 m/sec, 7082205 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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66 LTL EXCL 96/784 25/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-00 3048458 m, 33191 m/sec, 7512509 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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66 LTL EXCL 111/784 29/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-00 3511044 m, 30008 m/sec, 8725315 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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66 LTL EXCL 126/784 32/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-00 3962483 m, 32125 m/sec, 9896756 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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13 CTL EXCL 10/3005 5/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-04 809843 m, 83201 m/sec, 3524818 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-05: CTL true CTL model checker
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-07: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-08: EFAGEF true tscc_search
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL 0 0 0 0 1 0 1 0
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-11: DISJ 0 0 0 0 3 0 1 3
BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 15/3005 8/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-04 1224354 m, 82902 m/sec, 5331080 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-06: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-07: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-08: EFAGEF true tscc_search
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 20/3005 10/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-04 1637546 m, 82638 m/sec, 7132051 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-08: EFAGEF true tscc_search
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 25/3005 12/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-04 1971590 m, 66808 m/sec, 8847836 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-08: EFAGEF true tscc_search
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 30/3005 14/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-04 2314746 m, 68631 m/sec, 10646585 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-08: EFAGEF true tscc_search
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL 0 0 0 0 1 0 1 0
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 35/3005 16/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-04 2679723 m, 72995 m/sec, 12564976 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-08: EFAGEF true tscc_search
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 40/3005 18/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-04 3050503 m, 74156 m/sec, 14521038 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-08: EFAGEF true tscc_search
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 45/3005 20/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-04 3424003 m, 74700 m/sec, 16468105 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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13 CTL EXCL 50/3005 22/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-04 3799575 m, 75114 m/sec, 18389046 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 55/3005 24/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-04 4171825 m, 74450 m/sec, 20321041 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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13 CTL EXCL 60/3005 26/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-04 4517517 m, 69138 m/sec, 22121839 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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13 CTL EXCL 65/3005 28/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-04 4860642 m, 68625 m/sec, 23911075 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 70/3005 30/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-04 5202229 m, 68317 m/sec, 25661803 t fired, .

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BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-11: DISJ 0 0 0 0 3 0 1 3
BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 75/3005 32/32 BridgeAndVehicles-PT-V80P50N10-CTLFireability-04 5551092 m, 69772 m/sec, 27419537 t fired, .

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lola: CANCELED task # 13 (type EXCL) for BridgeAndVehicles-PT-V80P50N10-CTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-PT-V80P50N10-CTLFireability-01: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-02: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-03: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-05: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-06: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-07: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-08: EFAGEF true tscc_search
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-PT-V80P50N10-CTLFireability-11: DISJ 0 0 0 0 3 0 1 3
BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-PT-V80P50N10-CTLFireability-00: SP ECTL unknown AGGR
BridgeAndVehicles-PT-V80P50N10-CTLFireability-01: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-02: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-03: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-04: CTL unknown AGGR
BridgeAndVehicles-PT-V80P50N10-CTLFireability-05: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-06: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-07: CTL true CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-08: EFAGEF true tscc_search
BridgeAndVehicles-PT-V80P50N10-CTLFireability-09: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-11: DISJ unknown DISJ
BridgeAndVehicles-PT-V80P50N10-CTLFireability-12: CTL false CTL model checker
BridgeAndVehicles-PT-V80P50N10-CTLFireability-13: CTL unknown AGGR
BridgeAndVehicles-PT-V80P50N10-CTLFireability-14: DISJ true state space /EXEG
BridgeAndVehicles-PT-V80P50N10-CTLFireability-15: EF true findpath


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-PT-V80P50N10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-PT-V80P50N10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r038-tajo-167813691200298"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-PT-V80P50N10.tgz
mv BridgeAndVehicles-PT-V80P50N10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;