About the Execution of LoLA for BridgeAndVehicles-PT-V20P10N50
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16223.004 | 547788.00 | 3020846.00 | 4526.80 | ????????????T?FF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2023-input.r038-tajo-167813691100194.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is BridgeAndVehicles-PT-V20P10N50, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r038-tajo-167813691100194
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 8.1M
-rw-r--r-- 1 mcc users 19K Feb 25 12:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 125K Feb 25 12:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 347K Feb 25 12:12 CTLFireability.txt
-rw-r--r-- 1 mcc users 1.4M Feb 25 12:12 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 7.6K Feb 25 15:35 LTLCardinality.txt
-rw-r--r-- 1 mcc users 35K Feb 25 15:35 LTLCardinality.xml
-rw-r--r-- 1 mcc users 211K Feb 25 15:35 LTLFireability.txt
-rw-r--r-- 1 mcc users 641K Feb 25 15:35 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 25 12:36 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 87K Feb 25 12:36 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 728K Feb 25 12:33 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 2.8M Feb 25 12:33 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 15:35 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 15:35 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 10 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 1.8M Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-00
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-01
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-02
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-03
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-04
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-05
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-06
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-07
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-08
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-09
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-10
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-11
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-12
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-13
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-14
FORMULA_NAME BridgeAndVehicles-PT-V20P10N50-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678411417831
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BridgeAndVehicles-PT-V20P10N50
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT BridgeAndVehicles-PT-V20P10N50
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability
FORMULA BridgeAndVehicles-PT-V20P10N50-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P10N50-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-PT-V20P10N50-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678411965619
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:132
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: Created skeleton in 0.000000 secs.
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lola: Created skeleton in 1.000000 secs.
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lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
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lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 11 (type EXCL) for 6 BridgeAndVehicles-PT-V20P10N50-CTLFireability-02
lola: time limit : 197 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 56 (type FNDP) for 37 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type EQUN) for 37 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SRCH) for 37 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V20P10N50-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 1 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-07: CTL 1 0 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-08: CTL 1 0 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-11: EF 0 1 3 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-12: CONJ 1 0 0 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-14: CTL 1 0 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 2/197 1/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-02 40900 m, 8180 m/sec, 166089 t fired, .
56 EF FNDP 0/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 --
57 EF STEQ 0/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 sara not yet started (preprocessing).
59 EF SRCH 0/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 --
Time elapsed: 48 secs. Pages in use: 1
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: FINISHED task # 59 (type SRCH) for BridgeAndVehicles-PT-V20P10N50-CTLFireability-11
lola: result : unknown
lola: markings : 18
lola: fired transitions : 17
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
sara: try reading problem file /home/mcc/execution/CTLFireability-57.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V20P10N50-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 1 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-11: EF 0 1 2 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 7/197 2/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-02 298488 m, 51517 m/sec, 1277615 t fired, .
56 EF FNDP 5/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 69271 t fired, 679 attempts, .
57 EF STEQ 5/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 sara is running.
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 1 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-11: EF 0 1 2 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 12/197 3/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-02 594043 m, 59111 m/sec, 2573792 t fired, .
56 EF FNDP 10/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 149459 t fired, 1386 attempts, .
57 EF STEQ 10/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 sara is running.
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 1 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-11: EF 0 1 2 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 17/197 4/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-02 861251 m, 53441 m/sec, 3756184 t fired, .
56 EF FNDP 15/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 229796 t fired, 2082 attempts, .
57 EF STEQ 15/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 sara is running.
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 1 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-11: EF 0 1 2 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 22/197 5/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-02 1113566 m, 50463 m/sec, 4875562 t fired, .
56 EF FNDP 20/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 309963 t fired, 2785 attempts, .
57 EF STEQ 20/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 sara is running.
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 1 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-11: EF 0 1 2 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 27/197 6/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-02 1356030 m, 48492 m/sec, 5959307 t fired, .
56 EF FNDP 25/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 390378 t fired, 3487 attempts, .
57 EF STEQ 25/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 sara is running.
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 1 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
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56 EF FNDP 30/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 470319 t fired, 4178 attempts, .
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56 EF FNDP 35/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 550716 t fired, 4873 attempts, .
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-11: EF 0 1 2 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 137/197 29/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-02 6733569 m, 49185 m/sec, 30348525 t fired, .
56 EF FNDP 135/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 2161375 t fired, 18788 attempts, .
57 EF STEQ 135/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 sara is running.
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 1 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-11: EF 0 1 2 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 142/197 30/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-02 6969845 m, 47255 m/sec, 31441417 t fired, .
56 EF FNDP 140/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 2241936 t fired, 19482 attempts, .
57 EF STEQ 140/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 sara is running.
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 1 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-11: EF 0 1 2 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
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11 CTL EXCL 147/197 32/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-02 7239898 m, 54010 m/sec, 32670866 t fired, .
56 EF FNDP 145/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 2322463 t fired, 20174 attempts, .
57 EF STEQ 145/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 sara is running.
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 0 0 2 0 1 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-11: EF 0 1 2 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-12: CONJ 0 2 0 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 150/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 2403043 t fired, 20862 attempts, .
57 EF STEQ 150/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 sara is running.
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lola: result : false
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lola: fired transitions : 45869
lola: time used : 0.000000
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lola: fired transitions : 947
lola: time used : 0.000000
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 0 0 2 0 1 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-11: EF 0 1 2 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-12: CONJ 0 1 1 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 5/226 3/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-12 481247 m, 96249 m/sec, 1059348 t fired, .
56 EF FNDP 155/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 2483837 t fired, 21559 attempts, .
57 EF STEQ 155/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 sara is running.
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-15: CTL false CTL model checker
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 0 0 2 0 1 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-11: EF 0 1 2 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-12: CONJ 0 1 1 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 10/226 5/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-12 962320 m, 96214 m/sec, 2141346 t fired, .
56 EF FNDP 160/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 2564214 t fired, 22252 attempts, .
57 EF STEQ 160/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 sara is running.
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 0 0 2 0 1 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-11: EF 0 1 2 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-12: CONJ 0 1 1 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
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45 CTL EXCL 15/226 7/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-12 1447222 m, 96980 m/sec, 3239981 t fired, .
56 EF FNDP 165/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 2644314 t fired, 22941 attempts, .
57 EF STEQ 165/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 sara is running.
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 0 0 2 0 1 0
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-11: EF 0 1 2 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-12: CONJ 0 1 1 0 2 0 0 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 20/226 9/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-12 1898815 m, 90318 m/sec, 4265237 t fired, .
56 EF FNDP 170/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 2724701 t fired, 23637 attempts, .
57 EF STEQ 170/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 sara is running.
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lola: fired transitions : 4966146
lola: time used : 23.000000
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 0 0 2 0 1 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
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35 CTL EXCL 2/259 1/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-10 72194 m, 14438 m/sec, 268047 t fired, .
56 EF FNDP 175/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 2805229 t fired, 24331 attempts, .
57 EF STEQ 175/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 sara is running.
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 0 0 2 0 1 0
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
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35 CTL EXCL 7/259 1/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-10 193334 m, 24228 m/sec, 1673767 t fired, .
56 EF FNDP 180/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 2885697 t fired, 25022 attempts, .
57 EF STEQ 180/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 sara is running.
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35 CTL EXCL 12/259 2/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-10 350677 m, 31468 m/sec, 3111307 t fired, .
56 EF FNDP 185/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 2965620 t fired, 25713 attempts, .
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35 CTL EXCL 67/259 9/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-10 1944033 m, 27556 m/sec, 17810979 t fired, .
56 EF FNDP 240/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 3831955 t fired, 33159 attempts, .
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35 CTL EXCL 172/259 21/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-10 4820683 m, 31025 m/sec, 44559797 t fired, .
56 EF FNDP 345/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 5480833 t fired, 47332 attempts, .
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
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35 CTL EXCL 227/259 28/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-10 6453942 m, 28759 m/sec, 59560506 t fired, .
56 EF FNDP 400/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 6354060 t fired, 54829 attempts, .
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 0 0 2 0 1 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
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35 CTL EXCL 232/259 29/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-10 6603365 m, 29884 m/sec, 60938748 t fired, .
56 EF FNDP 405/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 6433563 t fired, 55513 attempts, .
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 0 0 2 0 1 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
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56 EF FNDP 410/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 6513544 t fired, 56206 attempts, .
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 0 0 2 0 1 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
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56 EF FNDP 415/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 6593154 t fired, 56887 attempts, .
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 0 0 2 0 1 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
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35 CTL EXCL 247/259 31/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-10 7047320 m, 29257 m/sec, 65017179 t fired, .
56 EF FNDP 420/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 6668808 t fired, 57536 attempts, .
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 0 0 2 0 1 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
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56 EF FNDP 425/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 6748697 t fired, 58224 attempts, .
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 0 0 2 0 1 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
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35 CTL EXCL 257/259 32/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-10 7341476 m, 29938 m/sec, 67738633 t fired, .
56 EF FNDP 430/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 6827988 t fired, 58905 attempts, .
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 0 0 2 0 1 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-02: CONJ 0 1 0 0 2 0 1 0
BridgeAndVehicles-PT-V20P10N50-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
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56 EF FNDP 440/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 6986693 t fired, 60266 attempts, .
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29 CTL EXCL 15/259 6/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-08 1351234 m, 86579 m/sec, 5893349 t fired, .
56 EF FNDP 450/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 7145392 t fired, 61636 attempts, .
57 EF STEQ 450/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 sara is running.
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29 CTL EXCL 20/259 8/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-08 1772500 m, 84253 m/sec, 7765502 t fired, .
56 EF FNDP 455/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 7224785 t fired, 62323 attempts, .
57 EF STEQ 455/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 sara is running.
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29 CTL EXCL 25/259 10/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-08 2196665 m, 84833 m/sec, 9666627 t fired, .
56 EF FNDP 460/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 7304161 t fired, 63006 attempts, .
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29 CTL EXCL 30/259 12/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-08 2617061 m, 84079 m/sec, 11554411 t fired, .
56 EF FNDP 465/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 7384376 t fired, 63699 attempts, .
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29 CTL EXCL 35/259 14/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-08 3043089 m, 85205 m/sec, 13455938 t fired, .
56 EF FNDP 470/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 7463955 t fired, 64382 attempts, .
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29 CTL EXCL 40/259 15/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-08 3470213 m, 85424 m/sec, 15366104 t fired, .
56 EF FNDP 475/3552 0/5 BridgeAndVehicles-PT-V20P10N50-CTLFireability-11 7543659 t fired, 65069 attempts, .
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29 CTL EXCL 45/259 17/32 BridgeAndVehicles-PT-V20P10N50-CTLFireability-08 3894762 m, 84909 m/sec, 17268336 t fired, .
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BridgeAndVehicles-PT-V20P10N50-CTLFireability-02:/home/mcc/BenchKit/bin//../lola/bin//../BenchKit_head.sh: line 63: 379 Killed lola --conf=$BIN_DIR/configfiles/ctlfireabilityconf --formula=$DIR/CTLFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-PT-V20P10N50"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-PT-V20P10N50, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r038-tajo-167813691100194"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-PT-V20P10N50.tgz
mv BridgeAndVehicles-PT-V20P10N50 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;