Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r038-tajo-167813691100174.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is BridgeAndVehicles-PT-V10P10N10, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r038-tajo-167813691100174
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.6M
-rw-r--r-- 1 mcc users 12K Feb 25 12:04 CTLCardinality.txt
-rw-r--r-- 1 mcc users 96K Feb 25 12:04 CTLCardinality.xml
-rw-r--r-- 1 mcc users 49K Feb 25 12:03 CTLFireability.txt
-rw-r--r-- 1 mcc users 218K Feb 25 12:03 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 5.1K Feb 25 15:35 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 15:35 LTLCardinality.xml
-rw-r--r-- 1 mcc users 18K Feb 25 15:35 LTLFireability.txt
-rw-r--r-- 1 mcc users 62K Feb 25 15:35 LTLFireability.xml
-rw-r--r-- 1 mcc users 26K Feb 25 12:09 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 193K Feb 25 12:09 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 118K Feb 25 12:08 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 526K Feb 25 12:08 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 15:35 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.3K Feb 25 15:35 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 10 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 223K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-00
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-01
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-02
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-04
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-08
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-10
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-11
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-12
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-13
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678409949040

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BridgeAndVehicles-PT-V10P10N10
Not applying reductions.
Model is PT
ReachabilityCardinality PT
starting LoLA
BK_INPUT BridgeAndVehicles-PT-V10P10N10
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678409955521

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 1 (type CNST) for 0 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-00
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 1 (type CNST) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-00
lola: result : true
lola: LAUNCH INITIAL
lola: LAUNCH task # 34 (type CNST) for 33 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 34 (type CNST) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-11
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type EXCL) for 9 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 48 (type FNDP) for 9 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 49 (type EQUN) for 9 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SRCH) for 9 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-49.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH INITIAL
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 13 (type CNST) for 12 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-04
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 13 (type CNST) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-04
lola: result : true
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 49 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03
lola: result : false
lola: CANCELED task # 48 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 51 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 52 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 115 (type EXCL) for 3 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-01
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 69 (type FNDP) for 42 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 80 (type EQUN) for 42 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 83 (type SRCH) for 42 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 48 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 10758
lola: tried executions : 108
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-80.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 115 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-01
lola: result : false
lola: markings : 51288
lola: fired transitions : 75396
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 120 (type EXCL) for 39 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-13
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 83 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14
lola: result : false
lola: markings : 251269
lola: fired transitions : 756598
lola: time used : 2.000000
lola: memory pages used : 1
lola: CANCELED task # 69 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 80 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 70 (type FNDP) for 18 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type EQUN) for 18 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 78 (type SRCH) for 18 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 69 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14
lola: result : unknown
lola: fired transitions : 293578
lola: tried executions : 3933
lola: time used : 2.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 80 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14
lola: result : unknown
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-76.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 76 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06
lola: result : false
lola: CANCELED task # 70 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 78 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 54 (type FNDP) for 24 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type EQUN) for 24 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SRCH) for 24 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 70 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06
lola: result : unknown
lola: fired transitions : 5768
lola: tried executions : 55
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 57 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-08
lola: result : true
lola: markings : 86
lola: fired transitions : 85
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 54 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 55 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 73 (type FNDP) for 15 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 86 (type FNDP) for 21 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 88 (type EQUN) for 15 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 54 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-08
lola: result : true
lola: fired transitions : 84
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-55.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-88.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 88 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05
lola: result : false
lola: CANCELED task # 73 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 75 (type FNDP) for 36 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 92 (type EQUN) for 36 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 73 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05
lola: result : unknown
lola: fired transitions : 20170
lola: tried executions : 232
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-92.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 92 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-12
lola: result : false
lola: CANCELED task # 75 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 105 (type FNDP) for 27 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 121 (type EQUN) for 27 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 75 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-12
lola: result : unknown
lola: fired transitions : 3734
lola: tried executions : 70
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-121.sara.
sara: place or transition ordering is non-deterministic
sara: warning, failure of lp_solve (at job 239)

lola: FINISHED task # 121 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09
lola: result : false
lola: CANCELED task # 105 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 60 (type FNDP) for 30 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type EQUN) for 30 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 105 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 54928
lola: tried executions : 1139
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-71.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 120 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-13
lola: result : false
lola: markings : 48024
lola: fired transitions : 72132
lola: time used : 2.000000
lola: memory pages used : 1
lola: LAUNCH task # 97 (type EXCL) for 45 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-15
lola: time limit : 899 sec
lola: memory limit: 32 pages

lola: FINISHED task # 71 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-10
lola: result : false
lola: CANCELED task # 60 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 62 (type FNDP) for 6 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type EQUN) for 6 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 60 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-10
lola: result : unknown
lola: fired transitions : 62517
lola: tried executions : 1788
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 63 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-02
lola: result : false
lola: CANCELED task # 62 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 113 (type EQUN) for 21 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 117 (type SRCH) for 21 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 62 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 993
lola: tried executions : 16
lola: time used : 1.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-113.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 97 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-15
lola: result : false
lola: markings : 55154
lola: fired transitions : 112307
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 118 (type EXCL) for 21 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07
lola: time limit : 3596 sec
lola: memory limit: 32 pages
sara: warning, failure of lp_solve (at job 21)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-00: INITIAL true preprocessing
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-01: AG true tandem / relaxed
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-02: AG true state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-04: INITIAL true preprocessing
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06: AG true state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-08: EF true tandem / insertion
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-10: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-12: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-13: EF false tandem / relaxed
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14: EF false tandem / insertion
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-15: AG true tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07: EF 0 1 4 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
86 EF FNDP 3/3596 0/5 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07 287796 t fired, 3225 attempts, .
113 EF STEQ 2/3596 0/5 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07 sara is running.
117 EF SRCH 2/1797 1/5 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07 124571 m, 24914 m/sec, 369408 t fired, .
118 EF EXCL 1/3596 1/32 BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07 8098 m, 1619 m/sec, 10368 t fired, .

Time elapsed: 5 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 117 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07
lola: result : false
lola: markings : 241573
lola: fired transitions : 736714
lola: time used : 3.000000
lola: memory pages used : 1
lola: CANCELED task # 86 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 113 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 118 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-00: INITIAL true preprocessing
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-01: AG true tandem / relaxed
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-02: AG true state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-03: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-04: INITIAL true preprocessing
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-05: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-06: AG true state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-07: EF false tandem / insertion
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-08: EF true tandem / insertion
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-09: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-10: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-12: EF false state equation
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-13: EF false tandem / relaxed
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-14: EF false tandem / insertion
BridgeAndVehicles-PT-V10P10N10-ReachabilityCardinality-15: AG true tandem / relaxed


Time elapsed: 6 secs. Pages in use: 2

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-PT-V10P10N10"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-PT-V10P10N10, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r038-tajo-167813691100174"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-PT-V10P10N10.tgz
mv BridgeAndVehicles-PT-V10P10N10 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;