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Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r038-tajo-167813691100158
Last Updated
May 14, 2023

About the Execution of LoLA for BridgeAndVehicles-COL-V80P50N50

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
3991.107 22630.00 74750.00 86.80 FFFTFTFFTTTFFFTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r038-tajo-167813691100158.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is BridgeAndVehicles-COL-V80P50N50, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r038-tajo-167813691100158
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 536K
-rw-r--r-- 1 mcc users 9.4K Feb 25 13:21 CTLCardinality.txt
-rw-r--r-- 1 mcc users 96K Feb 25 13:21 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K Feb 25 13:13 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Feb 25 13:13 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.6K Feb 25 15:37 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Feb 25 15:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Feb 25 15:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 14:59 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 121K Feb 25 14:59 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.9K Feb 25 14:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 68K Feb 25 14:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 15:37 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 15:37 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 10 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 47K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-00
FORMULA_NAME BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-01
FORMULA_NAME BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-02
FORMULA_NAME BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-03
FORMULA_NAME BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-04
FORMULA_NAME BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-05
FORMULA_NAME BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-06
FORMULA_NAME BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-07
FORMULA_NAME BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-08
FORMULA_NAME BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-09
FORMULA_NAME BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-10
FORMULA_NAME BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-11
FORMULA_NAME BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-12
FORMULA_NAME BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-13
FORMULA_NAME BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-14
FORMULA_NAME BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678409783624

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BridgeAndVehicles-COL-V80P50N50
Not applying reductions.
Model is COL
ReachabilityCardinality COL
starting LoLA
BK_INPUT BridgeAndVehicles-COL-V80P50N50
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678409806254

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 49 (type SKEL/FNDP) for 0 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: TR BINDINGS
lola: LAUNCH task # 51 (type SKEL/FNDP) for 3 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type SKEL/EQUN) for 3 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SKEL/EQUN) for 0 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH INITIAL
lola: LAUNCH task # 35 (type SKEL/CNST) for 33 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 35 (type SKEL/CNST) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-11
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: TR BINDINGS DONE
lola: Places: 228, Transitions: 8588
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: @ trans enregistrement_A
lola: @ trans decision
lola: @ trans altern_cpt
lola: @ trans autorisation_A
lola: @ trans liberation_A
lola: @ trans enregistrement_B
lola: @ trans timeout_A
lola: @ trans timeout_B
lola: @ trans liberation_B
lola: @ trans basculement
lola: @ trans autorisation_B
lola: FINISHED task # 57 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-00
lola: result : unknown
lola: LAUNCH task # 79 (type SKEL/FNDP) for 27 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-52.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-11: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-00: EF 0 3 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-01: EF 0 3 2 0 0 0 0 0
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-02: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-03: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-04: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-05: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-06: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-07: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-08: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-09: AG 0 4 1 0 0 0 0 0
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-10: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-12: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-13: EF 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-14: AG 0 5 0 0 0 0 0 0
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-15: EF 0 5 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF FNDP 5/197 0/5 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-00 3449467 t fired, 3449468 attempts, .
51 EF FNDP 5/187 0/5 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-01 10351559 t fired, 11 attempts, .
52 EF STEQ 5/197 0/5 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-01 sara is running.
79 EF FNDP 3/189 0/5 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-09 2275957 t fired, 115383 attempts, .

Time elapsed: 6 secs. Pages in use: 0
# running tasks: 4 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: LAUNCH INITIAL
lola: LAUNCH task # 1 (type CNST) for 0 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-00
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 7 (type CNST) for 6 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-02
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 13 (type CNST) for 12 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-04
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 7 (type CNST) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-02
lola: result : false
lola: FINISHED task # 1 (type CNST) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-00
lola: result : false
lola: CANCELED task # 49 (type FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH INITIAL
lola: LAUNCH task # 40 (type CNST) for 39 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-13
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 13 (type CNST) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-04
lola: result : false
lola: LAUNCH INITIAL
lola: LAUNCH task # 46 (type CNST) for 45 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-15
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 40 (type CNST) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-13
lola: result : false
lola: FINISHED task # 46 (type CNST) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-15
lola: result : false
lola: Rule S: 0 transitions removed,0 places removed
lola: LAUNCH task # 105 (type SKEL/FNDP) for 21 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 49 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 6398034
lola: tried executions : 6398035
lola: time used : 8.000000
lola: memory pages used : 0

lola: FINISHED task # 52 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-01
lola: result : false
lola: CANCELED task # 51 (type FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 68 (type SKEL/FNDP) for 18 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SKEL/EQUN) for 18 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 51 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 17731179
lola: tried executions : 19
lola: time used : 8.000000
lola: memory pages used : 0
lola: FINISHED task # 68 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-06
lola: result : true
lola: fired transitions : 79
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 69 (type EQUN) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 133 (type SKEL/FNDP) for 36 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 142 (type SKEL/EQUN) for 36 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 133 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-12
lola: result : true
lola: fired transitions : 159
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 142 (type EQUN) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 92 (type SKEL/FNDP) for 15 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 95 (type SKEL/EQUN) for 15 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 92 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 21
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 95 (type EQUN) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 134 (type SKEL/FNDP) for 42 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 144 (type SKEL/EQUN) for 42 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-142.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-69.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787

lola: FINISHED task # 142 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-12
lola: result : true

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-95.sara.

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-144.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 95 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-05
lola: result : true
lola: FINISHED task # 69 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-06
lola: result : true
lola: FINISHED task # 144 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-14
lola: result : false
lola: CANCELED task # 134 (type FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 112 (type SKEL/FNDP) for 24 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 120 (type SKEL/EQUN) for 24 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 134 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-14
lola: result : unknown
lola: fired transitions : 96600
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-120.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 120 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-08
lola: result : false
lola: CANCELED task # 112 (type FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 87 (type SKEL/FNDP) for 9 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 90 (type SKEL/EQUN) for 9 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 112 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-08
lola: result : unknown
lola: fired transitions : 19077
lola: tried executions : 31
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-90.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 90 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-03
lola: result : false
lola: CANCELED task # 87 (type FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 136 (type SKEL/FNDP) for 30 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 155 (type SKEL/EQUN) for 30 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 87 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 3354
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: planning for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-14 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-03 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-01 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-08 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-155.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 155 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-10
lola: result : false
lola: CANCELED task # 136 (type FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 80 (type SKEL/EQUN) for 27 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type SKEL/SRCH) for 27 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 136 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-10
lola: result : unknown
lola: fired transitions : 486708
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-80.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-00: EF false preprocessing
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-01: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-02: EF false preprocessing
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-04: EF false preprocessing
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-08: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-10: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-11: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-13: EF false preprocessing
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-15: EF false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-05: EF 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-06: AG 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-07: EF 0 4 1 0 0 0 0 0
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-09: AG 0 2 3 0 0 0 0 0
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-12: AG 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
79 EF FNDP 8/1791 0/5 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-09 6327030 t fired, 324311 attempts, .
80 EF STEQ 1/1196 0/5 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-09 sara is running.
82 EF SRCH 1/1795 1/5 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-09 400151 m, 80030 m/sec, 759512 t fired, .
105 EF FNDP 2/1196 0/5 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-07 1619917 t fired, 1180 attempts, .

Time elapsed: 11 secs. Pages in use: 1
# running tasks: 4 of 4 Visible: 16

lola: FINISHED task # 80 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-09
lola: result : false
lola: CANCELED task # 79 (type FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 82 (type SRCH) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 137 (type SKEL/EQUN) for 21 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 139 (type SKEL/SRCH) for 21 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 140 (type SKEL/SRCH) for 21 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 79 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 6447433
lola: tried executions : 330518
lola: time used : 9.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-137.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 137 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-07
lola: result : false
lola: CANCELED task # 105 (type FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 139 (type SRCH) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 140 (type SRCH) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-07 (obsolete)
lola: FINISHED task # 105 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 4408567
lola: tried executions : 3065
lola: time used : 3.000000
lola: memory pages used : 0
lola: planning for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-10 stopped (result already fixed).
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-00: EF false preprocessing
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-01: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-02: EF false preprocessing
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-04: EF false preprocessing
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-07: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-08: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-09: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-10: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-11: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-13: EF false preprocessing
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-15: EF false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-05: EF 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-06: AG 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-12: AG 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 16 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 171 (type EXCL) for 15 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-05
lola: time limit : 1193 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 167 (type FNDP) for 15 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 168 (type EQUN) for 15 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 170 (type SRCH) for 15 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 167 (type FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 21
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 168 (type EQUN) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 170 (type SRCH) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 171 (type EXCL) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-05 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-168.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-00: EF false preprocessing
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-01: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-02: EF false preprocessing
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-04: EF false preprocessing
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-05: EF true findpath
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-07: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-08: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-09: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-10: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-11: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-13: EF false preprocessing
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-15: EF false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-06: AG 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-12: AG 0 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 21 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 184 (type EXCL) for 36 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-12
lola: time limit : 1789 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 180 (type FNDP) for 36 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 181 (type EQUN) for 36 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 183 (type SRCH) for 36 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 180 (type FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-12
lola: result : true
lola: fired transitions : 162
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 181 (type EQUN) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 183 (type SRCH) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 184 (type EXCL) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-12 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-181.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 191 (type EXCL) for 18 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-06
lola: time limit : 3578 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 187 (type FNDP) for 18 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 188 (type EQUN) for 18 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 190 (type SRCH) for 18 BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 190 (type SRCH) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-06
lola: result : true
lola: markings : 81
lola: fired transitions : 80
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 187 (type FNDP) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 188 (type EQUN) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 191 (type EXCL) for BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-06 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-00: EF false preprocessing
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-01: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-02: EF false preprocessing
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-04: EF false preprocessing
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-05: EF true findpath
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-06: AG false tandem / insertion
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-07: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-08: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-09: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-10: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-11: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-12: AG false findpath
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-13: EF false preprocessing
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-14: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P50N50-ReachabilityCardinality-15: EF false preprocessing


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V80P50N50"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-COL-V80P50N50, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r038-tajo-167813691100158"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V80P50N50.tgz
mv BridgeAndVehicles-COL-V80P50N50 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;