About the Execution of LoLA for BridgeAndVehicles-COL-V80P50N20
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 5991.680 | 3600000.00 | 8511324.00 | 2415.60 | TT?TFF?TFF?T??FF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2023-input.r038-tajo-167813691000145.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is BridgeAndVehicles-COL-V80P50N20, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r038-tajo-167813691000145
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 472K
-rw-r--r-- 1 mcc users 6.2K Feb 25 12:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 54K Feb 25 12:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.8K Feb 25 12:50 CTLFireability.txt
-rw-r--r-- 1 mcc users 67K Feb 25 12:50 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 15:36 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 15:36 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 25 15:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 15:36 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 13:32 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 104K Feb 25 13:32 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.0K Feb 25 13:28 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 61K Feb 25 13:28 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 15:36 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 15:36 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 10 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 45K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00
FORMULA_NAME BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01
FORMULA_NAME BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02
FORMULA_NAME BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03
FORMULA_NAME BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04
FORMULA_NAME BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05
FORMULA_NAME BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06
FORMULA_NAME BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07
FORMULA_NAME BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08
FORMULA_NAME BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09
FORMULA_NAME BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10
FORMULA_NAME BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11
FORMULA_NAME BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12
FORMULA_NAME BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13
FORMULA_NAME BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14
FORMULA_NAME BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15
=== Now, execution of the tool begins
BK_START 1678409427905
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BridgeAndVehicles-COL-V80P50N20
Not applying reductions.
Model is COL
CTLCardinality PT
[2023-03-10 00:50:29] [INFO ] Running its-tools with arguments : [-pnfolder, ., -examination, CTLCardinality, --reduce-single, STATESPACE]
[2023-03-10 00:50:29] [INFO ] Parsing pnml file : /home/mcc/execution/./model.pnml
[2023-03-10 00:50:29] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-10 00:50:30] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-10 00:50:30] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 461 ms
[2023-03-10 00:50:30] [INFO ] Imported 15 HL places and 11 HL transitions for a total of 198 PT places and 551698.0 transition bindings in 15 ms.
Parsed 16 properties from file ./CTLCardinality.xml in 10 ms.
[2023-03-10 00:50:30] [INFO ] Unfolded HLPN to a Petri net with 198 places and 3728 transitions 28830 arcs in 149 ms.
[2023-03-10 00:50:30] [INFO ] Unfolded 16 HLPN properties in 1 ms.
[2023-03-10 00:50:31] [INFO ] Export to MCC of 16 properties in file ./CTLCardinality.STATESPACE.xml took 3 ms.
[2023-03-10 00:50:31] [INFO ] Export to PNML in file ./model.STATESPACE.pnml of net with 198 places, 3728 transitions and 28830 arcs took 68 ms.
Total runtime 1482 ms.
starting LoLA
BK_INPUT BridgeAndVehicles-COL-V80P50N20
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution/unfCTLCardinality
FORMULA BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393340 kB
MemFree: 10167904 kB
After kill :
MemTotal: 16393340 kB
MemFree: 16115032 kB
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/unfCTLCardinality/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/unfCTLCardinality/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/unfCTLCardinality/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:132
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:123
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:135
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:182
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:135
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:132
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:135
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:460
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:165
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:123
lola: rewrite Frontend/Parser/formula_rewrite.k:123
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 10 (type CNST) for 9 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 22 (type CNST) for 21 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 22 (type CNST) for BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07
lola: result : true
lola: FINISHED task # 10 (type CNST) for BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03
lola: result : true
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 4 (type CNST) for 3 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 4 (type CNST) for BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 46 (type CNST) for 45 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 46 (type CNST) for BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11
lola: result : true
lola: Created skeleton in 1.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL 0 0 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 0 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF 0 0 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 0 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 0 0 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 0 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 0 0 2 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL 0 0 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 5 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 56 (type EXCL) for 55 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 66 (type FNDP) for 12 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type EQUN) for 12 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SRCH) for 12 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 69 (type SRCH) for BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04
lola: result : unknown
lola: markings : 28
lola: fired transitions : 35
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 71 (type FNDP) for 48 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
sara: try reading problem file /home/mcc/execution/unfCTLCardinality/CTLCardinality-67.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF 0 1 2 0 2 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 4 0 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 4 1 0 2 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 4/224 2/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13 239864 m, 47972 m/sec, 913698 t fired, .
66 EF FNDP 1/1794 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04 1320 t fired, 3 attempts, .
67 EF STEQ 1/1794 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04 sara is running.
71 EF FNDP 1/3590 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2334 t fired, 8 attempts, .
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# running tasks: 4 of 4 Visible: 16
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 67 (type EQUN) for BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04
lola: result : false
lola: CANCELED task # 66 (type FNDP) for BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04 (obsolete)
lola: LAUNCH task # 72 (type EQUN) for 48 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 74 (type SRCH) for 48 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 66 (type FNDP) for BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04
lola: result : unknown
lola: fired transitions : 1926
lola: tried executions : 5
lola: time used : 2.000000
lola: memory pages used : 0
lola: FINISHED task # 74 (type SRCH) for BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12
lola: result : unknown
lola: markings : 11
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/unfCTLCardinality/CTLCardinality-72.sara.
sara: place or transition ordering is non-deterministic
sara: warning, failure of lp_solve (at job 21)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 4 0 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 2 2 0 3 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 9/239 3/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13 608853 m, 73797 m/sec, 2320239 t fired, .
71 EF FNDP 6/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 62988 t fired, 186 attempts, .
72 EF STEQ 4/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 4 0 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 2 2 0 3 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 14/239 5/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13 1083667 m, 94962 m/sec, 4128188 t fired, .
71 EF FNDP 11/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 137548 t fired, 395 attempts, .
72 EF STEQ 9/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
Time elapsed: 20 secs. Pages in use: 5
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 4 0 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 2 2 0 3 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 19/239 7/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13 1472494 m, 77765 m/sec, 5603878 t fired, .
71 EF FNDP 16/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 206302 t fired, 580 attempts, .
72 EF STEQ 14/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 4 0 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 2 2 0 3 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 24/239 9/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13 1945543 m, 94609 m/sec, 7406443 t fired, .
71 EF FNDP 21/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 273080 t fired, 754 attempts, .
72 EF STEQ 19/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 4 0 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 2 2 0 3 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 29/239 11/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13 2426119 m, 96115 m/sec, 9237053 t fired, .
71 EF FNDP 26/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 335009 t fired, 911 attempts, .
72 EF STEQ 24/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 4 0 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 2 2 0 3 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 34/239 13/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13 2886930 m, 92162 m/sec, 10998341 t fired, .
71 EF FNDP 31/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 393357 t fired, 1053 attempts, .
72 EF STEQ 29/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 4 0 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 2 2 0 3 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 39/239 15/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13 3358841 m, 94382 m/sec, 12810983 t fired, .
71 EF FNDP 36/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 448770 t fired, 1184 attempts, .
72 EF STEQ 34/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 4 0 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 2 2 0 3 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 44/239 17/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13 3834473 m, 95126 m/sec, 14630437 t fired, .
71 EF FNDP 41/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 501644 t fired, 1305 attempts, .
72 EF STEQ 39/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 4 0 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 2 2 0 3 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0
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56 CTL EXCL 49/239 19/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13 4268915 m, 86888 m/sec, 16289888 t fired, .
71 EF FNDP 46/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 550129 t fired, 1412 attempts, .
72 EF STEQ 44/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 4 0 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 2 2 0 3 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
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56 CTL EXCL 54/239 21/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13 4711578 m, 88532 m/sec, 17981185 t fired, .
71 EF FNDP 51/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 572990 t fired, 1461 attempts, .
72 EF STEQ 49/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 4 0 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 2 2 0 3 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
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56 CTL EXCL 59/239 22/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13 5038037 m, 65291 m/sec, 19230634 t fired, .
71 EF FNDP 56/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 612330 t fired, 1545 attempts, .
72 EF STEQ 54/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 4 0 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 2 2 0 3 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
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56 CTL EXCL 64/239 23/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13 5331821 m, 58756 m/sec, 20351217 t fired, .
71 EF FNDP 61/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 660399 t fired, 1647 attempts, .
72 EF STEQ 59/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 4 0 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 2 2 0 3 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
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56 CTL EXCL 69/239 25/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13 5743686 m, 82373 m/sec, 21922560 t fired, .
71 EF FNDP 66/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 706006 t fired, 1740 attempts, .
72 EF STEQ 64/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 4 0 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 2 2 0 3 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0
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56 CTL EXCL 74/239 27/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13 6153600 m, 81982 m/sec, 23662774 t fired, .
71 EF FNDP 71/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 729032 t fired, 1788 attempts, .
72 EF STEQ 69/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 4 0 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 2 2 0 3 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
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56 CTL EXCL 79/239 29/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13 6522096 m, 73699 m/sec, 25308242 t fired, .
71 EF FNDP 76/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 751696 t fired, 1835 attempts, .
72 EF STEQ 74/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 4 0 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 2 2 0 3 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
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56 CTL EXCL 84/239 30/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13 6892249 m, 74030 m/sec, 26934628 t fired, .
71 EF FNDP 81/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 795760 t fired, 1926 attempts, .
72 EF STEQ 79/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 4 0 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 2 2 0 3 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0
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56 CTL EXCL 89/239 32/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13 7277421 m, 77034 m/sec, 28626556 t fired, .
71 EF FNDP 86/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 840070 t fired, 2015 attempts, .
72 EF STEQ 84/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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71 EF FNDP 91/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 882401 t fired, 2101 attempts, .
72 EF STEQ 89/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 4/437 1/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 141632 m, 28326 m/sec, 264800 t fired, .
71 EF FNDP 96/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 923109 t fired, 2183 attempts, .
72 EF STEQ 94/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 9/437 2/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 353851 m, 42443 m/sec, 712352 t fired, .
71 EF FNDP 101/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 967116 t fired, 2272 attempts, .
72 EF STEQ 99/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 14/437 3/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 573467 m, 43923 m/sec, 1250732 t fired, .
71 EF FNDP 106/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1010265 t fired, 2356 attempts, .
72 EF STEQ 104/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 19/437 3/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 684358 m, 22178 m/sec, 1521073 t fired, .
71 EF FNDP 111/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1050770 t fired, 2435 attempts, .
72 EF STEQ 109/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 24/437 4/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 795913 m, 22311 m/sec, 1796541 t fired, .
71 EF FNDP 116/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1092286 t fired, 2517 attempts, .
72 EF STEQ 114/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 29/437 4/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 890812 m, 18979 m/sec, 2032085 t fired, .
71 EF FNDP 121/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1132627 t fired, 2595 attempts, .
72 EF STEQ 119/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 34/437 5/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 1022350 m, 26307 m/sec, 2367491 t fired, .
71 EF FNDP 126/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1174324 t fired, 2676 attempts, .
72 EF STEQ 124/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 39/437 5/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 1134659 m, 22461 m/sec, 2643710 t fired, .
71 EF FNDP 131/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1216175 t fired, 2756 attempts, .
72 EF STEQ 129/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
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19 CTL EXCL 44/437 6/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 1239871 m, 21042 m/sec, 2910685 t fired, .
71 EF FNDP 136/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1259434 t fired, 2839 attempts, .
72 EF STEQ 134/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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19 CTL EXCL 49/437 6/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 1358101 m, 23646 m/sec, 3212062 t fired, .
71 EF FNDP 141/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1298070 t fired, 2913 attempts, .
72 EF STEQ 139/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 54/437 7/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 1462604 m, 20900 m/sec, 3479689 t fired, .
71 EF FNDP 146/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1319558 t fired, 2953 attempts, .
72 EF STEQ 144/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 59/437 7/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 1569162 m, 21311 m/sec, 3753330 t fired, .
71 EF FNDP 151/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1340130 t fired, 2992 attempts, .
72 EF STEQ 149/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 64/437 8/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 1674774 m, 21122 m/sec, 4010276 t fired, .
71 EF FNDP 156/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1359716 t fired, 3030 attempts, .
72 EF STEQ 154/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 69/437 8/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 1775445 m, 20134 m/sec, 4270519 t fired, .
71 EF FNDP 161/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1379603 t fired, 3067 attempts, .
72 EF STEQ 159/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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19 CTL EXCL 74/437 8/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 1878615 m, 20634 m/sec, 4537163 t fired, .
71 EF FNDP 166/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1400217 t fired, 3105 attempts, .
72 EF STEQ 164/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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19 CTL EXCL 79/437 9/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 1976895 m, 19656 m/sec, 4791677 t fired, .
71 EF FNDP 171/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1421172 t fired, 3145 attempts, .
72 EF STEQ 169/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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19 CTL EXCL 84/437 9/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 2074240 m, 19469 m/sec, 5044927 t fired, .
71 EF FNDP 176/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1441492 t fired, 3183 attempts, .
72 EF STEQ 174/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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19 CTL EXCL 89/437 10/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 2172533 m, 19658 m/sec, 5301083 t fired, .
71 EF FNDP 181/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1462239 t fired, 3221 attempts, .
72 EF STEQ 179/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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19 CTL EXCL 94/437 10/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 2282626 m, 22018 m/sec, 5584988 t fired, .
71 EF FNDP 186/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1482762 t fired, 3260 attempts, .
72 EF STEQ 184/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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19 CTL EXCL 99/437 11/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 2396324 m, 22739 m/sec, 5859056 t fired, .
71 EF FNDP 191/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1503274 t fired, 3298 attempts, .
72 EF STEQ 189/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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19 CTL EXCL 105/437 11/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 2500600 m, 20855 m/sec, 6132500 t fired, .
71 EF FNDP 197/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1524048 t fired, 3336 attempts, .
72 EF STEQ 195/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 110/437 12/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 2606571 m, 21194 m/sec, 6409401 t fired, .
71 EF FNDP 202/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1544782 t fired, 3375 attempts, .
72 EF STEQ 200/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 115/437 12/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 2712757 m, 21237 m/sec, 6686747 t fired, .
71 EF FNDP 207/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1565720 t fired, 3414 attempts, .
72 EF STEQ 205/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 120/437 12/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 2815398 m, 20528 m/sec, 6957723 t fired, .
71 EF FNDP 212/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1586538 t fired, 3452 attempts, .
72 EF STEQ 210/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 125/437 13/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 2917977 m, 20515 m/sec, 7227290 t fired, .
71 EF FNDP 217/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1607360 t fired, 3491 attempts, .
72 EF STEQ 215/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 130/437 13/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 3026734 m, 21751 m/sec, 7510314 t fired, .
71 EF FNDP 222/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1627890 t fired, 3529 attempts, .
72 EF STEQ 220/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 135/437 14/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 3142647 m, 23182 m/sec, 7794441 t fired, .
71 EF FNDP 227/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1648944 t fired, 3568 attempts, .
72 EF STEQ 225/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 140/437 14/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 3244655 m, 20401 m/sec, 8051922 t fired, .
71 EF FNDP 232/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1667877 t fired, 3603 attempts, .
72 EF STEQ 230/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 145/437 15/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 3345046 m, 20078 m/sec, 8317881 t fired, .
71 EF FNDP 237/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1687399 t fired, 3639 attempts, .
72 EF STEQ 235/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
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19 CTL EXCL 150/437 16/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 3541604 m, 39311 m/sec, 8834426 t fired, .
71 EF FNDP 242/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1725508 t fired, 3710 attempts, .
72 EF STEQ 240/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
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19 CTL EXCL 155/437 16/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 3683419 m, 28363 m/sec, 9211854 t fired, .
71 EF FNDP 247/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1754258 t fired, 3762 attempts, .
72 EF STEQ 245/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
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19 CTL EXCL 160/437 17/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 3806203 m, 24556 m/sec, 9536953 t fired, .
71 EF FNDP 252/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1781345 t fired, 3812 attempts, .
72 EF STEQ 250/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 165/437 17/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 3913854 m, 21530 m/sec, 9818900 t fired, .
71 EF FNDP 257/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1801991 t fired, 3850 attempts, .
72 EF STEQ 255/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 170/437 18/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 4018487 m, 20926 m/sec, 10084548 t fired, .
71 EF FNDP 262/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1820933 t fired, 3885 attempts, .
72 EF STEQ 260/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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19 CTL EXCL 175/437 18/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 4122936 m, 20889 m/sec, 10330854 t fired, .
71 EF FNDP 267/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1839520 t fired, 3920 attempts, .
72 EF STEQ 265/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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19 CTL EXCL 180/437 19/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 4294644 m, 34341 m/sec, 10787351 t fired, .
71 EF FNDP 272/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1876087 t fired, 3987 attempts, .
72 EF STEQ 270/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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19 CTL EXCL 185/437 19/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 4415808 m, 24232 m/sec, 11106741 t fired, .
71 EF FNDP 277/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1917770 t fired, 4063 attempts, .
72 EF STEQ 275/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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19 CTL EXCL 190/437 20/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 4534179 m, 23674 m/sec, 11421814 t fired, .
71 EF FNDP 282/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1959339 t fired, 4140 attempts, .
72 EF STEQ 280/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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19 CTL EXCL 195/437 21/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 4730332 m, 39230 m/sec, 11946086 t fired, .
71 EF FNDP 287/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2001418 t fired, 4218 attempts, .
72 EF STEQ 285/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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19 CTL EXCL 200/437 21/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 4877471 m, 29427 m/sec, 12338926 t fired, .
71 EF FNDP 292/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2043228 t fired, 4295 attempts, .
72 EF STEQ 290/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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19 CTL EXCL 205/437 22/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 5028491 m, 30204 m/sec, 12728101 t fired, .
71 EF FNDP 297/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2084741 t fired, 4372 attempts, .
72 EF STEQ 295/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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19 CTL EXCL 210/437 23/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 5230635 m, 40428 m/sec, 13223944 t fired, .
71 EF FNDP 302/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2121844 t fired, 4440 attempts, .
72 EF STEQ 300/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 215/437 23/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 5402679 m, 34408 m/sec, 13681983 t fired, .
71 EF FNDP 307/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2151940 t fired, 4495 attempts, .
72 EF STEQ 305/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 220/437 24/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 5616486 m, 42761 m/sec, 14252903 t fired, .
71 EF FNDP 312/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2172690 t fired, 4533 attempts, .
72 EF STEQ 310/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 225/437 25/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 5827779 m, 42258 m/sec, 14819402 t fired, .
71 EF FNDP 317/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2193268 t fired, 4571 attempts, .
72 EF STEQ 315/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 230/437 26/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 6036348 m, 41713 m/sec, 15377970 t fired, .
71 EF FNDP 322/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2214038 t fired, 4609 attempts, .
72 EF STEQ 320/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 235/437 27/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 6264595 m, 45649 m/sec, 15930266 t fired, .
71 EF FNDP 327/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2234640 t fired, 4647 attempts, .
72 EF STEQ 325/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 240/437 28/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 6463985 m, 39878 m/sec, 16456852 t fired, .
71 EF FNDP 332/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2253385 t fired, 4682 attempts, .
72 EF STEQ 330/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 245/437 29/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 6669962 m, 41195 m/sec, 17005911 t fired, .
71 EF FNDP 337/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2272885 t fired, 4717 attempts, .
72 EF STEQ 335/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 250/437 30/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 6868914 m, 39790 m/sec, 17539628 t fired, .
71 EF FNDP 342/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2292255 t fired, 4753 attempts, .
72 EF STEQ 340/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
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19 CTL EXCL 255/437 30/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 7070072 m, 40231 m/sec, 18081086 t fired, .
71 EF FNDP 347/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2311881 t fired, 4789 attempts, .
72 EF STEQ 345/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
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19 CTL EXCL 260/437 31/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 7276486 m, 41282 m/sec, 18636461 t fired, .
71 EF FNDP 352/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2332385 t fired, 4827 attempts, .
72 EF STEQ 350/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 265/437 32/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 7495371 m, 43777 m/sec, 19171611 t fired, .
71 EF FNDP 357/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2352520 t fired, 4865 attempts, .
72 EF STEQ 355/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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lola: CANCELED task # 19 (type EXCL) for BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 1 2 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 362/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2386029 t fired, 4926 attempts, .
72 EF STEQ 360/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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lola: LAUNCH task # 1 (type EXCL) for 0 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00
lola: time limit : 461 sec
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lola: FINISHED task # 1 (type EXCL) for BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00
lola: result : true
lola: markings : 1742
lola: fired transitions : 4749
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 73 (type EXCL) for 48 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12
lola: time limit : 538 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 367/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2424160 t fired, 4997 attempts, .
72 EF STEQ 365/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 5/538 1/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 39578 m, 7915 m/sec, 93192 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 372/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2461624 t fired, 5065 attempts, .
72 EF STEQ 370/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 10/538 1/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 52736 m, 2631 m/sec, 125529 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 377/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2501927 t fired, 5139 attempts, .
72 EF STEQ 375/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 15/538 1/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 72916 m, 4036 m/sec, 163653 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 382/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2541800 t fired, 5212 attempts, .
72 EF STEQ 380/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 20/538 1/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 87361 m, 2889 m/sec, 199456 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 387/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2580676 t fired, 5284 attempts, .
72 EF STEQ 385/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 25/538 1/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 109247 m, 4377 m/sec, 256495 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 392/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2621552 t fired, 5359 attempts, .
72 EF STEQ 390/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 30/538 1/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 136491 m, 5448 m/sec, 323428 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 397/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2641182 t fired, 5395 attempts, .
72 EF STEQ 395/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 35/538 1/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 150355 m, 2772 m/sec, 357050 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 402/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2662405 t fired, 5434 attempts, .
72 EF STEQ 400/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 40/538 1/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 164696 m, 2868 m/sec, 391436 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 407/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2684613 t fired, 5474 attempts, .
72 EF STEQ 405/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 45/538 2/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 181629 m, 3386 m/sec, 436061 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 412/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2704148 t fired, 5510 attempts, .
72 EF STEQ 410/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 50/538 2/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 195604 m, 2795 m/sec, 469971 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 417/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2723017 t fired, 5545 attempts, .
72 EF STEQ 415/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 55/538 2/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 208912 m, 2661 m/sec, 501690 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 422/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2742237 t fired, 5580 attempts, .
72 EF STEQ 420/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 60/538 2/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 222958 m, 2809 m/sec, 537307 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 427/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2761546 t fired, 5616 attempts, .
72 EF STEQ 425/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 65/538 2/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 236888 m, 2786 m/sec, 572430 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 432/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2781519 t fired, 5653 attempts, .
72 EF STEQ 430/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 70/538 2/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 250388 m, 2700 m/sec, 604187 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 437/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2801128 t fired, 5689 attempts, .
72 EF STEQ 435/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 75/538 2/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 264952 m, 2912 m/sec, 641947 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 442/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2820482 t fired, 5724 attempts, .
72 EF STEQ 440/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 80/538 2/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 285077 m, 4025 m/sec, 688718 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 447/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2840551 t fired, 5761 attempts, .
72 EF STEQ 445/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 85/538 2/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 308195 m, 4623 m/sec, 745616 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 452/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2859030 t fired, 5795 attempts, .
72 EF STEQ 450/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 90/538 2/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 328779 m, 4116 m/sec, 809164 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 457/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2877680 t fired, 5830 attempts, .
72 EF STEQ 455/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 95/538 2/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 356329 m, 5510 m/sec, 886011 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 462/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2896656 t fired, 5864 attempts, .
72 EF STEQ 460/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 100/538 3/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 402847 m, 9303 m/sec, 1005669 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 467/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2915317 t fired, 5898 attempts, .
72 EF STEQ 465/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 105/538 3/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 428501 m, 5130 m/sec, 1072370 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 472/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2934626 t fired, 5933 attempts, .
72 EF STEQ 470/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 110/538 3/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 454394 m, 5178 m/sec, 1140484 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 477/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2953964 t fired, 5969 attempts, .
72 EF STEQ 475/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 115/538 3/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 481759 m, 5473 m/sec, 1214492 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 482/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2973093 t fired, 6004 attempts, .
72 EF STEQ 480/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 120/538 3/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 507116 m, 5071 m/sec, 1280007 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 487/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2990593 t fired, 6036 attempts, .
72 EF STEQ 485/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 125/538 3/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 530972 m, 4771 m/sec, 1342539 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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71 EF FNDP 492/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3009879 t fired, 6071 attempts, .
72 EF STEQ 490/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 130/538 3/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 557938 m, 5393 m/sec, 1414491 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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71 EF FNDP 497/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3029270 t fired, 6107 attempts, .
72 EF STEQ 495/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 135/538 3/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 584243 m, 5261 m/sec, 1483406 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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71 EF FNDP 502/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3047142 t fired, 6139 attempts, .
72 EF STEQ 500/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 140/538 4/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 608787 m, 4908 m/sec, 1548717 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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71 EF FNDP 507/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3066464 t fired, 6175 attempts, .
72 EF STEQ 505/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 145/538 4/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 635960 m, 5434 m/sec, 1621028 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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71 EF FNDP 512/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3085283 t fired, 6209 attempts, .
72 EF STEQ 510/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 150/538 4/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 660811 m, 4970 m/sec, 1684811 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 517/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3104220 t fired, 6244 attempts, .
72 EF STEQ 515/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 155/538 4/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 686469 m, 5131 m/sec, 1752570 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 522/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3122767 t fired, 6278 attempts, .
72 EF STEQ 520/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 160/538 4/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 720274 m, 6761 m/sec, 1840349 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 527/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3141967 t fired, 6314 attempts, .
72 EF STEQ 525/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 165/538 4/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 770817 m, 10108 m/sec, 1974003 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 532/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3160090 t fired, 6347 attempts, .
72 EF STEQ 530/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 170/538 4/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 817337 m, 9304 m/sec, 2119248 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 537/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3179116 t fired, 6382 attempts, .
72 EF STEQ 535/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 175/538 5/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 841570 m, 4846 m/sec, 2184133 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 542/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3198524 t fired, 6418 attempts, .
72 EF STEQ 540/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 180/538 5/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 898681 m, 11422 m/sec, 2335338 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 547/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3218802 t fired, 6455 attempts, .
72 EF STEQ 545/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 185/538 5/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 939068 m, 8077 m/sec, 2462360 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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71 EF FNDP 552/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3239434 t fired, 6493 attempts, .
72 EF STEQ 550/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 190/538 5/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 966399 m, 5466 m/sec, 2536400 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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71 EF FNDP 557/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3258372 t fired, 6528 attempts, .
72 EF STEQ 555/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 195/538 5/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 991404 m, 5001 m/sec, 2603736 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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71 EF FNDP 562/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3277886 t fired, 6564 attempts, .
72 EF STEQ 560/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 200/538 5/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1017278 m, 5174 m/sec, 2673813 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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71 EF FNDP 567/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3297819 t fired, 6601 attempts, .
72 EF STEQ 565/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 205/538 5/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1043521 m, 5248 m/sec, 2745164 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 572/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3318842 t fired, 6640 attempts, .
72 EF STEQ 570/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 210/538 5/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1070684 m, 5432 m/sec, 2819350 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 577/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3339690 t fired, 6678 attempts, .
72 EF STEQ 575/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 215/538 6/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1097654 m, 5394 m/sec, 2893210 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 582/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3360751 t fired, 6717 attempts, .
72 EF STEQ 580/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 220/538 6/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1125278 m, 5524 m/sec, 2966993 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 587/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3381630 t fired, 6756 attempts, .
72 EF STEQ 585/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 225/538 6/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1152472 m, 5438 m/sec, 3040694 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 592/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3402772 t fired, 6795 attempts, .
72 EF STEQ 590/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 230/538 6/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1180707 m, 5647 m/sec, 3118535 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 597/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3423466 t fired, 6832 attempts, .
72 EF STEQ 595/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 235/538 6/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1208061 m, 5470 m/sec, 3192058 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 602/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3444217 t fired, 6871 attempts, .
72 EF STEQ 600/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 240/538 6/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1235232 m, 5434 m/sec, 3265456 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 607/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3465353 t fired, 6910 attempts, .
72 EF STEQ 605/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 245/538 6/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1263150 m, 5583 m/sec, 3342049 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 612/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3485892 t fired, 6947 attempts, .
72 EF STEQ 610/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 250/538 6/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1290163 m, 5402 m/sec, 3415299 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 617/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3506739 t fired, 6986 attempts, .
72 EF STEQ 615/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 255/538 6/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1317850 m, 5537 m/sec, 3489973 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 622/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3527160 t fired, 7023 attempts, .
72 EF STEQ 620/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 260/538 7/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1356524 m, 7734 m/sec, 3593411 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 627/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3547659 t fired, 7060 attempts, .
72 EF STEQ 625/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 265/538 7/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1413728 m, 11440 m/sec, 3760496 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 632/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3568334 t fired, 7098 attempts, .
72 EF STEQ 630/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 270/538 7/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1471786 m, 11611 m/sec, 3927321 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 637/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3588982 t fired, 7136 attempts, .
72 EF STEQ 635/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 275/538 7/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1523074 m, 10257 m/sec, 4087021 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 642/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3609622 t fired, 7174 attempts, .
72 EF STEQ 640/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 280/538 7/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1549495 m, 5284 m/sec, 4160691 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 647/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3630189 t fired, 7211 attempts, .
72 EF STEQ 645/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 285/538 8/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1614084 m, 12917 m/sec, 4325364 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 652/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3650543 t fired, 7249 attempts, .
72 EF STEQ 650/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 290/538 8/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1671891 m, 11561 m/sec, 4525975 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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71 EF FNDP 657/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3671116 t fired, 7286 attempts, .
72 EF STEQ 655/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 295/538 8/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1710821 m, 7786 m/sec, 4646254 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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71 EF FNDP 662/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3691587 t fired, 7324 attempts, .
72 EF STEQ 660/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 300/538 8/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1738599 m, 5555 m/sec, 4721678 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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71 EF FNDP 667/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3712268 t fired, 7362 attempts, .
72 EF STEQ 665/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 305/538 8/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1764455 m, 5171 m/sec, 4793828 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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71 EF FNDP 672/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3732904 t fired, 7399 attempts, .
72 EF STEQ 670/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 310/538 8/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1791417 m, 5392 m/sec, 4868095 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 677/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3752335 t fired, 7435 attempts, .
72 EF STEQ 675/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 315/538 9/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1817045 m, 5125 m/sec, 4938801 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 682/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3771000 t fired, 7469 attempts, .
72 EF STEQ 680/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 320/538 9/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1841665 m, 4924 m/sec, 5007273 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 687/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3790911 t fired, 7506 attempts, .
72 EF STEQ 685/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 325/538 9/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1867902 m, 5247 m/sec, 5081003 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 692/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3811715 t fired, 7545 attempts, .
72 EF STEQ 690/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 330/538 9/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1893760 m, 5171 m/sec, 5151469 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 697/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3832474 t fired, 7583 attempts, .
72 EF STEQ 695/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 335/538 9/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1920329 m, 5313 m/sec, 5224629 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 702/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3853170 t fired, 7621 attempts, .
72 EF STEQ 700/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 340/538 9/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1947629 m, 5460 m/sec, 5300174 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 707/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3874337 t fired, 7660 attempts, .
72 EF STEQ 705/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 345/538 9/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1974518 m, 5377 m/sec, 5374741 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 712/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3894874 t fired, 7698 attempts, .
72 EF STEQ 710/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 350/538 9/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2001661 m, 5428 m/sec, 5449557 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 717/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3915688 t fired, 7736 attempts, .
72 EF STEQ 715/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 355/538 9/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2028748 m, 5417 m/sec, 5524303 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 722/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3936528 t fired, 7774 attempts, .
72 EF STEQ 720/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 360/538 9/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2055774 m, 5405 m/sec, 5598982 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 727/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3957306 t fired, 7813 attempts, .
72 EF STEQ 725/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 365/538 10/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2082652 m, 5375 m/sec, 5673469 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 732/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3976066 t fired, 7847 attempts, .
72 EF STEQ 730/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 370/538 10/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2107282 m, 4926 m/sec, 5741354 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 737/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3995970 t fired, 7883 attempts, .
72 EF STEQ 735/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 375/538 10/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2133156 m, 5174 m/sec, 5812499 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 742/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4016751 t fired, 7922 attempts, .
72 EF STEQ 740/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 380/538 10/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2160123 m, 5393 m/sec, 5887124 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 747/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4037953 t fired, 7961 attempts, .
72 EF STEQ 745/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 385/538 10/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2187728 m, 5521 m/sec, 5962772 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 752/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4058926 t fired, 8000 attempts, .
72 EF STEQ 750/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 390/538 10/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2224887 m, 7431 m/sec, 6068239 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 757/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4080072 t fired, 8039 attempts, .
72 EF STEQ 755/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 395/538 10/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2289951 m, 13012 m/sec, 6253734 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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71 EF FNDP 762/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4100599 t fired, 8076 attempts, .
72 EF STEQ 760/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 400/538 11/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2343839 m, 10777 m/sec, 6426364 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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71 EF FNDP 767/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4121276 t fired, 8114 attempts, .
72 EF STEQ 765/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 405/538 11/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2408671 m, 12966 m/sec, 6621696 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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71 EF FNDP 772/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4142148 t fired, 8153 attempts, .
72 EF STEQ 770/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 410/538 11/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2465355 m, 11336 m/sec, 6799687 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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71 EF FNDP 777/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4162812 t fired, 8190 attempts, .
72 EF STEQ 775/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 415/538 11/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2500559 m, 7040 m/sec, 6904062 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 782/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4183868 t fired, 8229 attempts, .
72 EF STEQ 780/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 420/538 12/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2537144 m, 7317 m/sec, 7002227 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 787/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4204892 t fired, 8268 attempts, .
72 EF STEQ 785/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 425/538 12/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2606800 m, 13931 m/sec, 7187882 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 792/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4225675 t fired, 8307 attempts, .
72 EF STEQ 790/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 430/538 12/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2667197 m, 12079 m/sec, 7403711 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 797/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4246144 t fired, 8344 attempts, .
72 EF STEQ 795/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 435/538 12/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2725812 m, 11723 m/sec, 7605449 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 802/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4265576 t fired, 8380 attempts, .
72 EF STEQ 800/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 440/538 12/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2761651 m, 7167 m/sec, 7714815 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 807/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4284475 t fired, 8415 attempts, .
72 EF STEQ 805/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 445/538 13/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2785281 m, 4726 m/sec, 7780404 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 812/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4303891 t fired, 8450 attempts, .
72 EF STEQ 810/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 450/538 13/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2811290 m, 5201 m/sec, 7852639 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 817/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4322543 t fired, 8484 attempts, .
72 EF STEQ 815/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 455/538 13/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2836226 m, 4987 m/sec, 7923218 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 822/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4341704 t fired, 8520 attempts, .
72 EF STEQ 820/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 460/538 13/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2859039 m, 4562 m/sec, 7987520 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 827/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4361130 t fired, 8556 attempts, .
72 EF STEQ 825/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 465/538 13/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2884270 m, 5046 m/sec, 8057942 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 832/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4380896 t fired, 8592 attempts, .
72 EF STEQ 830/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 470/538 13/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2909353 m, 5016 m/sec, 8128077 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 837/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4399896 t fired, 8627 attempts, .
72 EF STEQ 835/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 475/538 13/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2933748 m, 4879 m/sec, 8195882 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 842/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4419810 t fired, 8664 attempts, .
72 EF STEQ 840/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 480/538 13/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2959475 m, 5145 m/sec, 8268024 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 847/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4439778 t fired, 8701 attempts, .
72 EF STEQ 845/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 485/538 13/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 2984663 m, 5037 m/sec, 8338764 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 852/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4460880 t fired, 8740 attempts, .
72 EF STEQ 850/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 490/538 13/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3010721 m, 5211 m/sec, 8411700 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 857/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4482019 t fired, 8779 attempts, .
72 EF STEQ 855/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 495/538 13/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3038228 m, 5501 m/sec, 8489003 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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71 EF FNDP 862/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4503171 t fired, 8818 attempts, .
72 EF STEQ 860/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 500/538 14/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3065091 m, 5372 m/sec, 8563000 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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71 EF FNDP 867/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4524295 t fired, 8857 attempts, .
72 EF STEQ 865/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 505/538 14/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3092034 m, 5388 m/sec, 8639373 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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71 EF FNDP 872/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4545067 t fired, 8895 attempts, .
72 EF STEQ 870/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 510/538 14/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3117752 m, 5143 m/sec, 8710313 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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71 EF FNDP 877/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4565361 t fired, 8932 attempts, .
72 EF STEQ 875/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 515/538 14/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3143979 m, 5245 m/sec, 8783607 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
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71 EF FNDP 882/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4584774 t fired, 8968 attempts, .
72 EF STEQ 880/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 520/538 14/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3168696 m, 4943 m/sec, 8853388 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 887/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4604361 t fired, 9004 attempts, .
72 EF STEQ 885/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 525/538 14/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3194674 m, 5195 m/sec, 8925003 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 892/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4624945 t fired, 9042 attempts, .
72 EF STEQ 890/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 530/538 14/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3221681 m, 5401 m/sec, 9000575 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 897/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4645777 t fired, 9080 attempts, .
72 EF STEQ 895/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 535/538 14/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 3248147 m, 5293 m/sec, 9075368 t fired, .
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lola: CANCELED task # 73 (type EXCL) for BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 1 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 902/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4666452 t fired, 9118 attempts, .
72 EF STEQ 900/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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lola: LAUNCH task # 65 (type EXCL) for 39 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09
lola: time limit : 537 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 73 (type EXCL) for 48 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12
lola: time limit : 2689 sec
lola: memory limit: 5 pages
lola: FINISHED task # 65 (type EXCL) for BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09
lola: result : true
lola: markings : 679
lola: fired transitions : 678
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 907/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4708272 t fired, 9195 attempts, .
72 EF STEQ 905/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 5/537 1/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 22378 m, -645153 m/sec, 40180 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 912/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4749709 t fired, 9271 attempts, .
72 EF STEQ 910/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 10/537 1/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 64426 m, 8409 m/sec, 147046 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 917/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4782698 t fired, 9331 attempts, .
72 EF STEQ 915/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 15/537 1/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 86297 m, 4374 m/sec, 197291 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 922/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4822669 t fired, 9405 attempts, .
72 EF STEQ 920/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 20/537 1/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 114627 m, 5666 m/sec, 267196 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 927/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4863268 t fired, 9479 attempts, .
72 EF STEQ 925/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 25/537 1/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 145099 m, 6094 m/sec, 345246 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 932/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4904731 t fired, 9556 attempts, .
72 EF STEQ 930/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 30/537 1/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 174571 m, 5894 m/sec, 416962 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 937/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4945803 t fired, 9631 attempts, .
72 EF STEQ 935/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 35/537 2/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 205078 m, 6101 m/sec, 494129 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 942/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 4987345 t fired, 9708 attempts, .
72 EF STEQ 940/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 40/537 2/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 234630 m, 5910 m/sec, 567031 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 947/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5028047 t fired, 9782 attempts, .
72 EF STEQ 945/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 45/537 2/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 264580 m, 5990 m/sec, 641207 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 952/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5068817 t fired, 9858 attempts, .
72 EF STEQ 950/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 50/537 2/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 308138 m, 8711 m/sec, 745444 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 957/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5099676 t fired, 9915 attempts, .
72 EF STEQ 955/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 55/537 2/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 341618 m, 6696 m/sec, 846743 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 962/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5140397 t fired, 9989 attempts, .
72 EF STEQ 960/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 60/537 3/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 385501 m, 8776 m/sec, 953377 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 967/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5163916 t fired, 10033 attempts, .
72 EF STEQ 965/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 65/537 3/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 406582 m, 4216 m/sec, 1015046 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
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71 EF FNDP 972/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5193622 t fired, 10088 attempts, .
72 EF STEQ 970/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 70/537 3/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 424948 m, 3673 m/sec, 1064296 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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71 EF FNDP 977/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5233294 t fired, 10160 attempts, .
72 EF STEQ 975/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 75/537 3/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 452600 m, 5530 m/sec, 1135733 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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71 EF FNDP 982/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5274401 t fired, 10236 attempts, .
72 EF STEQ 980/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 80/537 3/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 481876 m, 5855 m/sec, 1214725 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
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71 EF FNDP 987/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5315186 t fired, 10311 attempts, .
72 EF STEQ 985/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 85/537 3/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 509065 m, 5437 m/sec, 1285307 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 992/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5356717 t fired, 10388 attempts, .
72 EF STEQ 990/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 90/537 3/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 538155 m, 5818 m/sec, 1362786 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 997/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5397638 t fired, 10463 attempts, .
72 EF STEQ 995/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 95/537 3/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 565184 m, 5405 m/sec, 1432795 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1002/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5439127 t fired, 10539 attempts, .
72 EF STEQ 1000/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 100/537 3/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 594028 m, 5768 m/sec, 1509639 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1007/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5480568 t fired, 10615 attempts, .
72 EF STEQ 1005/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 105/537 4/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 622383 m, 5671 m/sec, 1584146 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1012/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5521720 t fired, 10690 attempts, .
72 EF STEQ 1010/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 110/537 4/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 650931 m, 5709 m/sec, 1660322 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1017/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5563190 t fired, 10767 attempts, .
72 EF STEQ 1015/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 115/537 4/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 679013 m, 5616 m/sec, 1734289 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1022/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5604948 t fired, 10844 attempts, .
72 EF STEQ 1020/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 120/537 4/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 707453 m, 5688 m/sec, 1809711 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1027/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5646423 t fired, 10921 attempts, .
72 EF STEQ 1025/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 125/537 4/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 765864 m, 11682 m/sec, 1959102 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1032/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5687843 t fired, 10997 attempts, .
72 EF STEQ 1030/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 130/537 4/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 818239 m, 10475 m/sec, 2121045 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1037/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5718122 t fired, 11053 attempts, .
72 EF STEQ 1035/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 135/537 4/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 836761 m, 3704 m/sec, 2170530 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1042/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5749959 t fired, 11112 attempts, .
72 EF STEQ 1040/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 140/537 5/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 864807 m, 5609 m/sec, 2238043 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1047/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5790030 t fired, 11185 attempts, .
72 EF STEQ 1045/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 145/537 5/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 909457 m, 8930 m/sec, 2371610 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1052/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5830212 t fired, 11258 attempts, .
72 EF STEQ 1050/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 150/537 5/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 944860 m, 7080 m/sec, 2477029 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1057/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5872672 t fired, 11336 attempts, .
72 EF STEQ 1055/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 155/537 5/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 972032 m, 5434 m/sec, 2550738 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1062/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5914829 t fired, 11414 attempts, .
72 EF STEQ 1060/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 160/537 5/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 999170 m, 5427 m/sec, 2624462 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1067/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5956627 t fired, 11490 attempts, .
72 EF STEQ 1065/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 165/537 5/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1026194 m, 5404 m/sec, 2698031 t fired, .
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 3 0 4 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1072/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 5998372 t fired, 11566 attempts, .
72 EF STEQ 1070/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
73 EF EXCL 170/537 5/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 1053172 m, 5395 m/sec, 2771564 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1077/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6040637 t fired, 11644 attempts, .
72 EF STEQ 1075/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 LTL EXCL 5/628 2/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 242274 m, 48454 m/sec, 440271 t fired, .
71 EF FNDP 1082/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6082923 t fired, 11722 attempts, .
72 EF STEQ 1080/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
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64 LTL EXCL 10/628 4/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 515209 m, 54587 m/sec, 918933 t fired, .
71 EF FNDP 1087/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6123413 t fired, 11797 attempts, .
72 EF STEQ 1085/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 LTL EXCL 15/628 5/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 725114 m, 41981 m/sec, 1291123 t fired, .
71 EF FNDP 1092/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6163060 t fired, 11870 attempts, .
72 EF STEQ 1090/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 LTL EXCL 20/628 6/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 871516 m, 29280 m/sec, 1646054 t fired, .
71 EF FNDP 1097/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6202249 t fired, 11943 attempts, .
72 EF STEQ 1095/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 LTL EXCL 25/628 7/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 1024141 m, 30525 m/sec, 2021328 t fired, .
71 EF FNDP 1102/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6244571 t fired, 12021 attempts, .
72 EF STEQ 1100/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 LTL EXCL 30/628 8/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 1186288 m, 32429 m/sec, 2424361 t fired, .
71 EF FNDP 1107/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6287294 t fired, 12100 attempts, .
72 EF STEQ 1105/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 LTL EXCL 35/628 9/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 1325332 m, 27808 m/sec, 2779276 t fired, .
71 EF FNDP 1112/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6329536 t fired, 12177 attempts, .
72 EF STEQ 1110/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 LTL EXCL 40/628 11/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 1537461 m, 42425 m/sec, 3317751 t fired, .
71 EF FNDP 1117/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6371680 t fired, 12255 attempts, .
72 EF STEQ 1115/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 LTL EXCL 45/628 11/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 1673648 m, 27237 m/sec, 3647538 t fired, .
71 EF FNDP 1122/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6414131 t fired, 12334 attempts, .
72 EF STEQ 1120/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 LTL EXCL 50/628 13/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 1848440 m, 34958 m/sec, 4100096 t fired, .
71 EF FNDP 1127/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6456583 t fired, 12412 attempts, .
72 EF STEQ 1125/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
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64 LTL EXCL 55/628 14/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 2022213 m, 34754 m/sec, 4547834 t fired, .
71 EF FNDP 1132/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6498799 t fired, 12490 attempts, .
72 EF STEQ 1130/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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64 LTL EXCL 60/628 15/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 2231180 m, 41793 m/sec, 5074323 t fired, .
71 EF FNDP 1137/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6540613 t fired, 12567 attempts, .
72 EF STEQ 1135/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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64 LTL EXCL 65/628 16/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 2445109 m, 42785 m/sec, 5618372 t fired, .
71 EF FNDP 1142/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6582430 t fired, 12643 attempts, .
72 EF STEQ 1140/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
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64 LTL EXCL 70/628 17/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 2593649 m, 29708 m/sec, 5978813 t fired, .
71 EF FNDP 1147/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6624935 t fired, 12722 attempts, .
72 EF STEQ 1145/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 LTL EXCL 75/628 19/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 2762713 m, 33812 m/sec, 6428360 t fired, .
71 EF FNDP 1152/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6667378 t fired, 12800 attempts, .
72 EF STEQ 1150/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 LTL EXCL 80/628 19/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 2854817 m, 18420 m/sec, 6672700 t fired, .
71 EF FNDP 1157/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6709920 t fired, 12879 attempts, .
72 EF STEQ 1155/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 LTL EXCL 85/628 20/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 3020026 m, 33041 m/sec, 7109759 t fired, .
71 EF FNDP 1162/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6751729 t fired, 12956 attempts, .
72 EF STEQ 1160/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 LTL EXCL 90/628 21/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 3209409 m, 37876 m/sec, 7593384 t fired, .
71 EF FNDP 1167/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6794001 t fired, 13034 attempts, .
72 EF STEQ 1165/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 LTL EXCL 95/628 23/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 3432215 m, 44561 m/sec, 8160010 t fired, .
71 EF FNDP 1172/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6836444 t fired, 13112 attempts, .
72 EF STEQ 1170/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 LTL EXCL 100/628 24/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 3628944 m, 39345 m/sec, 8652785 t fired, .
71 EF FNDP 1177/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6878794 t fired, 13190 attempts, .
72 EF STEQ 1175/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 LTL EXCL 105/628 25/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 3774834 m, 29178 m/sec, 9017173 t fired, .
71 EF FNDP 1182/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6921128 t fired, 13268 attempts, .
72 EF STEQ 1180/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
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64 LTL EXCL 110/628 26/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 3955121 m, 36057 m/sec, 9507020 t fired, .
71 EF FNDP 1187/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 6963439 t fired, 13346 attempts, .
72 EF STEQ 1185/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
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64 LTL EXCL 115/628 27/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 4124922 m, 33960 m/sec, 9964311 t fired, .
71 EF FNDP 1192/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7005720 t fired, 13424 attempts, .
72 EF STEQ 1190/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
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64 LTL EXCL 120/628 29/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 4290455 m, 33106 m/sec, 10409416 t fired, .
71 EF FNDP 1197/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7047700 t fired, 13501 attempts, .
72 EF STEQ 1195/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 LTL EXCL 125/628 30/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 4486340 m, 39177 m/sec, 10908646 t fired, .
71 EF FNDP 1202/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7090057 t fired, 13579 attempts, .
72 EF STEQ 1200/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 LTL EXCL 130/628 31/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10 4712833 m, 45298 m/sec, 11486464 t fired, .
71 EF FNDP 1207/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7131650 t fired, 13655 attempts, .
72 EF STEQ 1205/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ 0 1 0 0 6 0 0 1
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1212/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7173345 t fired, 13732 attempts, .
72 EF STEQ 1210/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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lola: fired transitions : 678
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/2379 3/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02 554566 m, 110913 m/sec, 1566269 t fired, .
71 EF FNDP 1217/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7215166 t fired, 13809 attempts, .
72 EF STEQ 1215/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 10/2379 5/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02 1113807 m, 111848 m/sec, 3146894 t fired, .
71 EF FNDP 1222/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7257216 t fired, 13887 attempts, .
72 EF STEQ 1220/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 15/2379 8/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02 1671277 m, 111494 m/sec, 4719073 t fired, .
71 EF FNDP 1227/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7299166 t fired, 13963 attempts, .
72 EF STEQ 1225/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 20/2379 10/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02 2229098 m, 111564 m/sec, 6300933 t fired, .
71 EF FNDP 1232/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7340376 t fired, 14039 attempts, .
72 EF STEQ 1230/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 25/2379 12/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02 2765323 m, 107245 m/sec, 7823214 t fired, .
71 EF FNDP 1237/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7382102 t fired, 14116 attempts, .
72 EF STEQ 1235/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
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7 CTL EXCL 30/2379 15/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02 3329819 m, 112899 m/sec, 9427517 t fired, .
71 EF FNDP 1242/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7424172 t fired, 14193 attempts, .
72 EF STEQ 1240/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
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7 CTL EXCL 35/2379 17/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02 3894420 m, 112920 m/sec, 11031926 t fired, .
71 EF FNDP 1247/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7466064 t fired, 14270 attempts, .
72 EF STEQ 1245/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
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7 CTL EXCL 40/2379 20/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02 4447769 m, 110669 m/sec, 12603188 t fired, .
71 EF FNDP 1252/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7507406 t fired, 14346 attempts, .
72 EF STEQ 1250/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
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7 CTL EXCL 45/2379 22/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02 4999284 m, 110303 m/sec, 14169152 t fired, .
71 EF FNDP 1257/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7549368 t fired, 14423 attempts, .
72 EF STEQ 1255/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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7 CTL EXCL 50/2379 24/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02 5555279 m, 111199 m/sec, 15745845 t fired, .
71 EF FNDP 1262/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7592098 t fired, 14503 attempts, .
72 EF STEQ 1260/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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7 CTL EXCL 55/2379 27/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02 6108393 m, 110622 m/sec, 17353967 t fired, .
71 EF FNDP 1267/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7634192 t fired, 14580 attempts, .
72 EF STEQ 1265/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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7 CTL EXCL 60/2379 29/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02 6590222 m, 96365 m/sec, 18985491 t fired, .
71 EF FNDP 1272/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7675700 t fired, 14656 attempts, .
72 EF STEQ 1270/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 65/2379 31/32 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02 7064682 m, 94892 m/sec, 20613020 t fired, .
71 EF FNDP 1277/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7717833 t fired, 14734 attempts, .
72 EF STEQ 1275/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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71 EF FNDP 1282/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7759759 t fired, 14811 attempts, .
72 EF STEQ 1280/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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71 EF FNDP 1287/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7799188 t fired, 14884 attempts, .
72 EF STEQ 1285/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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71 EF FNDP 1292/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7841135 t fired, 14961 attempts, .
72 EF STEQ 1290/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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71 EF FNDP 1297/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7883264 t fired, 15039 attempts, .
72 EF STEQ 1295/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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71 EF FNDP 1302/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7925336 t fired, 15116 attempts, .
72 EF STEQ 1300/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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71 EF FNDP 1307/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 7967385 t fired, 15193 attempts, .
72 EF STEQ 1305/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1312/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8009280 t fired, 15270 attempts, .
72 EF STEQ 1310/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1317/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8051188 t fired, 15347 attempts, .
72 EF STEQ 1315/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1322/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8093746 t fired, 15426 attempts, .
72 EF STEQ 1320/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1327/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8135635 t fired, 15503 attempts, .
72 EF STEQ 1325/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1332/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8177733 t fired, 15580 attempts, .
72 EF STEQ 1330/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1337/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8219863 t fired, 15658 attempts, .
72 EF STEQ 1335/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1342/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8262024 t fired, 15736 attempts, .
72 EF STEQ 1340/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1347/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8304183 t fired, 15813 attempts, .
72 EF STEQ 1345/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1352/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8346657 t fired, 15892 attempts, .
72 EF STEQ 1350/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1357/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8389265 t fired, 15971 attempts, .
72 EF STEQ 1355/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1362/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8430695 t fired, 16047 attempts, .
72 EF STEQ 1360/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1367/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8473146 t fired, 16125 attempts, .
72 EF STEQ 1365/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1372/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8515404 t fired, 16203 attempts, .
72 EF STEQ 1370/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1377/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8557861 t fired, 16282 attempts, .
72 EF STEQ 1375/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1382/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8600068 t fired, 16360 attempts, .
72 EF STEQ 1380/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1387/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8642593 t fired, 16438 attempts, .
72 EF STEQ 1385/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1392/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8684486 t fired, 16515 attempts, .
72 EF STEQ 1390/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1397/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8726610 t fired, 16593 attempts, .
72 EF STEQ 1395/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1402/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8768368 t fired, 16669 attempts, .
72 EF STEQ 1400/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1407/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8810580 t fired, 16747 attempts, .
72 EF STEQ 1405/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1412/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8852108 t fired, 16823 attempts, .
72 EF STEQ 1410/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1417/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8894529 t fired, 16902 attempts, .
72 EF STEQ 1415/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1422/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8932537 t fired, 16972 attempts, .
72 EF STEQ 1420/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1427/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 8969133 t fired, 17039 attempts, .
72 EF STEQ 1425/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1432/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9005640 t fired, 17107 attempts, .
72 EF STEQ 1430/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1437/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9044402 t fired, 17178 attempts, .
72 EF STEQ 1435/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1442/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9080946 t fired, 17246 attempts, .
72 EF STEQ 1440/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1447/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9117969 t fired, 17314 attempts, .
72 EF STEQ 1445/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1452/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9154092 t fired, 17380 attempts, .
72 EF STEQ 1450/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1457/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9190594 t fired, 17448 attempts, .
72 EF STEQ 1455/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1462/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9226881 t fired, 17515 attempts, .
72 EF STEQ 1460/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1467/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9263160 t fired, 17581 attempts, .
72 EF STEQ 1465/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1472/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9299685 t fired, 17649 attempts, .
72 EF STEQ 1470/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1477/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9340672 t fired, 17725 attempts, .
72 EF STEQ 1475/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1482/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9382766 t fired, 17802 attempts, .
72 EF STEQ 1480/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1487/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9425152 t fired, 17880 attempts, .
72 EF STEQ 1485/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1492/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9467521 t fired, 17959 attempts, .
72 EF STEQ 1490/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1497/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9509379 t fired, 18036 attempts, .
72 EF STEQ 1495/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1502/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9551820 t fired, 18114 attempts, .
72 EF STEQ 1500/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1507/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9594369 t fired, 18193 attempts, .
72 EF STEQ 1505/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1512/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9637260 t fired, 18272 attempts, .
72 EF STEQ 1510/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1517/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9679641 t fired, 18350 attempts, .
72 EF STEQ 1515/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1522/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9721372 t fired, 18427 attempts, .
72 EF STEQ 1520/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1527/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9763463 t fired, 18504 attempts, .
72 EF STEQ 1525/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1532/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9805847 t fired, 18583 attempts, .
72 EF STEQ 1530/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1537/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9848139 t fired, 18661 attempts, .
72 EF STEQ 1535/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1542/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9890392 t fired, 18739 attempts, .
72 EF STEQ 1540/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1547/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9932946 t fired, 18818 attempts, .
72 EF STEQ 1545/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1552/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 9975765 t fired, 18897 attempts, .
72 EF STEQ 1550/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1557/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10017893 t fired, 18974 attempts, .
72 EF STEQ 1555/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1562/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10060685 t fired, 19054 attempts, .
72 EF STEQ 1560/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1567/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10103080 t fired, 19132 attempts, .
72 EF STEQ 1565/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1572/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10144924 t fired, 19208 attempts, .
72 EF STEQ 1570/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1577/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10187532 t fired, 19287 attempts, .
72 EF STEQ 1575/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1582/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10229264 t fired, 19364 attempts, .
72 EF STEQ 1580/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1587/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10271453 t fired, 19442 attempts, .
72 EF STEQ 1585/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1592/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10313239 t fired, 19518 attempts, .
72 EF STEQ 1590/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1597/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10355361 t fired, 19596 attempts, .
72 EF STEQ 1595/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1602/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10397251 t fired, 19673 attempts, .
72 EF STEQ 1600/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1607/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10439336 t fired, 19750 attempts, .
72 EF STEQ 1605/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1612/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10481382 t fired, 19827 attempts, .
72 EF STEQ 1610/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1617/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10523655 t fired, 19905 attempts, .
72 EF STEQ 1615/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1622/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10565893 t fired, 19983 attempts, .
72 EF STEQ 1620/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1627/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10608191 t fired, 20061 attempts, .
72 EF STEQ 1625/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1632/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10650099 t fired, 20138 attempts, .
72 EF STEQ 1630/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1637/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10692185 t fired, 20215 attempts, .
72 EF STEQ 1635/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1642/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10734055 t fired, 20292 attempts, .
72 EF STEQ 1640/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1647/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10776645 t fired, 20371 attempts, .
72 EF STEQ 1645/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1652/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10818962 t fired, 20449 attempts, .
72 EF STEQ 1650/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1657/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10861129 t fired, 20526 attempts, .
72 EF STEQ 1655/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1662/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10903604 t fired, 20605 attempts, .
72 EF STEQ 1660/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1667/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10945605 t fired, 20682 attempts, .
72 EF STEQ 1665/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1672/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 10988106 t fired, 20760 attempts, .
72 EF STEQ 1670/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1677/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11030407 t fired, 20838 attempts, .
72 EF STEQ 1675/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1682/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11072649 t fired, 20916 attempts, .
72 EF STEQ 1680/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1687/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11114264 t fired, 20992 attempts, .
72 EF STEQ 1685/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1692/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11156517 t fired, 21070 attempts, .
72 EF STEQ 1690/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1697/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11199139 t fired, 21149 attempts, .
72 EF STEQ 1695/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1702/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11241153 t fired, 21226 attempts, .
72 EF STEQ 1700/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1707/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11283533 t fired, 21304 attempts, .
72 EF STEQ 1705/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1712/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11326114 t fired, 21383 attempts, .
72 EF STEQ 1710/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1717/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11368890 t fired, 21463 attempts, .
72 EF STEQ 1715/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1722/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11411032 t fired, 21540 attempts, .
72 EF STEQ 1720/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1727/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11452904 t fired, 21617 attempts, .
72 EF STEQ 1725/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1732/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11495252 t fired, 21695 attempts, .
72 EF STEQ 1730/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1737/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11537507 t fired, 21773 attempts, .
72 EF STEQ 1735/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1742/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11579778 t fired, 21851 attempts, .
72 EF STEQ 1740/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1747/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11622359 t fired, 21929 attempts, .
72 EF STEQ 1745/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1752/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11664777 t fired, 22008 attempts, .
72 EF STEQ 1750/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1757/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11706874 t fired, 22085 attempts, .
72 EF STEQ 1755/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1762/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11749101 t fired, 22163 attempts, .
72 EF STEQ 1760/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1767/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11791346 t fired, 22241 attempts, .
72 EF STEQ 1765/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1772/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11833626 t fired, 22319 attempts, .
72 EF STEQ 1770/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1777/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11875693 t fired, 22396 attempts, .
72 EF STEQ 1775/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1782/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11918061 t fired, 22474 attempts, .
72 EF STEQ 1780/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1787/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 11960710 t fired, 22553 attempts, .
72 EF STEQ 1785/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1792/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12003021 t fired, 22631 attempts, .
72 EF STEQ 1790/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1797/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12045214 t fired, 22709 attempts, .
72 EF STEQ 1795/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1802/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12087430 t fired, 22787 attempts, .
72 EF STEQ 1800/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1807/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12129580 t fired, 22865 attempts, .
72 EF STEQ 1805/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1812/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12171826 t fired, 22943 attempts, .
72 EF STEQ 1810/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1817/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12214022 t fired, 23020 attempts, .
72 EF STEQ 1815/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1822/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12256167 t fired, 23098 attempts, .
72 EF STEQ 1820/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1827/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12298225 t fired, 23175 attempts, .
72 EF STEQ 1825/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1832/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12340616 t fired, 23253 attempts, .
72 EF STEQ 1830/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1837/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12383224 t fired, 23332 attempts, .
72 EF STEQ 1835/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1842/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12425669 t fired, 23410 attempts, .
72 EF STEQ 1840/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1847/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12467881 t fired, 23488 attempts, .
72 EF STEQ 1845/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1852/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12510308 t fired, 23567 attempts, .
72 EF STEQ 1850/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1857/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12552548 t fired, 23645 attempts, .
72 EF STEQ 1855/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1862/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12595120 t fired, 23723 attempts, .
72 EF STEQ 1860/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1867/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12637530 t fired, 23802 attempts, .
72 EF STEQ 1865/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1872/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12679404 t fired, 23878 attempts, .
72 EF STEQ 1870/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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71 EF FNDP 1877/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12722131 t fired, 23957 attempts, .
72 EF STEQ 1875/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1882/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12764553 t fired, 24036 attempts, .
72 EF STEQ 1880/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1887/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12806721 t fired, 24113 attempts, .
72 EF STEQ 1885/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1892/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12849227 t fired, 24192 attempts, .
72 EF STEQ 1890/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1897/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12891480 t fired, 24270 attempts, .
72 EF STEQ 1895/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1902/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12933917 t fired, 24348 attempts, .
72 EF STEQ 1900/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1907/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 12976073 t fired, 24426 attempts, .
72 EF STEQ 1905/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1912/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13018718 t fired, 24505 attempts, .
72 EF STEQ 1910/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1917/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13061381 t fired, 24584 attempts, .
72 EF STEQ 1915/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1922/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13103352 t fired, 24661 attempts, .
72 EF STEQ 1920/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1927/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13145412 t fired, 24738 attempts, .
72 EF STEQ 1925/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1932/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13187899 t fired, 24817 attempts, .
72 EF STEQ 1930/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1937/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13230385 t fired, 24895 attempts, .
72 EF STEQ 1935/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1942/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13272407 t fired, 24973 attempts, .
72 EF STEQ 1940/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1947/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13315096 t fired, 25052 attempts, .
72 EF STEQ 1945/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1952/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13357361 t fired, 25130 attempts, .
72 EF STEQ 1950/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1957/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13399442 t fired, 25207 attempts, .
72 EF STEQ 1955/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1962/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13440720 t fired, 25283 attempts, .
72 EF STEQ 1960/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1967/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13477133 t fired, 25350 attempts, .
72 EF STEQ 1965/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1972/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13513588 t fired, 25418 attempts, .
72 EF STEQ 1970/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1977/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13549867 t fired, 25485 attempts, .
72 EF STEQ 1975/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1982/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13591767 t fired, 25562 attempts, .
72 EF STEQ 1980/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1987/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13633611 t fired, 25638 attempts, .
72 EF STEQ 1985/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1992/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13675626 t fired, 25715 attempts, .
72 EF STEQ 1990/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 1997/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13718555 t fired, 25795 attempts, .
72 EF STEQ 1995/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-02: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2002/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13760572 t fired, 25872 attempts, .
72 EF STEQ 2000/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2007/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13802733 t fired, 25950 attempts, .
72 EF STEQ 2005/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2012/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13844748 t fired, 26027 attempts, .
72 EF STEQ 2010/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2017/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13886727 t fired, 26104 attempts, .
72 EF STEQ 2015/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2022/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13929525 t fired, 26184 attempts, .
72 EF STEQ 2020/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2027/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 13971774 t fired, 26261 attempts, .
72 EF STEQ 2025/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2032/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14014238 t fired, 26340 attempts, .
72 EF STEQ 2030/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2037/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14056494 t fired, 26418 attempts, .
72 EF STEQ 2035/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2042/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14099209 t fired, 26497 attempts, .
72 EF STEQ 2040/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2047/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14141696 t fired, 26576 attempts, .
72 EF STEQ 2045/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2052/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14184066 t fired, 26654 attempts, .
72 EF STEQ 2050/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2057/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14225798 t fired, 26731 attempts, .
72 EF STEQ 2055/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2062/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14267669 t fired, 26808 attempts, .
72 EF STEQ 2060/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2067/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14309968 t fired, 26886 attempts, .
72 EF STEQ 2065/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2072/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14351711 t fired, 26962 attempts, .
72 EF STEQ 2070/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2077/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14393965 t fired, 27040 attempts, .
72 EF STEQ 2075/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2082/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14436028 t fired, 27118 attempts, .
72 EF STEQ 2080/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2087/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14478078 t fired, 27195 attempts, .
72 EF STEQ 2085/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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71 EF FNDP 2092/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14520259 t fired, 27273 attempts, .
72 EF STEQ 2090/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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71 EF FNDP 2097/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14562702 t fired, 27352 attempts, .
72 EF STEQ 2095/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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71 EF FNDP 2102/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14605182 t fired, 27431 attempts, .
72 EF STEQ 2100/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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71 EF FNDP 2107/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14646869 t fired, 27507 attempts, .
72 EF STEQ 2105/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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71 EF FNDP 2112/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14688818 t fired, 27584 attempts, .
72 EF STEQ 2110/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2117/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14731349 t fired, 27662 attempts, .
72 EF STEQ 2115/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2122/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14773797 t fired, 27741 attempts, .
72 EF STEQ 2120/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2127/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14815960 t fired, 27818 attempts, .
72 EF STEQ 2125/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2132/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14858726 t fired, 27898 attempts, .
72 EF STEQ 2130/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2137/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14900490 t fired, 27975 attempts, .
72 EF STEQ 2135/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2142/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14942643 t fired, 28052 attempts, .
72 EF STEQ 2140/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2147/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 14984842 t fired, 28130 attempts, .
72 EF STEQ 2145/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2152/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15026705 t fired, 28207 attempts, .
72 EF STEQ 2150/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2157/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15068507 t fired, 28284 attempts, .
72 EF STEQ 2155/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2162/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15110099 t fired, 28360 attempts, .
72 EF STEQ 2160/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2167/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15152363 t fired, 28438 attempts, .
72 EF STEQ 2165/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2172/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15194362 t fired, 28515 attempts, .
72 EF STEQ 2170/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2177/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15236296 t fired, 28592 attempts, .
72 EF STEQ 2175/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2182/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15278383 t fired, 28669 attempts, .
72 EF STEQ 2180/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2187/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15320716 t fired, 28747 attempts, .
72 EF STEQ 2185/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2192/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15362724 t fired, 28824 attempts, .
72 EF STEQ 2190/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2197/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15404988 t fired, 28902 attempts, .
72 EF STEQ 2195/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2202/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15447100 t fired, 28980 attempts, .
72 EF STEQ 2200/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2207/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15489542 t fired, 29058 attempts, .
72 EF STEQ 2205/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2212/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15529590 t fired, 29132 attempts, .
72 EF STEQ 2210/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2217/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15572245 t fired, 29211 attempts, .
72 EF STEQ 2215/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2222/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15614270 t fired, 29288 attempts, .
72 EF STEQ 2220/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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71 EF FNDP 2227/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15656610 t fired, 29366 attempts, .
72 EF STEQ 2225/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2232/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15698882 t fired, 29444 attempts, .
72 EF STEQ 2230/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2237/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15741277 t fired, 29522 attempts, .
72 EF STEQ 2235/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2242/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15783628 t fired, 29600 attempts, .
72 EF STEQ 2240/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2247/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15826080 t fired, 29678 attempts, .
72 EF STEQ 2245/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2252/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15868717 t fired, 29757 attempts, .
72 EF STEQ 2250/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2257/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15908496 t fired, 29830 attempts, .
72 EF STEQ 2255/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2262/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15951188 t fired, 29909 attempts, .
72 EF STEQ 2260/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2267/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 15993852 t fired, 29988 attempts, .
72 EF STEQ 2265/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2272/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 16035992 t fired, 30065 attempts, .
72 EF STEQ 2270/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2277/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 16078323 t fired, 30143 attempts, .
72 EF STEQ 2275/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2282/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 16120147 t fired, 30220 attempts, .
72 EF STEQ 2280/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2287/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 16162796 t fired, 30298 attempts, .
72 EF STEQ 2285/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2292/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 16201073 t fired, 30369 attempts, .
72 EF STEQ 2290/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2297/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 16240080 t fired, 30441 attempts, .
72 EF STEQ 2295/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2302/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 16282173 t fired, 30519 attempts, .
72 EF STEQ 2300/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2307/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 16324258 t fired, 30596 attempts, .
72 EF STEQ 2305/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2312/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 16366583 t fired, 30674 attempts, .
72 EF STEQ 2310/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2317/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 16409031 t fired, 30753 attempts, .
72 EF STEQ 2315/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2322/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 16451712 t fired, 30831 attempts, .
72 EF STEQ 2320/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2327/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 16494526 t fired, 30911 attempts, .
72 EF STEQ 2325/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2332/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 16537377 t fired, 30990 attempts, .
72 EF STEQ 2330/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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71 EF FNDP 2337/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 16579878 t fired, 31068 attempts, .
72 EF STEQ 2335/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
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71 EF FNDP 2342/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 16622381 t fired, 31146 attempts, .
72 EF STEQ 2340/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2347/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 16664786 t fired, 31224 attempts, .
72 EF STEQ 2345/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2352/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 16707235 t fired, 31302 attempts, .
72 EF STEQ 2350/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2357/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 16749717 t fired, 31381 attempts, .
72 EF STEQ 2355/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2362/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 16792271 t fired, 31459 attempts, .
72 EF STEQ 2360/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
71 EF FNDP 2367/3591 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 16834976 t fired, 31538 attempts, .
72 EF STEQ 2365/3589 0/5 BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12 sara is running.
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-00: CTL true CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-01: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-03: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-04: EF false state equation
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-05: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-07: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-08: CONJ false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-09: F false state space / EG
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-11: INITIAL true preprocessing
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-14: CTL false CTL model checker
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-15: CTL false CTL model checker
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BridgeAndVehicles-COL-V80P50N20-CTLCardinality-10: SP ACTL 0 0 0 0 1 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-12: DISJ 0 0 2 0 4 0 1 0
BridgeAndVehicles-COL-V80P50N20-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V80P50N20"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-COL-V80P50N20, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r038-tajo-167813691000145"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V80P50N20.tgz
mv BridgeAndVehicles-COL-V80P50N20 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;