Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r038-tajo-167813691000118.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is BridgeAndVehicles-COL-V80P20N10, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r038-tajo-167813691000118
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 544K
-rw-r--r-- 1 mcc users 9.8K Feb 25 12:17 CTLCardinality.txt
-rw-r--r-- 1 mcc users 102K Feb 25 12:17 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Feb 25 12:13 CTLFireability.txt
-rw-r--r-- 1 mcc users 41K Feb 25 12:13 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.2K Feb 25 15:36 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 15:36 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 15:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:36 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 12:39 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 119K Feb 25 12:39 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 25 12:35 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 82K Feb 25 12:35 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 15:36 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 15:36 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 10 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 45K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14
FORMULA_NAME BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678407418058

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BridgeAndVehicles-COL-V80P20N10
Not applying reductions.
Model is COL
ReachabilityCardinality COL
starting LoLA
BK_INPUT BridgeAndVehicles-COL-V80P20N10
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678407455498

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: TR BINDINGS
lola: LAUNCH task # 52 (type SKEL/FNDP) for 9 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SKEL/EQUN) for 9 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 62 (type SKEL/SRCH) for 9 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type SKEL/SRCH) for 9 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 62 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 63 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: TR BINDINGS DONE
lola: Places: 188, Transitions: 2108
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-57.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: CANCELED task # 52 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 57 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 49 (type SKEL/FNDP) for 0 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type SKEL/EQUN) for 0 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type SKEL/SRCH) for 0 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SKEL/SRCH) for 0 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 66 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: result : true
lola: markings : 62
lola: fired transitions : 61
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 65 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: result : true
lola: markings : 68
lola: fired transitions : 69
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 52 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 15214
lola: tried executions : 15215
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 49 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 56 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 73 (type SKEL/FNDP) for 45 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type SKEL/EQUN) for 45 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type SKEL/SRCH) for 45 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 77 (type SKEL/SRCH) for 45 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 49 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 72
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 76 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15
lola: result : false
lola: markings : 81
lola: fired transitions : 80
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 73 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 74 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 77 (type SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-56.sara.
sara: place or transition ordering is non-deterministic
lola: LAUNCH task # 85 (type SKEL/FNDP) for 18 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 98 (type SKEL/EQUN) for 18 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: @ trans enregistrement_A
lola: LAUNCH task # 107 (type SKEL/FNDP) for 39 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 127 (type SKEL/EQUN) for 39 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: @ trans decision
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-74.sara.
lola: @ trans altern_cpt

lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: @ trans autorisation_A
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-98.sara.
lola: @ trans liberation_A
lola: FINISHED task # 73 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15
lola: result : unknown
lola: fired transitions : 10073
lola: tried executions : 126
lola: time used : 0.000000
lola: memory pages used : 0

lola: FINISHED task # 74 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15
lola: result : false
lola: @ trans enregistrement_B
lola: @ trans timeout_A
lola: FINISHED task # 57 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03
lola: result : unknown
lola: @ trans timeout_B

lola: FINISHED task # 56 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: result : true
lola: @ trans liberation_B
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-127.sara.
sara: place or transition ordering is non-deterministic
lola: @ trans basculement
lola: FINISHED task # 98 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06
lola: result : false
lola: @ trans autorisation_B
lola: CANCELED task # 85 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 91 (type SKEL/FNDP) for 24 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 112 (type SKEL/EQUN) for 24 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 85 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06
lola: result : unknown
lola: fired transitions : 84208
lola: tried executions : 111
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-112.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 112 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08
lola: result : false
lola: CANCELED task # 91 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 105 (type SKEL/FNDP) for 33 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 141 (type SKEL/EQUN) for 33 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 91 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08
lola: result : unknown
lola: fired transitions : 71729
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-141.sara.

lola: FINISHED task # 141 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
lola: result : true
lola: CANCELED task # 105 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 94 (type SKEL/FNDP) for 36 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 109 (type SKEL/EQUN) for 36 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 105 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 33
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-109.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 109 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12
lola: result : false
lola: CANCELED task # 94 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 93 (type SKEL/FNDP) for 12 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 108 (type SKEL/EQUN) for 12 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 94 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12
lola: result : unknown
lola: fired transitions : 467936
lola: tried executions : 594
lola: time used : 0.000000
lola: memory pages used : 0

lola: FINISHED task # 127 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13
lola: result : false
lola: CANCELED task # 107 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 132 (type SKEL/FNDP) for 42 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 133 (type SKEL/EQUN) for 42 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 107 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13
lola: result : unknown
lola: fired transitions : 315297
lola: tried executions : 315298
lola: time used : 1.000000
lola: memory pages used : 0
lola: FINISHED task # 132 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14
lola: result : true
lola: fired transitions : 201
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 133 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 84 (type SKEL/FNDP) for 21 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type SKEL/EQUN) for 21 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 84 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
lola: result : true
lola: fired transitions : 49
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 96 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 106 (type SKEL/FNDP) for 15 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type SKEL/EQUN) for 15 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 106 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 269
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 122 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 147 (type SKEL/FNDP) for 30 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 148 (type SKEL/EQUN) for 30 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-96.sara.

lola: FINISHED task # 96 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-108.sara.
sara: place or transition ordering is non-deterministic

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-133.sara.

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-148.sara.

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-122.sara.
sara: place or transition ordering is non-deterministic
lola: Rule S: 0 transitions removed,0 places removed
lola: LAUNCH INITIAL

lola: LAUNCH task # 7 (type CNST) for 6 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 133 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14
lola: result : true
lola: LAUNCH INITIAL
lola: LAUNCH task # 28 (type CNST) for 27 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 31 (type CNST) for 30 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 108 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04
lola: result : false
lola: FINISHED task # 7 (type CNST) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02
lola: result : false
lola: FINISHED task # 122 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05
lola: result : true
lola: CANCELED task # 93 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04 (obsolete)
lola: FINISHED task # 93 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 3940791
lola: tried executions : 27731
lola: time used : 3.000000
lola: memory pages used : 0
lola: FINISHED task # 148 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10
lola: result : false
lola: CANCELED task # 31 (type CNST) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 147 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 92 (type SKEL/FNDP) for 27 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 110 (type SKEL/EQUN) for 27 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 156 (type SKEL/SRCH) for 27 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 156 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 28 (type CNST) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09
lola: result : false
lola: CANCELED task # 92 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 110 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 55 (type SKEL/FNDP) for 3 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SKEL/EQUN) for 3 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type SKEL/SRCH) for 3 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SKEL/SRCH) for 3 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-110.sara.

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 147 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10
lola: result : unknown
lola: fired transitions : 9095757
lola: tried executions : 252661
lola: time used : 3.000000
lola: memory pages used : 0
lola: planning for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08 stopped (result already fixed).
lola: FINISHED task # 92 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 56384
lola: tried executions : 56385
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-60.sara.
sara: place or transition ordering is non-deterministic

lola: planning for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06 stopped (result already fixed).
lola: FINISHED task # 31 (type CNST) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10
lola: result : true
lola: planning for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04 stopped (result already fixed).
lola: FINISHED task # 69 (type SKEL/SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01
lola: result : false
lola: markings : 26163
lola: fired transitions : 39123
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 55 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 60 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 68 (type SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01 (obsolete)
lola: FINISHED task # 55 (type SKEL/FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 820621
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 110 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09
lola: result : false
lola: FINISHED task # 60 (type SKEL/EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01
lola: result : false
lola: planning for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 169 (type EXCL) for 0 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 165 (type FNDP) for 0 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 166 (type EQUN) for 0 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 168 (type SRCH) for 0 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 168 (type SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: result : true
lola: markings : 101
lola: fired transitions : 100
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 165 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 166 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 169 (type EXCL) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-166.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00: EF true tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15: EF false skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05: AG 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07: EF 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11: AG 0 0 0 0 2 0 0 3
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14: EF 2 0 0 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 5 secs. Pages in use: 2
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 179 (type EXCL) for 33 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
lola: time limit : 898 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 175 (type FNDP) for 33 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 176 (type EQUN) for 33 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 178 (type SRCH) for 33 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 165 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 99
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 175 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 33
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 176 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 178 (type SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 179 (type EXCL) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 182 (type EXCL) for 42 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14
lola: time limit : 1198 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 171 (type FNDP) for 42 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 173 (type EQUN) for 42 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 181 (type SRCH) for 42 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-176.sara.
lola: FINISHED task # 181 (type SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14
lola: result : true
lola: markings : 94
lola: fired transitions : 93
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 171 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 173 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 182 (type EXCL) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-173.sara.
lola: FINISHED task # 171 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14
lola: result : true
lola: fired transitions : 92
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 188 (type EXCL) for 21 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
lola: time limit : 1797 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 184 (type FNDP) for 21 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 185 (type EQUN) for 21 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 187 (type SRCH) for 21 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 184 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
lola: result : true
lola: fired transitions : 49
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: CANCELED task # 185 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 187 (type SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 188 (type EXCL) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-185.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 195 (type EXCL) for 15 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05
lola: time limit : 3594 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 191 (type FNDP) for 15 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 192 (type EQUN) for 15 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 194 (type SRCH) for 15 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-192.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic

sara: place or transition ordering is non-deterministic
lola: FINISHED task # 176 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11
lola: result : true

sara: warning, failure of lp_solve (at job 8)
lola: FINISHED task # 185 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00: EF true tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07: EF true findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11: AG false findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14: EF true tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15: EF false skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05: AG 0 1 4 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
191 EF FNDP 4/1795 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 36334 t fired, 88 attempts, .
192 EF STEQ 4/3592 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 sara is running.
194 EF SRCH 4/3592 1/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 34902 m, 6980 m/sec, 61594 t fired, .
195 EF EXCL 4/3594 1/32 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 34854 m, 6970 m/sec, 45337 t fired, .

Time elapsed: 10 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00: EF true tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07: EF true findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11: AG false findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14: EF true tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15: EF false skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05: AG 0 1 4 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
191 EF FNDP 9/1793 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 82119 t fired, 194 attempts, .
192 EF STEQ 9/3590 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 sara is running.
194 EF SRCH 9/3590 1/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 91655 m, 11350 m/sec, 162426 t fired, .
195 EF EXCL 9/3594 1/32 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 74683 m, 7965 m/sec, 97367 t fired, .

Time elapsed: 15 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00: EF true tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07: EF true findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11: AG false findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14: EF true tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15: EF false skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05: AG 0 1 4 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
191 EF FNDP 14/1788 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 130215 t fired, 302 attempts, .
192 EF STEQ 14/3585 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 sara is running.
194 EF SRCH 14/3585 1/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 134801 m, 8629 m/sec, 239246 t fired, .
195 EF EXCL 14/3594 1/32 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 109998 m, 7063 m/sec, 143695 t fired, .

Time elapsed: 20 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00: EF true tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07: EF true findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11: AG false findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14: EF true tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15: EF false skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05: AG 0 1 4 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
191 EF FNDP 19/1783 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 198894 t fired, 452 attempts, .
192 EF STEQ 19/3580 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 sara is running.
194 EF SRCH 19/3580 2/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 161549 m, 5349 m/sec, 286649 t fired, .
195 EF EXCL 19/3594 1/32 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 117474 m, 1495 m/sec, 153789 t fired, .

Time elapsed: 25 secs. Pages in use: 3
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00: EF true tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07: EF true findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11: AG false findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14: EF true tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15: EF false skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05: AG 0 1 4 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
191 EF FNDP 24/1778 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 252693 t fired, 568 attempts, .
192 EF STEQ 24/3575 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 sara is running.
194 EF SRCH 24/3575 2/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 207218 m, 9133 m/sec, 367422 t fired, .
195 EF EXCL 24/3594 1/32 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 127153 m, 1935 m/sec, 166941 t fired, .

Time elapsed: 30 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00: EF true tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07: EF true findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11: AG false findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14: EF true tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15: EF false skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05: AG 0 1 4 0 2 0 0 3

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
191 EF FNDP 29/1773 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 292199 t fired, 651 attempts, .
192 EF STEQ 29/3570 0/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 sara is running.
194 EF SRCH 29/3570 2/5 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 246306 m, 7817 m/sec, 436013 t fired, .
195 EF EXCL 29/3594 1/32 BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 134852 m, 1539 m/sec, 176543 t fired, .

Time elapsed: 35 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 194 (type SRCH) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05
lola: result : true
lola: markings : 256032
lola: fired transitions : 453424
lola: time used : 31.000000
lola: memory pages used : 2
lola: CANCELED task # 191 (type FNDP) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 192 (type EQUN) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 195 (type EXCL) for BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-00: EF true tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-02: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-04: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-05: AG false tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-06: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-07: EF true findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-08: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-09: EF false preprocessing
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-10: AG true skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-11: AG false findpath
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-13: EF false skeleton: state equation
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-14: EF true tandem / insertion
BridgeAndVehicles-COL-V80P20N10-ReachabilityCardinality-15: EF false skeleton: tandem / insertion


Time elapsed: 37 secs. Pages in use: 4

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V80P20N10"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-COL-V80P20N10, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r038-tajo-167813691000118"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V80P20N10.tgz
mv BridgeAndVehicles-COL-V80P20N10 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;