Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r020-oct2-167813608400436.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is BART-COL-005, examination is ReachabilityDeadlock
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r020-oct2-167813608400436
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 712K
-rw-r--r-- 1 mcc users 6.5K Feb 26 04:05 CTLCardinality.txt
-rw-r--r-- 1 mcc users 59K Feb 26 04:05 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Feb 26 03:56 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Feb 26 03:56 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 4.3K Feb 25 15:34 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 15:34 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 15:34 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:34 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Feb 26 04:40 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 162K Feb 26 04:40 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Feb 26 04:18 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 105K Feb 26 04:18 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:34 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:34 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 186K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

FORMULA_NAME ReachabilityDeadlock

=== Now, execution of the tool begins

BK_START 1678370267517

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=ReachabilityDeadlock
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=1800
BK_INPUT=BART-COL-005
Not applying reductions.
Model is COL
ReachabilityDeadlock COL
starting LoLA
BK_INPUT BART-COL-005
BK_EXAMINATION: ReachabilityDeadlock
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
GlobalProperty: ReachabilityDeadlock

FORMULA ReachabilityDeadlock FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678370268228

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: TR BINDINGS
lola: TR BINDINGS DONE
lola: Places: 11603, Transitions: 1615
lola: @ trans TooEarly
lola: @ trans MissStation
lola: @ trans TrainStop
lola: @ trans TrainStable
lola: @ trans TrainDecc
lola: @ trans TrainAcc
lola: @ trans AtStation
lola: REM DEA TR: t = t0
lola: REM DEA TR: t = t230
lola: REM DEA TR: t = t1
lola: REM DEA TR: t = t231
lola: REM DEA TR: t = t888
lola: REM DEA TR: t = t912
lola: REM DEA TR: t = t913
lola: REM DEA TR: t = t914
lola: REM DEA TR: t = t302
lola: REM DEA TR: t = t303
lola: REM DEA TR: t = t304
lola: REM DEA TR: t = t305
lola: REM DEA TR: t = t610
lola: REM DEA TR: t = t611
lola: REM DEA TR: t = t612
lola: REM DEA TR: t = t613
lola: REM DEA TR: t = t614
lola: REM DEA TR: t = t615
lola: REM DEA TR: t = t616
lola: REM DEA TR: t = t617
lola: REM DEA TR: t = t618
lola: REM DEA TR: t = t619
lola: REM DEA TR: t = t620
lola: REM DEA TR: t = t621
lola: REM DEA TR: t = t622
lola: REM DEA TR: t = t623
lola: REM DEA TR: t = t624
lola: REM DEA TR: t = t625
lola: REM DEA TR: t = t40
lola: REM DEA TR: t = t306
lola: REM DEA TR: t = t41
lola: REM DEA TR: t = t307
lola: REM DEA TR: t = t42
lola: REM DEA TR: t = t915
lola: REM DEA TR: t = t43
lola: REM DEA TR: t = t916
lola: REM DEA TR: t = t44
lola: REM DEA TR: t = t917
lola: REM DEA TR: t = t45
lola: REM DEA TR: t = t918
lola: REM DEA TR: t = t46
lola: REM DEA TR: t = t919
lola: REM DEA TR: t = t47
lola: REM DEA TR: t = t920
lola: REM DEA TR: t = t48
lola: REM DEA TR: t = t921
lola: REM DEA TR: t = t49
lola: REM DEA TR: t = t922
lola: REM DEA TR: t = t50
lola: REM DEA TR: t = t923
lola: REM DEA TR: t = t51
lola: REM DEA TR: t = t924
lola: REM DEA TR: t = t52
lola: REM DEA TR: t = t925
lola: REM DEA TR: t = t53
lola: REM DEA TR: t = t926
lola: REM DEA TR: t = t54
lola: REM DEA TR: t = t927
lola: REM DEA TR: t = t55
lola: REM DEA TR: t = t928
lola: REM DEA TR: t = t56
lola: REM DEA TR: t = t929
lola: REM DEA TR: t = t57
lola: REM DEA TR: t = t930
lola: REM DEA TR: t = t58
lola: REM DEA TR: t = t931
lola: REM DEA TR: t = t59
lola: REM DEA TR: t = t932
lola: REM DEA TR: t = t60
lola: REM DEA TR: t = t933
lola: REM DEA TR: t = t61
lola: REM DEA TR: t = t934
lola: REM DEA TR: t = t62
lola: REM DEA TR: t = t935
lola: REM DEA TR: t = t63
lola: REM DEA TR: t = t936
lola: REM DEA TR: t = t64
lola: REM DEA TR: t = t937
lola: REM DEA TR: t = t65
lola: REM DEA TR: t = t938
lola: REM DEA TR: t = t66
lola: REM DEA TR: t = t939
lola: REM DEA TR: t = t67
lola: REM DEA TR: t = t940
lola: REM DEA TR: t = t68
lola: REM DEA TR: t = t941
lola: REM DEA TR: t = t69
lola: REM DEA TR: t = t942
lola: REM DEA TR: t = t70
lola: REM DEA TR: t = t943
lola: REM DEA TR: t = t71
lola: REM DEA TR: t = t944
lola: REM DEA TR: t = t72
lola: REM DEA TR: t = t945
lola: REM DEA TR: t = t73
lola: REM DEA TR: t = t946
lola: REM DEA TR: t = t74
lola: REM DEA TR: t = t947
lola: REM DEA TR: t = t75
lola: REM DEA TR: t = t948
lola: REM DEA TR: t = t76
lola: REM DEA TR: t = t949
lola: REM DEA TR: t = t77
lola: REM DEA TR: t = t950
lola: REM DEA TR: t = t78
lola: REM DEA TR: t = t951
lola: REM DEA TR: t = t79
lola: REM DEA TR: t = t952
lola: REM DEA TR: t = t1018
lola: REM DEA TR: t = t1042
lola: REM DEA TR: t = t1043
lola: REM DEA TR: t = t1044
lola: REM DEA TR: t = t378
lola: REM DEA TR: t = t379
lola: REM DEA TR: t = t380
lola: REM DEA TR: t = t381
lola: REM DEA TR: t = t645
lola: REM DEA TR: t = t646
lola: REM DEA TR: t = t647
lola: REM DEA TR: t = t648
lola: REM DEA TR: t = t649
lola: REM DEA TR: t = t650
lola: REM DEA TR: t = t651
lola: REM DEA TR: t = t652
lola: REM DEA TR: t = t653
lola: REM DEA TR: t = t654
lola: REM DEA TR: t = t655
lola: REM DEA TR: t = t656
lola: REM DEA TR: t = t657
lola: REM DEA TR: t = t658
lola: REM DEA TR: t = t659
lola: REM DEA TR: t = t660
lola: REM DEA TR: t = t80
lola: REM DEA TR: t = t382
lola: REM DEA TR: t = t81
lola: REM DEA TR: t = t383
lola: REM DEA TR: t = t82
lola: REM DEA TR: t = t1045
lola: REM DEA TR: t = t83
lola: REM DEA TR: t = t1046
lola: REM DEA TR: t = t84
lola: REM DEA TR: t = t1047
lola: REM DEA TR: t = t85
lola: REM DEA TR: t = t1048
lola: REM DEA TR: t = t86
lola: REM DEA TR: t = t1049
lola: REM DEA TR: t = t87
lola: REM DEA TR: t = t1050
lola: REM DEA TR: t = t88
lola: REM DEA TR: t = t1051
lola: REM DEA TR: t = t89
lola: REM DEA TR: t = t1052
lola: REM DEA TR: t = t90
lola: REM DEA TR: t = t1053
lola: REM DEA TR: t = t91
lola: REM DEA TR: t = t1054
lola: REM DEA TR: t = t92
lola: REM DEA TR: t = t1055
lola: REM DEA TR: t = t93
lola: REM DEA TR: t = t1056
lola: REM DEA TR: t = t94
lola: REM DEA TR: t = t1057
lola: REM DEA TR: t = t95
lola: REM DEA TR: t = t1058
lola: REM DEA TR: t = t96
lola: REM DEA TR: t = t1059
lola: REM DEA TR: t = t97
lola: REM DEA TR: t = t1060
lola: REM DEA TR: t = t98
lola: REM DEA TR: t = t1061
lola: REM DEA TR: t = t99
lola: REM DEA TR: t = t1062
lola: REM DEA TR: t = t100
lola: REM DEA TR: t = t1063
lola: REM DEA TR: t = t101
lola: REM DEA TR: t = t1064
lola: REM DEA TR: t = t102
lola: REM DEA TR: t = t1065
lola: REM DEA TR: t = t103
lola: REM DEA TR: t = t1066
lola: REM DEA TR: t = t104
lola: REM DEA TR: t = t1067
lola: REM DEA TR: t = t105
lola: REM DEA TR: t = t1068
lola: REM DEA TR: t = t106
lola: REM DEA TR: t = t1069
lola: REM DEA TR: t = t107
lola: REM DEA TR: t = t1070
lola: REM DEA TR: t = t108
lola: REM DEA TR: t = t1071
lola: REM DEA TR: t = t109
lola: REM DEA TR: t = t1072
lola: REM DEA TR: t = t110
lola: REM DEA TR: t = t1073
lola: REM DEA TR: t = t111
lola: REM DEA TR: t = t1074
lola: REM DEA TR: t = t112
lola: REM DEA TR: t = t1075
lola: REM DEA TR: t = t113
lola: REM DEA TR: t = t1076
lola: REM DEA TR: t = t114
lola: REM DEA TR: t = t1077
lola: REM DEA TR: t = t115
lola: REM DEA TR: t = t1078
lola: REM DEA TR: t = t116
lola: REM DEA TR: t = t1079
lola: REM DEA TR: t = t117
lola: REM DEA TR: t = t1080
lola: REM DEA TR: t = t118
lola: REM DEA TR: t = t1081
lola: REM DEA TR: t = t119
lola: REM DEA TR: t = t1082
lola: REM DEA TR: t = t1148
lola: REM DEA TR: t = t1172
lola: REM DEA TR: t = t1173
lola: REM DEA TR: t = t1174
lola: REM DEA TR: t = t454
lola: REM DEA TR: t = t455
lola: REM DEA TR: t = t456
lola: REM DEA TR: t = t457
lola: REM DEA TR: t = t680
lola: REM DEA TR: t = t681
lola: REM DEA TR: t = t682
lola: REM DEA TR: t = t683
lola: REM DEA TR: t = t684
lola: REM DEA TR: t = t685
lola: REM DEA TR: t = t686
lola: REM DEA TR: t = t687
lola: REM DEA TR: t = t688
lola: REM DEA TR: t = t689
lola: REM DEA TR: t = t690
lola: REM DEA TR: t = t691
lola: REM DEA TR: t = t692
lola: REM DEA TR: t = t693
lola: REM DEA TR: t = t694
lola: REM DEA TR: t = t695
lola: REM DEA TR: t = t120
lola: REM DEA TR: t = t458
lola: REM DEA TR: t = t121
lola: REM DEA TR: t = t459
lola: REM DEA TR: t = t1175
lola: REM DEA TR: t = t122
lola: REM DEA TR: t = t1176
lola: REM DEA TR: t = t123
lola: REM DEA TR: t = t1177
lola: REM DEA TR: t = t124
lola: REM DEA TR: t = t1178
lola: REM DEA TR: t = t125
lola: REM DEA TR: t = t1179
lola: REM DEA TR: t = t126
lola: REM DEA TR: t = t1180
lola: REM DEA TR: t = t127
lola: REM DEA TR: t = t1181
lola: REM DEA TR: t = t128
lola: REM DEA TR: t = t1182
lola: REM DEA TR: t = t129
lola: REM DEA TR: t = t1183
lola: REM DEA TR: t = t130
lola: REM DEA TR: t = t1184
lola: REM DEA TR: t = t131
lola: REM DEA TR: t = t1185
lola: REM DEA TR: t = t132
lola: REM DEA TR: t = t1186
lola: REM DEA TR: t = t133
lola: REM DEA TR: t = t1187
lola: REM DEA TR: t = t134
lola: REM DEA TR: t = t1188
lola: REM DEA TR: t = t135
lola: REM DEA TR: t = t1189
lola: REM DEA TR: t = t136
lola: REM DEA TR: t = t1190
lola: REM DEA TR: t = t137
lola: REM DEA TR: t = t1191
lola: REM DEA TR: t = t138
lola: REM DEA TR: t = t1192
lola: REM DEA TR: t = t139
lola: REM DEA TR: t = t1193
lola: REM DEA TR: t = t140
lola: REM DEA TR: t = t1194
lola: REM DEA TR: t = t141
lola: REM DEA TR: t = t1195
lola: REM DEA TR: t = t142
lola: REM DEA TR: t = t1196
lola: REM DEA TR: t = t143
lola: REM DEA TR: t = t1197
lola: REM DEA TR: t = t144
lola: REM DEA TR: t = t1198
lola: REM DEA TR: t = t145
lola: REM DEA TR: t = t1199
lola: REM DEA TR: t = t146
lola: REM DEA TR: t = t1200
lola: REM DEA TR: t = t147
lola: REM DEA TR: t = t1201
lola: REM DEA TR: t = t148
lola: REM DEA TR: t = t1202
lola: REM DEA TR: t = t149
lola: REM DEA TR: t = t1203
lola: REM DEA TR: t = t150
lola: REM DEA TR: t = t1204
lola: REM DEA TR: t = t151
lola: REM DEA TR: t = t1205
lola: REM DEA TR: t = t152
lola: REM DEA TR: t = t1206
lola: REM DEA TR: t = t153
lola: REM DEA TR: t = t1207
lola: REM DEA TR: t = t154
lola: REM DEA TR: t = t1208
lola: REM DEA TR: t = t155
lola: REM DEA TR: t = t1209
lola: REM DEA TR: t = t156
lola: REM DEA TR: t = t1210
lola: REM DEA TR: t = t157
lola: REM DEA TR: t = t1211
lola: REM DEA TR: t = t158
lola: REM DEA TR: t = t1212
lola: REM DEA TR: t = t159
lola: REM DEA TR: t = t1278
lola: REM DEA TR: t = t1302
lola: REM DEA TR: t = t1303
lola: REM DEA TR: t = t1304
lola: REM DEA TR: t = t530
lola: REM DEA TR: t = t531
lola: REM DEA TR: t = t532
lola: REM DEA TR: t = t533
lola: REM DEA TR: t = t715
lola: REM DEA TR: t = t716
lola: REM DEA TR: t = t717
lola: REM DEA TR: t = t718
lola: REM DEA TR: t = t719
lola: REM DEA TR: t = t720
lola: REM DEA TR: t = t721
lola: REM DEA TR: t = t722
lola: REM DEA TR: t = t723
lola: REM DEA TR: t = t724
lola: REM DEA TR: t = t725
lola: REM DEA TR: t = t726
lola: REM DEA TR: t = t727
lola: REM DEA TR: t = t728
lola: REM DEA TR: t = t729
lola: REM DEA TR: t = t730
lola: REM DEA TR: t = t160
lola: REM DEA TR: t = t534
lola: REM DEA TR: t = t161
lola: REM DEA TR: t = t535
lola: REM DEA TR: t = t1305
lola: REM DEA TR: t = t162
lola: REM DEA TR: t = t1306
lola: REM DEA TR: t = t163
lola: REM DEA TR: t = t1307
lola: REM DEA TR: t = t164
lola: REM DEA TR: t = t1308
lola: REM DEA TR: t = t165
lola: REM DEA TR: t = t1309
lola: REM DEA TR: t = t166
lola: REM DEA TR: t = t1310
lola: REM DEA TR: t = t167
lola: REM DEA TR: t = t1311
lola: REM DEA TR: t = t168
lola: REM DEA TR: t = t1312
lola: REM DEA TR: t = t169
lola: REM DEA TR: t = t1313
lola: REM DEA TR: t = t170
lola: REM DEA TR: t = t1314
lola: REM DEA TR: t = t171
lola: REM DEA TR: t = t1315
lola: REM DEA TR: t = t172
lola: REM DEA TR: t = t1316
lola: REM DEA TR: t = t173
lola: REM DEA TR: t = t1317
lola: REM DEA TR: t = t174
lola: REM DEA TR: t = t1318
lola: REM DEA TR: t = t175
lola: REM DEA TR: t = t1319
lola: REM DEA TR: t = t176
lola: REM DEA TR: t = t1320
lola: REM DEA TR: t = t177
lola: REM DEA TR: t = t1321
lola: REM DEA TR: t = t178
lola: REM DEA TR: t = t1322
lola: REM DEA TR: t = t179
lola: REM DEA TR: t = t1323
lola: REM DEA TR: t = t180
lola: REM DEA TR: t = t1324
lola: REM DEA TR: t = t181
lola: REM DEA TR: t = t1325
lola: REM DEA TR: t = t182
lola: REM DEA TR: t = t1326
lola: REM DEA TR: t = t183
lola: REM DEA TR: t = t1327
lola: REM DEA TR: t = t184
lola: REM DEA TR: t = t1328
lola: REM DEA TR: t = t185
lola: REM DEA TR: t = t1329
lola: REM DEA TR: t = t186
lola: REM DEA TR: t = t1330
lola: REM DEA TR: t = t187
lola: REM DEA TR: t = t1331
lola: REM DEA TR: t = t188
lola: REM DEA TR: t = t1332
lola: REM DEA TR: t = t189
lola: REM DEA TR: t = t1333
lola: REM DEA TR: t = t190
lola: REM DEA TR: t = t1334
lola: REM DEA TR: t = t191
lola: REM DEA TR: t = t1335
lola: REM DEA TR: t = t192
lola: REM DEA TR: t = t1336
lola: REM DEA TR: t = t193
lola: REM DEA TR: t = t1337
lola: REM DEA TR: t = t194
lola: REM DEA TR: t = t1338
lola: REM DEA TR: t = t195
lola: REM DEA TR: t = t1339
lola: REM DEA TR: t = t196
lola: REM DEA TR: t = t1340
lola: REM DEA TR: t = t197
lola: REM DEA TR: t = t1341
lola: REM DEA TR: t = t198
lola: REM DEA TR: t = t1342
lola: REM DEA TR: t = t199
lola: REM DEA TR: t = t1408
lola: REM DEA TR: t = t1432
lola: REM DEA TR: t = t1433
lola: REM DEA TR: t = t1434
lola: REM DEA TR: t = t606
lola: REM DEA TR: t = t607
lola: REM DEA TR: t = t608
lola: REM DEA TR: t = t609
lola: REM DEA TR: t = t750
lola: REM DEA TR: t = t751
lola: REM DEA TR: t = t752
lola: REM DEA TR: t = t753
lola: REM DEA TR: t = t754
lola: REM DEA TR: t = t755
lola: REM DEA TR: t = t756
lola: REM DEA TR: t = t757
lola: REM DEA TR: t = t758
lola: REM DEA TR: t = t759
lola: REM DEA TR: t = t760
lola: REM DEA TR: t = t761
lola: REM DEA TR: t = t762
lola: REM DEA TR: t = t763
lola: REM DEA TR: t = t764
lola: REM DEA TR: t = t765
lola: No deadlock is reachable.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-COL-005"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is BART-COL-005, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r020-oct2-167813608400436"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BART-COL-005.tgz
mv BART-COL-005 execution
cd execution
if [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "UpperBounds" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] || [ "ReachabilityDeadlock" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityDeadlock"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;